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Samsung Electronic
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Part No. |
K7N167245A
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OCR Text |
256kx72 pipelined n t ram tm - 1 - rev 0.3 dec. 2001 k7n167245a preliminary document title 256kx72-bit pipelined n t ram tm the attached data sheets are prepared and approved by samsung electronics. samsung electronics co., ltd. reserve t... |
Description |
256kx72-bit Pipelined NtRAMData Sheet
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File Size |
473.86K /
20 Page |
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Samsung Electronic
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Part No. |
K7Z167285A
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OCR Text |
256kx72 double late write sigmaram tm - 1 - rev 0.3 july 2001 k7z167285a preliminary document title 256kx72 double late write sigmaram tm ...bit pipelined sigmaram tm the k7z167285a is 18,874,368-bits synchronous static srams. the double ... |
Description |
256Kx72 Double Late Write SigmaRAMData Sheet
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File Size |
348.53K /
21 Page |
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Motorola Mobility Holdings, Inc.
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Part No. |
PC7410M16
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OCR Text |
256kx72 21 mm x 25 mm, 255 ceramic ball grid array maximum core frequency = 400 mhz maximum l2 cache frequency = 200 mhz maximum 60x...bit l2 address bus 64- 32-bit l2 data bus 64-bit data bus 32-bit address bus 32-bit 32-bit 32-bit 6... |
Description |
PC7410M16 [Updated 12/02. 35 Pages] PC7410M16 [更新12/0235页]
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File Size |
355.48K /
35 Page |
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Seiko NPC, Corp.
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Part No. |
CY7C1307V25
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OCR Text |
...25 is organized internally as a 256kx72 sram. accesses are completed in a burst of four sequential 18-bit data words. read operations are initiated by asserting rps active at the rising edge of the positive input clock (k). the address pr... |
Description |
Memory 内存
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File Size |
232.26K /
28 Page |
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Atmel
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Part No. |
PC7410M16 PC7410M16VG400L
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OCR Text |
256Kx72 21 mm x 25 mm, 255 Ceramic Ball Grid Array Maximum Core Frequency = 400 MHz Maximum L2 Cache Frequency = 200 MHz Maximum 60x Bus Fre...bit (4 Instructions) 32-Kbyte I Cache
PC7410M16
Additional Features Time Base Counter/Decremente... |
Description |
PC7410 2MByte backside L2-cache Multi-Chip Package RISC microprocessor. 16 Mbits: 256K x 72 SSRAM. Max internal processor speed 400 MHz. 1.8V -100mV.
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File Size |
351.43K /
35 Page |
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White Electronic Designs
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Part No. |
WED3C7410E16M-400BX
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OCR Text |
...B SSRAM L2 cache, configured as 256Kx72 * 21mmx25mm, 255 Ceramic Ball Grid Array (CBGA) * Maximum Core frequency = 400MHz @ 1.8V * Maximum L...Bit (4 Instructions)
BLOCK DIAGRAM
Additional Features Time Base Counter/Decrementer Clock Mul... |
Description |
RISC Microprocessor Multichip Package
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File Size |
300.81K /
13 Page |
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