cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 1/7 MTDN9973Q8 cystek product specification dual n-channel enhancem ent mode power mosfet MTDN9973Q8 description the MTDN9973Q8 provides the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. the sop-8 package is universally preferred for all co mmercial-industrial surface mount applications and suited for low voltage applications such as dc/dc converters. features ? r ds(on) =100m ? @v gs =4.5v, i d =2a ? simple drive requirement ? low on-resistance ? fast switching speed ? dual n-ch mosfet package ? pb-free lead plating package equivalent circuit outline MTDN9973Q8 s source d drain g gate sop-8 ordering information device package shipping marking MTDN9973Q8 sop-8 (pb-free lead plating package) 3000 pcs / tape & reel 9973ss
cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 2/7 MTDN9973Q8 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds 60 v gate-source voltage v gs 20 v continuous drain current @ v gs =10v, t a =25 c (note 1) i d 3.9 a continuous drain current @ v gs =10v, t a =70 c (note 1) i d 2.5 a pulsed drain current (note 2&3) i dm 20 a pd 2 w total power dissipation @ t a =25 c linear derating factor 0.016 w / c operating junction temperature tj -55~+150 c storage temperature tstg -55~+150 c thermal resistance, junction-to-ambient (note 1) rth,ja 62.5 c/w note : t1. su rface mounted on 1 in2 copper pad of fr-4 board; 135 c/w when mounted on minimum copper pad 2. pulse width lim ited by maximum junction temperature. 3. pulse width 300 s, duty cycle 2% characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 60 - - v v gs =0, id=250 a bv dss / tj - 0.06 - v/ c reference to 25 c, i d =1ma v gs(th) 1.0 - 3.0 v v ds = v gs , i d =250 a g fs - 3.5 - s v ds =10v, i d =3.9a i gss - - 100 na v gs = 20 i dss - - 1 a v ds =60v, v gs =0 i dss - - 25 a v ds =48v, v gs =0, tj=70 c *r ds(on) - - 80 m v gs =10v, i d =3.9a *r ds(on) - - 100 m v gs =4.5v, i d =2a dynamic *qg - 8 13 *qgs - 2 - *qgd - 4 - nc i d =3.9a, v ds =48v, v gs =4.5v *td (on) - 8 - *tr - 4 - *td (off) - 20 - *tf - 6 - ns v ds =30v, i d =1a,v gs =10v, r g =3.3 , r d =30 ciss - 700 1120 coss - 80 - crss - 50 - pf v gs =0v, v ds =25v, f=1mhz source-drain diode *v sd - - 1.2 v i s =3.9a, v gs =0v *trr - 28 - ns *qrr - 35 - nc i s =3.9a, v gs =0, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 3/7 MTDN9973Q8 cystek product specification characteristic curves
cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 4/7 MTDN9973Q8 cystek product specification characteristic curves(cont.)
cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 5/7 MTDN9973Q8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 6/7 MTDN9973Q8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c418q8 issued date : 2007.09.20 revised date : 2011.03.21 page no. : 7/7 MTDN9973Q8 cystek product specification sop-8 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. 8-lead sop-8 plastic package cystek packa g e code: q8 marking: top view a b front view f c d e g part a i h j k o m l n right side view part a date code device name 9973ss dim min. max. min. max. a 0.1890 0.2007 4.80 5.10 i 0.0098 ref 0.25 ref b 0.1496 0.1654 3.80 4.20 j 0.0118 0.0354 0.30 0.90 c 0.2283 0.2441 5.80 6.20 k 0.0074 0.0098 0.19 0.25 d 0.0480 0.0519 1.22 1.32 l 0.0145 0.0204 0.37 0.52 e 0.0138 0.0193 0.35 0.49 m 0.0118 0.0197 0.30 0.50 f 0.1472 0.1527 3.74 3.88 n 0.0031 0.0051 0.08 0.13 g 0.0531 0.0689 1.35 1.75 o 0.0000 0.0059 0.00 0.15 h 0.1889 0.2007 4.80 5.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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