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thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 1/10 thcs133 i/ospreader general description the thcs133 provides a function to serialize multiple parallel signals into single-ended serial line at least or to deserialize the data stream over single-ended serial line or single differential pair into multiple parallel signals. this small number of transmission line simplifies system configuration and reduces system cost including cable width, connector size and pins and pcb layout area. the thcs133 is offered in 8bit parallel ios as host mpu interface. it can transfer 8bit independent parallel signals to remote side by only 1-line or 1-pair cable. transmitter or receiver function can be selected by pin. features - no external clock required. -8bit parallel ios to mpu. - single-ended/differential mode (noise tolerant) selectable - ac coupling supported with differential mode - transmission status error indicator supported (line cut detection and packet error detection) - digital filter function - power supply : 3.0 to 5.5v - dip 20-pin package - eu rohs compliant block diagram i/o osc ser des iop ion m u x faultn (error flag output) rstn (reset input) rxen ctl0 ctl1 (serial i/o) (tx/rx select) (i/o control) filt (digital filter select) sig (single-ended / differential select) data<7:0> (parallel i/o) internal condition : pull-down thcs133
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 2/10 pin diagram gnd 1 20 vdd test 2 19 sig filt 3 18 iop rxen 4 17 ion faultn 5 16 data7 rstn 6 15 data6 data0 7 14 data5 data1 8 13 data4 data2 9 12 ctl1 data3 10 11 ctl0 pin description pin no. pin name internal condition description 1 gnd - ground 2 test input, pull-down test pin. please connect to gnd 3 filt input, pull-down digital filter enable pin low : off high : on 4 rxen input, pull-down receiver mode enable 5 faultn output, open-drain transmitter status error indicator low : abnormal operation detected 6 rstn input, pull-down reset input low : reset high : normal operation 7-10 13-16 data0-7 input/output, pull-down parallel data i/o bit : 0-7 11 ctl0 input, pull-down lower 8bit input latch (transmitter mode lower 8bit output enable (receiver mode) 12 ctl1 input, pull-down upper 8bit input latch (transmitter mode upper 8bit output enable (receiver mode) 17 ion input/output serial data differential mode(-) i/o 18 iop input/output serial data cmos/differential mode(+) i/o 19 sig input, pull-down serial data i/o mode select low : cmos high : differential 20 vdd - power supply
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 3/10 absolute maximum rating parameter condition min typ max unit power supply voltage vdd - -0.4 - 6 v digital input voltage (data0-dat7, filt, rxen, ctl0, ctl1, rstn, sig) - -0.4 - 6 v open-drain output pin(faultn) - -0.4 - 6 v allowable power dissipation ta=25 - - 1 w storage temperature - -55 - 150 junction temperature - - - 125 recommended operating condition parameter condition min typ max unit power supply voltage vdd - 3.0 - 5.5 v ambient operating temperature - -40 - 85
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 4/10 electrical characteristics dc characteristics at vdd 5.0v, ta=25 , unless otherwise noted parameter condition min typ max unit power supply current transmitter mode lvds mode (note) - 20 30 ma uvlo threshold voltage (vdd rising) - - 2.6 2.8 v uvlo hysteresis voltage - - 0.15 - v digital input high-level voltage (vih) - 0.7vdd - - v digital input low level voltage (vil) - - - 0.3vdd v digital input leakage current 1 except ctl1 - - +/-50 ua digital input leakage current 2 ctl1 - - +/-150 ua digital input hysteresis voltage - - 0.11vdd - v digital output high-level voltage (voh) vdd=3.0v tj=125 iout=4ma vdd-0.6 - - v digital output high-level on resistance (ronh) vdd=3.3v - 56 - ohm vdd=5.0v - 46 - ohm digital output low-level voltage (vol) vdd=3.0v tj=125 iout=4ma - - 0.4 v digital output low-level on resistance (ronl) vdd=3.3v - 44 - ohm vdd=5.0v - 36 - ohm open drain output low-level voltage iout=1ma faultn - - 0.4 v lvds differential input voltage (vid) iop/ion 200 - - mv lvds input leakage current iop/ion - - +/-50 ua lvds differential output voltage (vod) vdd=3.0v iop/ion 350 - - mv vdd=5.0v iop/ion - 600 - mv vdd=5.5v iop/ion - - 750 mv lvds output common-mode voltage (voc) iop/ion 1.0 1.25 1.4 v pull-down resistance - - 250 - kohm note: the power supply current is maximum in this condition.
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 5/10 lvds input output differential voltage ion ion iop vod iop vid voc electrical characteristics ac characteristics (reset section) mark parameter condition min typ max unit trst time from reset (rstn) release to valid input - - - 100 (note) us twrst reset (rstn) low pulse width - 50 - - ns note : in ac coupling, trst changes with the capacity to connect. timing chart (reset section) rese t signal rstn reset input (rstn) input dta (data) valid data output data data) pull-down output low valid data output trst twrst in case output is controlled by signal of output enable (ctl0, ctl1), a pull-down state is continued until it sets signal of output enable to low. electrical characteristics ac characteristics (serial communication) mark item condition min typ max unit fpspl serializer input sampling frequency - 50 - - khz tps time of serializer transmission - - - 18 us tsp deserializer output renewal time - - - 2 us fstr serial data transmission rate - - 2.5 - mhz timing chart
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 6/10 transmitter mode internal register input (data[15:0]) parallel input[15:0] internal sampling clock serial data output serial output serial output receiver mode serial data input serial input serial input internal register output (data[15:0]) parallel output[15:0] tps tsp 1/fpspl internal sampling clock and ctl signals are asynchronous. electrical characteristics ac characteristics (latch enable, output enable) symbol parameter condition min typ max unit twle latch enable pulse width - 130 - - ns tsule latch enable rise edge setup time - 133 - - ns thle latch enable rise edge hold time - 20 - - ns tclle1 latch enable clearance1 - 100 - - ns tclle2 latch enable clearance2 - 20 - - us twoe output enable pulse width - 50 - - ns tcloe output enable clearance - 50 - - ns tpzo output enable delay time cl=25pf - - 50 ns tpoz output disable delay time cl=25pf - - 38 ns timing chart (latch enable, output enable) 8bit input + latch enable upper latch enable ctl1 lower latch enable ctl0 data input upper 8bit data lower 8bit data upper 8bit data (data[7:0]) twle tsule thle tclle2 tclle1
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 7/10 8bit output + output enable upper output enable ctl1 lower output enable ctl0 data output upper 8bit data lower 8bit data (data[7:0]) twoe tcloe tpzo tpoz when receiving new incoming data during ctl0 or ctl1 = low, output data is updated to this new data. ? latch enable, output enable truth table transmitter mode ctl1 ctl0 latch enable input l l lower 8bit data is transmitted by sampling frequency (8bit through mode) h upper 8bit input latch h lower 8bit input latch and 16-bit data reception h h keep data the rising edge of ctl0 is the trigger for sampling of upper and lower data. receiver mode ctl1 ctl0 output enable input l l output disable data pins are pulled down by 250k internally l h upper 8bit output enable h l lower 8bit output enable h h output disable data pins are pulled down by 250k internally ? transmitter or receiver select pin description rxen h receiver mode (serial to parallel) l transmitter mode (parallel to serial)
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 8/10 ? connection example 16-bit transmitter and receiver serializer latch circuit ctl1 ctl0 deserializer selector ctl1 ctl0 din[7:0] dout[7:0] r x e n r x e n ? connection example 8bit transmitter and receiver serializer latch circuit ctl1 ctl0 deserializer selector ctl1 ctl0 din[7:0] dout[7:0] r x e n r x e n ? function setup for serial i/o pins iop and ion pins are set as 1 lane cmos i/o or 2-lane lvds i/o with a sig pin. pin setup function description sig iop ion l cmos i/o * cmos i/o h differential mode i/o differential mode i/o- differential mode i/o : please keep pin open (no connection) ? function of transmission status error indicator, faultn (receiver mode) faultn is the output pin. when the protocol of received data is not correct or serial data more than 50usec (typ) is not received, faultn pin will be changed into low level. the received data is canceled when a faultn pin outputs low. when normal serial data is received, a faultn pin outputs high in case of pulled up externally. ? digital filter function when filt pin is set to high level, the digital filter function is active. if the receiver matches the 3 sampling frequency content with the deserialized parallel data, it is updated as the correct data.
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 9/10 package unit: inch (mm)
thcs133_rev.1.00_e copyright?2014 thine electronics, inc. thine electronics, inc. security e 10/10 notices and requests 1. the product specifications described in this material are subject to change without prior notice. 2. the circuit diagrams described in this material are examples of the application which may not always apply to the customer?s design. we are not responsible for possible errors and omissions in this material. please note if errors or omissions should be found in this material, we may not be able to correct them immediately. 3. this material contains our copyright, know-how or other proprietary. copying or disclosing to third parties the contents of this material without our prior permission is prohibited. 4. note that if infringement of any third party?s industrial ownership should occur by using this product, we will be exempted from the responsibility unless it directly relates to the production process or functions of the product. 5. this product is presumed to be used for general electric equipment, not for the applications which require very high reliability (including medical equipment directly concerning people?s life, aerospace equipment, or nuclear control equipment). also, when using this product for the equipment concerned with the control and safety of the transportation means, the traffic signal equipment, or various types of safety equipment, please do it after applying appropriate measures to the product. 6. despite our utmost efforts to improve the quality and reliability of the product, faults will occur with a certain small probability, which is inevitable to a semi-conductor product. therefore, you are encouraged to have sufficiently redundant or error preventive design applied to the use of the product so as not to have our product cause any social or public damage. 7. please note that this product is not designed to be radiation-proof. 8. customers are asked, if required, to judge by themselves if this product falls under the category of strategic goods under the foreign exchange and foreign trade control law. 9. the product or peripheral parts may be damaged by a surge in voltage over the absolute maximum ratings or malfunction, if pins of the product are shorted by such as foreign substance. the damage may cause a smoking and ignition. therefore, you are encouraged to implement safety measures by adding protection devices, such as fuses. thine electronics, inc. sales@thine.co.jp

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