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l q QT1101 10 k ey qt ouch ? s ensor ic applications ! pointing devices ! remote controls ! pc peripherals ! television controls ! mp3 players ! mobile phones QT1101 charge-transfer (?qt?) qtouch tm ic is a self-contained, patented digital controller capable of detecting near-proximity or touch on up to ten electrodes. it allows electrodes to project independent sense fields through any dielectric such as glass or plast ic. this capability coupled with its continuous self-calibration feature can lead to entirely new product concepts, adding high value to product designs. the devices are designed specifically for human interfaces, like control panels, appliances, gaming devices, lighting controls, or anywhere a mechanical switch or button may be found; they may also be used for some material sensing and control application s. each of the channels operates independently of the others, and each can be tuned for a unique sensitivity level by simply chang ing a corresponding external cs capacitor. patented aks? adjacent key suppression suppresses touch from weaker responding keys and allows only a dominant key to detect, for example to solve the problem of large fingers on tightly spaced keys. spread spectrum burst technology provides superior noise rejection. these devices also have a sync/lp pin which allows for synchronization with additional similar parts and/or to an external source to suppress interference, or, an lp (low power) mode which conserves power. by using the charge transfer principle, this device delivers a level of performance clearly superior to older technologies yet is highly cost-effective. l qc copyright ? 2005-2006 qrg ltd QT1101 r4.06/0806 " patented charge-transfer (?qt?) design " ten independent qt sensing fields (keys) " 2.8v ~ 5.5v single supply operation " 40 a current typ @ 3v in 360ms lp mode " 100% autocal for life - no adjustments required " serial one or two wire interface with auto baud rate " fully debounced results " patented aks? adjacent key suppression " spread spectrum bursts for superior noise rejection " sync pin for excellent lf noise rejection " ?fast mode? for use in slider type applications " rohs compliant 32-qfn, 48-ssop packages QT1101-is48g QT1101-isg -40 0 c to +85 0 c 48-ssop 32-qfn t a available options /rst vdd osc n.c. sns0 sns0k sns1 sync/lp detect vss sns7k sns7 sns6k sns6 sns5k 1w /change n.c. sns9k sns9 sns8k sns8 ss rx 1 23 4 5678 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 QT1101 32-qfn sns1k sns2 sns2k sns3 sns3k sns4 sns4k sns5
1 overvie w the QT1101 is an easy to use, ten touch-key sensor ic based on quantum?s patented charge-transfer (?qt?) principles for robust operation and ease of design. this device has many advanced features which provide for reliable, trouble-free operation over the life of the product. burst operation: the device operates in ?burst mode?. each key is acquired using a burst of charge-transfer sensing pulses whose count varies depending on the value of the reference capacitor cs and the load capacitance cx. in lp mode, the device sleeps in an ultra-low current state between bursts to conserve power. the keys signals are acquired using three successive bursts of pulses: burst a: keys 0, 1, 4, 5 burst b: keys 2, 3, 6, 7 burst c: keys 8, 9 bursts always operate in a-b-c sequence. self-calibration: on power-up, all ten keys are self-calibrated within 450ms typical to provide reliable operation under almost any conditions. auto-recalibration : the device can time out and recalibrate each key independently after a fixed interval of continuous touch detection, so that the keys can never become ?stuck on? due to foreign objects or other sudden influences. after recalibration the key will continue to function normally. the delay is selectable to be either 10s, 60s, or infinite (disabled). the device also auto-recalibrates a key when its signal reflects a sufficient decrease in capacitance. i n this case the device recalibrates after ~2 seconds so as to recover normal operation quickly. drift compensation operates to correct the reference level of each key slowly but automatically over time, to suppress false detections caused by changes in temperature, humidity, dirt and other environmental effects. the drift compensation is asymmetric. in the increasing capacitive load direction the device drifts more slowly than in the decreasing direction. in the increasing direction, the rate of compensation is one count of signal per two seconds. in the opposing direction, it is one count every 500ms. detection integrator (di) confirmation reduces the effects of noise on the QT1101 outputs. the di mechanism requires consecutive detections over a number of measurement bursts for a touch to be confirmed and indicated on the outputs. in a like manner, the end of a touch (loss of signal) has to be confirmed over a number of measurement bursts. this process acts as a type of ? debounce? against noise. in normal operation, both the start and end of a touch must be confirmed for six measurement bursts. in a special ?fast detect? mode (available via jumper resistors) (tables 1.2 and 1.6), confirmation of the start of a touch requires only two sequential detections, but confirmation of the end of a touch is still six bursts. fast detect is only available when aks is disabled. spread spectrum operation: the bursts operate over a spread of frequencies, so that external fields will have minimal effect on key operation and emissions are very weak. spread spectrum operation works with the di mechanism to dramatically reduce the probability of false detection due to noise. sync mode: the QT1101 features a sync mode to allow the device to slave to an external signal source, such as a mains signal (50/60hz), to limit interference effects. this is performed using the sync/lp pin. sync mode operates by triggering three sequential acquire bursts, in sequence a-b-c from the sync signal. thus, each sync pulse causes all ten keys to be acquired. low power (lp) mode: the device features an lp mode for microamp levels of current drain with a slower response time, to allow use in battery operated devices. on detection of touch, the device automatically reverts to its normal mode and asserts the detect pin active to wake up a host controller. the device remains in normal, full acquire speed mode until another pulse is seen on its sync/lp pin, upon which it goes back to lp mode. aks? adjacent key suppression is a patented feature that can be enabled via jumper resistors. aks works to prevent multiple keys from responding to a single touch, a common complaint about capacitive touch panels. this can happen with closely spaced keys, or with control surfaces that have water films on them. aks operates by comparing signal strengths from keys within a group of keys to suppress touch detections from those that have a weaker signal change than the dominant one. the QT1101 has two different aks groupings of keys, selectable via option resistors. these groupings are: aks operates in three groups of keys. aks operates over all ten keys. these two modes allow the designer to provide aks while also providing for shift or function operations. if aks is disabled, all keys can operate simultaneously. outputs: the QT1101 has a serial output using one or two wires, rs-232 data format, and automatic baud rate detection. a simple protocol is employed. the QT1101 operates in slave mode, i.e. it only sends data to the host after receiving a request from the host. an additional /change (state changed) signal allows the use of the serial interface to be optimised, rather than being polled continuously. simplified mode: to reduce the need for option resistors, the simplified operating mode places the part into fixed settings with only the aks feature being selectable. lp mode is also possible in this configuration. simplified mode is suitable for most applications. l q 2 QT1101 r4.06/0806
1.1 wiring table 1.1 pinlist vdd input for 2w mode 2w receive i rx 32 32 - requires pull-up to vdd 1w mode serial i/o i/od 1w 31 31 100k ? resistor to vss 0 = a key state has changed requires pull-up state changed od /change 30 30 open - - - n/c 29 29 open to cs9 + key sense pin i/o sns9k 28 28 open to cs9 sense pin i/o sns9 27 27 open to cs8 + key sense pin i/o sns8k 26 26 open to cs8 sense pin i/o sns8 25 25 open - - - n/c 23, 24 - open see table 1.4 detect status o/od detect 22 24 vdd or vss** rising edge sync or lp pulse sync in or lp in i sync/lp ? 21 23 open - - - n/c 18, 19, 20 - - 0v ground pwr vss 17 22 open - - - n/c 11, 12, 13, 14, 15, 16 - open to cs7 + key sense pin i/o sns7k 10 21 open or mode resistor ? or option resistor* to cs7 and/or mode resistor ? or option resistor* sense pin and mode or option select i/o sns7 9 20 open or mode resistor ? to cs6 + key and/or mode resistor ? sense pin and mode select i/o sns6k 8 19 open or option resistor* to cs6 and/or option resistor* sense pin and option select i/o sns6 7 18 open to cs5 + key sense pin i/o sns5k 6 17 open or option resistor* to cs5 and/or option resistor * sense pin and option select i/o sns5 5 16 open to cs4 + key sense pin i/o sns4k 4 15 open to cs4 sense pin i/o sns4 3 14 open to cs3 + key sense pin i/o sns3k 2 13 open or option resistor* to cs3 and/or option resistor* sense pin and option select i/o sns3 1 12 open to cs2 + key sense pin i/o sns2k 48 11 open or option resistor* to cs2 and/or option resistor* sense pin and option select i/o sns2 47 10 open to cs1 + key sense pin i/o sns1k 46 9 open or option resistor* to cs1 and/or option resistor* sense pin and option select i/o sns1 45 8 open to cs0 + key sense pin i/o sns0k 44 7 open or option resistor* to cs0 and/or option resistor sense pin and option select i/o sns0 43 6 open - - - n/c 39, 40, 41, 42 - - leave open - - n/c 38 5 - resistor to vdd and optional spread spectrum rc network oscillator i osc 37 4 - +2.8 ~ +5.0v power pwr vdd 36 3 vdd active low reset reset input i /rst 35 2 open - - - n/c 34 - 100k ? resistor to vss spread spectrum drive spread spectrum od ss 33 1 if unused notes function type name 48 ssop pin 32-qfn pin pin type i cmos input only i/o cmos i/o od cmos open drain output i/od cmos input or open drain output o/od cmos push pull or open-drain output (option selected) pwr power / ground notes ? mode resistor is required only in simplif ied mode (see figure 1.2) * option resistor is required only in full options mode (see figure 1.1) ? pin is either sync or lp depending on options selected (functions sl_0, sl_1, see figure 1.1) ** see text l q 3 QT1101 r4.06/0806
figure 1.1 connection diagram - full options (32-qfn package) table 1.2 aks / fast-detect options table 1.3 max on-duration table 1.4 detect pin drive table 1.5 sync/lp function l q 4 QT1101 r4.06/0806 sns3 sns3k sns4 sns4k sns5 sns5k sns6 sns6k sns7 sns7k sns2k sns2 sns1k sns1 sns0k sns0 /rst 2.2k 10k 4.7nf 10k 10k 10k 10k 4.7nf 4.7nf 4.7nf 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k key 2 10k 10k 10k 4.7nf 4.7nf 4.7nf 2.2k 2.2k 2.2k 4.7nf 1m 1m 1m 1m vdd / vss vdd / vss vdd / vss vdd / vss 1m vdd / vss 1m vdd / vss 1m vdd / vss mod_1 out_d sl_0 sl_1 mod_0 aks_1 aks_0 vdd vunreg 4.7uf 4.7uf *100nf +2.8 ~ +5v voltage reg vdd 12 13 15 16 17 18 19 20 21 11 10 9 8 7 6 3 2 key 1 key 0 key 3 key 4 key 5 key 6 key 7 vss 22 sns8 sns8k sns9 sns9k 25 26 27 28 10k 10k 100k 4.7nf 4.7nf key 8 key 9 r sns8 r sns9 c s8 c s9 detect sync/lp 24 23 detect out rx 1w /change n.c. 32 31 30 29 /change data 2w data vdd sync or lp 100k vdd pullup not required for push-pull mode see detect pin mode table below 100k vdd r sns3 c s3 r sns4 r sns5 r sns6 r sns7 c s4 c s5 c s6 c s7 r s3 r s4 r s5 r s6 r s8 r s7 r s9 c s2 r s2 r sns2 r sns1 r sns0 r s1 r s0 c s1 c s0 100k vdd QT1101 32-qfn n.c. 5 osc ss 4 1 rb1 rb2 css vdd 100nf with spread-spectrum vdd range rb1 rb2 vdd range rb1 rb2 2.8 3.0 ~ 3.59v ~ 2.99v 12k 27k 12k 22k 3.6 ~ 5v 15k 27k 2.8 ~ 2.99v 15k dni 3.0 ~ 3.59v 18k dni 3.6 ~ 5v 20k dni dni = do not install no spread-spectrum recommended rb1, rb2 values no spread-spectrum: replace css with 100k resistor off on, global vdd vdd off on, in 3 groups vss vdd enabled off vdd vss off off vss vss fast-detect aks mode aks_0 aks_1 (reserved) vdd vdd infinite (disabled) vss vdd 60 seconds to recalibrate vdd vss 10 seconds to recalibrate vss vss max on-duration mode mod_0 mod_1 push-pull, active high vdd open drain, active low vss detect pin mode out_d lp mode: 360ms response time vdd vdd lp mode: 200ms response time vss vdd lp mode: 120ms response time vdd vss sync vss vss sync/lp pin mode sl_0 sl_1
figure 1.2 connection diagram - simplified mode (32-qfn package) smr resistor installed between sns6k, sns7 table 1.6 aks resistor options table 1.7 functions in simplified mode push-pull, active high detect pin 60 seconds max on-duration delay 200ms lp function; sync not available sync/lp pin l q 5 QT1101 r4.06/0806 sns3 sns3k sns4 sns4k sns5 sns5k sns6 sns8 sns6k sns8k sns7 sns9 sns7k sns9k vss detect sync/lp sns2k sns2 sns1k sns1 sns0k sns0 /rst rx 1w /change n.c. 12 13 15 16 17 18 25 19 26 20 27 21 28 24 23 11 10 9 8 7 6 3 2 32 31 30 29 2.2k 10k 4.7nf 10k 10k 10k 10k 10k 10k 4.7nf 4.7nf 4.7nf 4.7nf 4.7nf 2.2k 2.2k 2.2k 2.2k 2.2k 2.2k 10k 10k 10k 4.7nf 4.7nf 4.7nf 2.2k 2.2k detect out lp in /change data 2w data 2.2k 4.7nf 1m vdd / vss 1m aks_0 smr 22 vdd vunreg 4.7uf 4.7uf +2.8 ~ +5v voltage reg vdd *100nf key 3 key 4 key 5 key 6 key 8 key 7 key 9 key 2 key 1 key 0 vdd vdd vdd r sns3 c s3 r sns4 r sns5 r sns6 r sns8 r sns7 r sns9 c s4 c s5 c s6 c s8 c s7 c s9 r s3 r s4 r s5 r s6 r s8 r s7 r s9 c s2 r s2 r sns2 r sns1 r sns0 r s1 r s0 c s1 c s0 100k 100k n.c. 5 with spread-spectrum vdd range rb1 rb2 vdd range rb1 rb2 2.8 3.0 ~ 3.59v ~ 2.99v 12k 27k 12k 22k 3.6 ~ 5v 15k 27k 2.8 ~ 2.99v 15k dni 3.0 ~ 3.59v 18k dni 3.6 ~ 5v 20k dni dni = do not install no spread-spectrum recommended rb1, rb2 values osc ss 4 1 rb1 rb2 vdd QT1101 32-qfn no spread-spectrum: replace css with 100k resistor css 100nf 100k off on, global vdd enabled off vss fast-detect aks mode aks_0
2 device operation 2.1 startup time after a reset or power-up event, the device requires 450ms to initialize, calibrate, and start operating normally. keys will work properly once all keys have been calibrated after reset. 2.2 option resistors the option resistors are read on power-up only. there are two primary option mode configurations: f ull, and simplified. in full options mode, seven 1m ? option resistors are required as shown in figure 1.1. all seven resistors are mandatory. to obtain simplified mode, a 1m ? resistor should be connected from sns6k to sns7. in simplified mode, only one additional 1m ? option resistor is required for the aks feature (figure 1.2). note that the presence and connection of option resistors will influence the required values of cs; this effect will be especially noticeable if the cs values are under 22nf. cs values should be adjusted for optimal sensitivity after the option resistors are connected. 2.3 detect pin detect represents the functional logical-or of all ten keys. detect can be used to wake up a battery-operated product upon human touch. the output polarity and drive of detect are governed according to table 1.4, page 4. 2.4 /change pin the /change pin can be used to tell the host that a change in touch state has been detected (i.e. a key has been touched or released), and that the host should read the new key states over the serial interface . /change is pulled low when a key state change has occurred. /change is very useful to prevent transmissions with duplicate data. if /change is not used, the host would need to keep polling the QT1101 constantly, even if there are no changes in touch. upon detection of a key, /change will pull low and stay low until the serial interface has been polled by the host. /change will then be released and return high until the next change of key state, either on or off , on any key (figures 2.1, 2.4). the /change pin is open-drain, and requires a ~100k pullup resistor to vdd in order to function properly. 2.5 sync/lp pin the sync / lp pin function is configured according to the sl_0 and sl_1 resistor connections to either vdd or vss , according to the table 1.5. sync mode: sync mode allows the designer to synchronize acquire bursts to an external signal source, such as mains frequency (50/60hz), to suppress interference. it can also be used to synchronize two qt parts which operate near each other, so that they will not cross-interfere if two or more of the keys (or associated wiring) of the two parts are near each other. the sync input is positive pulse triggered. if the sync input does not change, the device will free-run at its own rate after ~150ms. a trigger pulse on sync will cause the device to fire three acquire bursts in a-b-c sequence: burst a: keys 0, 1, 4, 5 burst b: keys 2, 3, 6, 7 burst c: keys 8, 9 low power (lp) mode: this allows the device to enter a slow mode with very low power consumption, in one of three response time settings - 120ms, 200ms, and 360ms nominal. lp mode is entered by a positive pulse on the sync/lp pin. once the lp pulse is detected , the device will enter and remain in this microamp mode until it senses and confirms a touch, upon which it will switch back to normal (full speed) mode on its own, with a response time of < 40ms typical (burst length dependent). the device will go back to lp mode again if sync/lp is held high or after another lp pulse is received. the response time setting is determined by option resistors sl_1 and sl_0 (see table 1.5). slower response times result in lower power drain. the sync/lp pulse should be >150s in duration. if the sync/lp pin is held high permanently, the device will go into normal mode during a key touch, and return to low-current mode after the detection has ceased and the key state has been read by the host. if the sync/lp pin is held low constantly, the device will remain in normal full speed mode continuously. 2.6 aks? function pins the QT1101 features an adjacent key suppression ( aks?) function with two modes. option resistors act to set this feature according to tables 1.2 and 1.6. aks can be disabled, allowing any combination of keys to become active at the same time. when operating, the modes are: global: the aks function operates across all ten keys. this means that only one key can be active at any one time. groups: the aks function operates among t hree groups of keys: 0-1-4-5, 2-3-6-7, and 8-9. this means that up to three keys can be active at any one time. in group mode, keys in one group have no aks interaction with keys in any other group. note that in fast detect mode, aks can only be off. 2.7 mod_0, mod_1 inputs in full option mode, the mod_0 and mod_1 resistors are used to set the 'max on-duration' recalibration timeouts. if a key becomes stuck on for a lengthy duration of time, this feature will cause an automatic recalibration event of that specific key only once the specified on-time has been exceeded. settings of 10s, 60s, and infinite are available. the max on-duration feature operates on a key -by-key basis; when one key is stuck on, its recalibration has no effect on other keys. the logic combination on the mod option pins sets the timeout delay; see table 1.3. simplified mode mod timing: in simplified mode, the max on-duration is fixed at 60 seconds. l q 6 QT1101 r4.06/0806
2.8 fast detect mode in many applications, it is desirable to sense touch at high speed. examples include scrolling ?slider? strips or ?off? buttons. it is possible to place the device into a ?fast detect? mode that usually requires under 15 ms to respond. this is accomplished internally by setting the detect integrator to only two counts, i.e. only two successive detections are required to detect touch. in lp mode, ?fast? detection will not speed up the initial delay (which could be up to 360ms typical depending on the option setting). however, once a key is detected the device is forced back into normal speed mode . it will remain in this faster mode until another lp pulse is received. when used in a ?slider? application, it is normally desirable to run the keys without aks. in both normal and ?fast? modes, the time required to process a key release is the same: it takes six sequential confirmations of non-detection to turn a key off. fast detect mode can be enabled as shown in tables 1.2 and 1.6. 2.9 simplified mode a simplified operating mode which does not require the majority of option resistors is available. this mode is set by connecting a resistor labeled smr between pins sns6k and sns7. (see figure 1.2). in this mode there is only one option available - aks enable or disable. when aks is disabled, fast detect mode is enabled; when aks is enabled, fast detect mode is off. aks in this mode is global only (i.e. operates across all functioning keys). the other option features are fixed as follows: detect pin: push-pull, active high sync/lp function: lp mode, ~200ms response time max on-duration: 60 seconds see also tables 1.6 and 1.7. 2.10 unused keys unused keys should be disabled by removing the corresponding cs, rs, and rsns components and connecting sns pins as shown in the ?unused? column of table 1.1. unused keys are ignored and do not factor into the aks function (section 2.6). 2.11 serial 1w interface the 1w serial interface is an rs-232 based auto baud rate serial asynchronous interface that requires only one wire between the host mcu and the QT1101. the serial data are extremely short and simple to interpret. auto baud rate detection takes place by having the host device send a specific character to the qt 1101, which allows the QT1101 to set its baud rate to match that of the host. one feature of this method is that the baud rate can be any rate between 8,000 and 38,400 bits per second. neither the QT1101 nor the host device has to be accurate in their transmission rates, i.e. crystal control is not required. depending on the timing of a 1w host transmission, the QT1101 device may need to abort an acquisition burst, and rerun it after the transmission is complete and a reply has been sent. as a consequence, each host request can potentially result in a small, unnoticeable increase in detection delay. 1w connection: the 1w pin should be pulled high with a resistor. when not in use it floats high, hence this causes no increase in supply current. during transmission from the host, the host may drive the 1w line with either an open-drain or a push-pull driver. however, if the host uses push-pull driving, it must release the 1w line as soon as it is done with its stop bit so that there is no drive conflict when the QT1101 sends its reply. if open-drain transmission is used by the host, the value of the pull-up resistor should be optimized for the desired baud rate: faster rates require a lower value of resistor to prevent rise-time problems. a typical value for 19,200 baud might be 100k ? . an oscilloscope should be used to confirm that the resistor is not causing excessive timing skew that might cause bit errors. the QT1101 uses push-pull drive to transmit data out on the 1w line back to the host. when the stop bit level is established, 1w is floated; for this reason, a pull-up resistor should always be used on the 1w pin to prevent the signal from drifting to an undefined state. a 100k ? pull-up resistor on 1w is recommended, unless the host uses open-drain drive to the QT1101, in which case a lower value may be required (see prior paragraph). 2.11.1 basic 1w operation the basic sequence of 1w serial operation is shown in figure 2.1. the 1w line is bi-directional and must be pulled high with a resistor to prevent a floating, undefined state (see previous section). l q 7 QT1101 r4.06/0806 figure 2.1 basic 1w sequence *see figure 2.3 figure 2.2 1w uart host pattern 1 ~ 3 bit periods 1w /change key state change request from host (1 byte) d r i ven rep l y from QT1101 (2 bytes)* floating floating floating floating s01234 7s serial bits 56 1w (from host)
oscillator tolerance: while the auto baud rate detection mechanism has a wide tolerance for oscillator error, the qt?s oscillator should still not vary by more than 20% from the recommended value. beyond a 20% error, communications at either the lower or upper stated limits could fail. the oscillator frequency can be checked with an oscilloscope by probing the pulse width on the sns lines; these should ideally be 2.15s in width each at the beginning of a burst with the recommended spread-spectrum circuit, or 2s wide if no spread-spectrum circuit is used. host request byte: the host requests the key state from the QT1101 by sending an ascii "p" character (ascii decimal code 80, hex 0x50) over the 1w line. the character is formatted according to conventional rs-232: 8 data bits no parity 1 stop bit baud rate: 8,000 - 38,400 figure 2.2 shows the bit pattern of the host request byte (?p?). the first bit labeled ?s? is the start bit, the last ?s? is the stop bit. this bit pattern should never be changed. the QT1101 will respond at the same baud rate as the received ?p? character. after sending the ?p? character the host must immediately float the 1w signal to prevent a drive conflict between the host and the QT1101 (see figure 2.1). the delay from the received stop bit to the QT1101 driving the 1w pin is in the range 1-3 bit periods, so the host should float the pin within one bit period to prevent a drive conflict. data reply: before sending a reply, the QT1101 returns the /change signal to its inactive (float-high) state. the QT1101 then replies by sending two eight-bit characters to the host over the 1w line using the same baud rate as the request. with no keys pressed, both repl y bytes are ascii ?@? (0x40) characters; any keys that are pressed at the time of the reply result in their associated bits being set in the reply. figure 2.3 shows the reply bytes when keys 0, 2 and 7 are pressed - 0x45, 0x42, and the associations between keys and bits in the reply. the QT1101 floats the 1w pin again after establishing the level of the stop bit. 2.11.2 lp mode effects on 1w the use of low power (lp) mode presents some additional 1w timing requirements. in lp mode (section 2.5), the QT1101 will only respond to a request from the host when it is making one of its infrequent checks for a key press. hence, in that condition most requests from the host to the QT1101 will be ignored, since the QT1101 will be sleeping and unresponsive. however, if either /change or detect are active the QT1101 will be at full speed, and hence will always respond to ?p? requests. note that when sleeping in lp mode, there are by definition no keys active, so there should not be a reason for the host to send the ?p? query command in the first place. three strategies are available to the host to ensure that lp mode operates correctly: # /change used . the host monitors /change, and only sends a ?p? request when it is low. the part is awake by definition when /change is low. if /change is high, key states are known to be unchanged since the last reply received from the QT1101, and so additional ?p? requests are not needed. before triggering lp mode the host should wait for /change to go high after all keys have become inactive. # detect used . the host monitors detect, and if it is active (i.e. the part is awake) it polls the device regularly to obtain key status. when detect is inactive (the part may be sleeping) no requests are sent because it is known that no keys are active. before triggering lp mode the host should wait for detect to become inactive, and then send one additional 'p' request to ensure /change is also made inactive. # neither /change nor detect used . the host polls the device regularly to obtain key status, with a timeout in operation when awaiting the reply to each ?p? request. not receiving a reply within the timeout period only occurs when the part is sleeping, and hence when no keys are active. before triggering lp mode the host should wait for all keys to become inactive and then send an additional 'p' request to the QT1101 to ensure /change is also inactive. 2.11.3 2w operation 1w operation, as described above, requires that the host float the 1w line while awaiting a reply from the QT1101; this is not always possible. l q 8 QT1101 r4.06/0806 figure 2.3 uart response pattern on 1w pin (shown with keys 0, 2 and 7 detecting) * fixed bit values u - unused bits s01234567 s01234567s 012345 ** 6789uu ** serial bits associated key # 1w (from QT1101) s floating floating floating figure 2.4 2w operation 1w (from QT1101) /change rx (from host) key state change request from host (1 byte) d r i ven rep l y from QT1101 (2 bytes) floating floating floating floating 1 ~ 3 bit periods
to solve this problem, the QT1101 can also receive the ?p? character from the host on its ?rx? pin separately from the 1w pin (figure 2.4). the host need not float the rx line since the QT1101 will never try to drive it. following a ?p? on rx, the QT1101 will send the same response pattern (figure 2.3) over the 1w line as in pure 1w mode. all other comments and timings given for 1w operation are applicable for 2w operation. lp operation is the same for 2w mode as for 1w. if the rx pin is not used, it must be tied to vdd. 3 design notes 3.1 oscillator frequency the QT1101?s internal oscillator runs from an external network connected to the osc and ss pins as shown in figures 1.1 and 1.2. the charts in these figures show the recommended values to use depending on nominal operating voltage and spread spectrum mode. if spread spectrum mode is not used, only resistor rb1 should be used, the css capacitor eliminated, and the ss pin pulled to vss with a 100k resistor. an out-of-spec oscillator can induce timing problems such as large variations in max on-duration times and response times as well as on the serial port. effect on serial communications: the oscillator frequency has no nominal effect on serial communications since the baud rate is set by an auto-sensing mechanism. however, if the oscillator is too far outside the recommended settings, the possible range of serial communications can shrink. for example, if the oscillator is too slow, the upper baud rate range can be reduced. the burst pulses should always be in the range of 1.8 -2.4s at the start of a burst to allow the serial port to operate at its specified limits; in spread-spectrum mode, the first pulses of a burst should ideally be 2.15s. in non spread-spectrum mode, the target value is 2s. if in doubt, make the pulses on the narrower side (i.e. a faster oscillator) when using the higher baud rates, and conversely on the wider side when using the lowest baud rates. 3.2 spread spectrum circuit the QT1101 offers the ability to spectrally spread its frequency of operation to heavily reduce susceptibility to external noise sources and to limit rf emissions. the ss pin is used to modulate an external passive rc netw ork that modulates the osc pin. osc is the main oscillator current input. the circuits and recommended values are shown in figures 1.1 and 1.2. the resistors rb1 and rb2 should be changed depending on vdd. as shown in figures 1.1 and 1.2, three sets of values are recommended for these resistors depending on vdd. the power curves in section 4.6 also show the effect of these resistors. the spread-spectrum circuit can be eliminated if it is not desired (see section 3.1). non spread-spectrum mode consumes significantly less current in one of the lp modes. the spread-spectrum rc network might need to be modified slightly with longer burst lengths. the sawtooth waveform observed on ss should reach a crest height as follows: vdd >= 3.6v: 17% of vdd vdd < 3.6v: 20% of vdd the css capacitor connected to ss (figures 1.1 and 1.2) should be adjusted so that the wavefor m approximates the above amplitude, 10%, during normal operation in the target circuit. if this is done, the circuit will give a spectral modulation of 12-15%. 3.3 cs sample capacitors - sensitivity the cs sample capacitors accumulate the charge from the key electrodes and determine sensitivity. higher values of cs make the corresponding sensing channel more sensitive. the values of cs can differ for each channel, permitting differences in sensitivity from key to key or to balance unequal sensitivities. unequal sensitivities can occur due to key size and placement differences and stray wiring capacitances. more stray capacitance on a sense trace will desensitize the corresponding key; increasing the cs for that key will compensate for the loss of sensitivity. the cs capacitors can be virtually any plastic film or low to medium-k ceramic capacitor. the ?normal? cs range is 2 .2nf to 50nf depending on the sensitivity required; larger values of cs require better quality to ensure reliable sensing. acceptable capacitor types for most uses include pps film, polypropylene film, and np0 and x7r ceramics. lower grades than x7r are not advised. the required values of cs can be noticeably affected by the presence and connection of the option resistors. 3.4 power supply the power supply can range from 2.8v to 5.0v. if this fluctuates slowly with temperature, the device will track and compensate for these changes automatically with only minor changes in sensitivity. if the supply voltage drifts or shifts quickly, the drift compensation mechanism will not be able to keep up, causing sensitivity anomalies or false detections. the power supply should be locally regulated using a three-terminal device, to between 2.8v and 5 .0v. if the supply is shared with another electronic system, care should be taken to ensure that the supply is free of digital spikes, sags, and surges which can cause adverse effects. for proper operation a 0.1f or greater bypass capacitor must be used between vdd and vss . the bypass capacitor should be routed with very short tracks to the device?s vss and vdd pins. 3.5 pcb layout and construction refer to quantum application note an-kd02 for information related to layout and construction matters. l q 9 QT1101 r4.06/0806
4 specifications 4.1 absolute maximum specifications operating temperature, ta .............................................................................................. -40 ~ +85oc storage temp, ts ......................................................................................................-50 ~ +125oc vdd................................................................................................................... -0.3 ~ +6.0v max continuous pin current, any control or drive pin ............................................................................ 20ma short circuit duration to ground or vdd, any pin ................................................................................. infinite voltage forced onto any pin .................................................................................. -0.3v ~ (vdd + 0.3) volts 4.2 recommended operating conditions operating temperature, ta .............................................................................................. -40 ~ +85oc v dd ................................................................................................................... +2.8 ~ +5.0v short-term supply ripple+noise ............................................................................................... 5mv/s long-term supply stability ................................................................................................... 100mv cs range .............................................................................................................. 2.2 ~ 100nf cx range ................................................................................................................. 0 ~ 50pf 4.3 ac specifications vdd = 5.0v, ta = recommended, cx = 5pf, cs = 4.7nf; circuit of figure 1.1 baud 38,400 8,000 serial communications speed bps end of touch ms 40 release time - all modes tdr 200ms lp setting ms 200 response time - lp mode tdl ms 40 response time - normal mode tdn ms 15 response time - fast mode tdf all 3 bursts ms 6.5 burst duration tbd ms 450 startup time from cold start tsu s 2 sample pulse duration tpc total deviation % 15 burst modulation, percent fm khz 124 burst center frequency fc ms 300 recalibration time trc notes units max typ min description parameter 4.4 dc specifications vdd = 5.0v, ta = recommended, cx = 5pf, cs = 4.7nf, ta = recommended range; circuit of figure 1.1 unless noted bits 8 acquisition resolution ar a 1 input leakage current iil 2.5ma source v vdd-0.5 high output voltage voh 7ma sink v 0.5 low output voltage vol v 3.5 high input logic level vhl v 0.7 low input logic level vil req?d for startup, w/o external reset ckt v/s 100 average supply turn-on slope vdds @ vdd = 3.0; 200ms lp mode a 75 average supply current, lp mode* iddl @ vdd = 5.0 @ vdd = 4.0 @ vdd = 3.6 @ vdd = 3.3 @ vdd = 2.8 ma 8 4.5 2.7 2.1 1.9 1.5 average supply current, normal mode* iddn notes units max typ min description parameter *no spread spectrum circuit l q 10 QT1101 r4.06/0806
4.5 signal processing vdd = 5.0v, ta = recommended, cx = 5pf, cs = 4.7nf, 2s qt pulses towards decreasing cx load ms/level 500 anti drift compensation rate towards increasing cx load ms/level 2,000 normal drift compensation rate option pin selected secs 10, 60, inf max on-duration must be consecutive or detection fails samples 2 detect integrator filter, fast mode must be consecutive or detection fails samples 6 detect integrator filter, normal mode time to recalibrate if cx load has exceeded anti-detection threshold secs 2 anti-detection recalibration delay threshold for decrease of cx load counts 6 anti-detection threshold counts 2 detection hysteresis threshold for increase in cx load counts 10 detection threshold notes units value description l q 11 QT1101 r4.06/0806
4.6 idd curves cx = 5pf, cs = 4.7nf, ta = 20 o c, spread spectrum circuit (see fig. 1.1). QT1101 idd (360m s re sponse) a 0 50 100 150 200 250 300 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(a) rb1=12k rb2=27k rb1=12k rb2=22k rb1=15k rb2=27k QT1101 idd (200m s re sponse) a 0 100 200 300 400 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(a) rb1=12k rb2=27k rb1=12k rb2=22k rb1=15k rb2=27k QT1101 idd (120m s re sponse) a 0 100 200 300 400 500 600 700 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(a) rb1=12k rb2=27k rb1=12k rb2=22k rb1=15k rb2=27k QT1101 idd (norm al m ode ) m a 0.0 1.0 2.0 3.0 4.0 5.0 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(ma) rb1=12k rb2=27k rb1=12k rb2=22k rb1=15k rb2=27k cx = 5pf, cs = 4.7nf, ta = 20 o c, no spread spectrum circuit (see fig. 1.1). QT1101 idd (360m s re sponse) a 0 25 50 75 100 125 150 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(a) rb1=15k rb1=20k rb1=18k QT1101 idd (200m s re sponse) a 0 50 100 150 200 250 300 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(a) rb1=15k rb1=20k rb1=18k QT1101 idd (120m s re sponse) a 0 100 200 300 400 500 600 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(a) rb1=15k rb1=18k rb1=20k QT1101 idd (norm al m ode ) m a 0.0 1.0 2.0 3.0 4.0 5.0 2.5 3 3.5 4 4.5 5 5.5 vdd(v) idd(ma) rb1=15k rb1=18k rb1=20k l q 12 QT1101 r4.06/0806
4.7 lp mode typical response times response time vs vdd - 360ms setting 290 310 330 350 370 390 410 430 2.5 3 3.5 4 4.5 5 5.5 vdd actual response time, ms response time vs vdd - 200ms setting 160 170 180 190 200 210 220 230 240 2.5 3 3.5 4 4.5 5 5.5 vdd actual response time, ms response time vs vdd - 120ms setting 90 95 100 105 110 115 120 125 130 2.5 3 3.5 4 4.5 5 5.5 vdd actual response time, ms l q 13 QT1101 r4.06/0806
4.8 mechanical - 32-qfn package symbol minimum nominal maximum a0.70 - 0.90 a1 0.00 0.02 0.05 b 0.180.250.32 c-0.20ref- d 4.905.005.10 d2 3.05 - 3.65 e 4.905.005.10 e2 3.05 - 3.65 e-0.50- l 0.300.400.50 y 0.00 - 0.075 dimensions in millimeters note that there is no functional requirement for the large pad on the underside of the 32-qfn package to be soldered to the substrate. if the final application does require this area to be soldered for mechanical reasons, the pad(s) to which it is soldered to must be isolated and contained under the 32-qfn footprint only. l q 14 QT1101 r4.06/0806
4.9 mechanical - 48-ssop package h a c b d e f a j g all dimensions in millimeters 8 o 0.89 0.30 16.18 0.25 2.51 0.30 7.59 10.67 max 0 o 0.64 0.10 15.57 0.10 0.64 typ 2.16 0.20 7.39 10.03 min a j h g f e d c b a 4.10 part marking 32-qfn 48-ssop l q 15 QT1101 r4.06/0806 yywwg run nr. 'yy' = year of manufacture: 'ww' = week of manufacture: 'g' = green/rohs compliant. pin 1 identification qrg revision code QT1101 ?qrg 4 qrg part no. 'run nr.' = 6 digit run number QT1101-is48g ? qrg 1976 r4 qprox tm dimple QT1101-is48g; 48 ssop pin 1
l q copyright ? 2005-2006 qrg ltd. all rights reserved. patented and patents pending corporate headquarters 1 mitchell point ensign way, hamble so31 4rf great britain tel: +44 (0)23 8056 5600 fax: +44 (0)23 8045 3939 www.qprox.com north america 651 holiday drive bldg. 5 / 300 pittsburgh, pa 15220 usa tel: 412-391-7367 fax: 412-291-1015 this device is covered under one or more united states and corresponding international patents. qrg patent numbers can be found online at www.qprox.com. numerous further patents are pending, which may apply to this device or the applications thereof. the specifications set out in this document are subject to change without notice. all products sold and services supplied by qr g are subject to our terms and conditions of sale and supply of services which are available online at www.qprox.com and are supplied with every order acknowledgement. qrg trademarks can be found online at www.qprox.com. qrg pr oducts are not suitable for medical (including lifesaving equipment), safety or mission critical applications or other similar purposes. except as expressly set ou t in qrg's terms and conditions, no licenses to patents or other intellectual property of qrg (express or implied) are granted by qrg in connection with the sale of qrg products or provision of qrg services. qrg will not be liable for customer product design and customers are entirely responsible for their products and applications which incorporate qrg's products. development team: john dubery, alan bowens, matthew trend

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