View CXP845F60_8894274.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

description the CXP845F60 is a cmos 8-bit microcomputer integrating on a single chip an a/d converter, serial interface, timer/counter, time-base timer, capture timer/counter, pwm output and the like besides the basic configurations of 8-bit cpu, flash eeprom, ram and i/o port. the CXP845F60 also provides a sleep/stop functions that enable to execute the power-on reset function or lower the power consumption. the CXP845F60 is the flash eeprom-incorporated version of the cxp84540/84548 with a built-in mask rom. this enables program writing and erasing. thus, it is most suitable for evaluation use during system development and for small-quantity production. features ? a wide instruction set (213 instructions) which covers various types of data 16-bit arithmetic/multiplication and division/boolean bit operation instructions ? minimum instruction cycle 143ns at 28mhz operation (4.5 to 5.5v) ? incorporated flash eeprom 60k bytes rewrite time 100 times ? incorporated ram 1472 bytes ? peripheral functions a/d converter 8 bits, 8 channels, successive approximation method (conversion time of 1.93s at 28mhz) serial interface incorporated 8-bit, 8-stage fifo (auto transfer for 1 to 8 bytes, latch output function, msb/lsb first selectable), 1 channel 8-bit clock sync type, 1 channel timer 8-bit timer 8-bit timer/counter 19-bit time-base timer 16-bit capture time/counter pwm output 8 bits, 2 channels ? interruption 14 factors, 14 vectors, multi-interruption possible ? standby mode sleep/stop ? package 80-pin plastic qfp structure silicon gate cmos ic cmos 8-bit single chip microcomputer C 1 C e96906-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. CXP845F60 80 pin qfp (plastic)
C 2 C CXP845F60 block diagram 8 a n 0 t o a n 7 p w m 0 p w m 1 c s 0 s i 0 s o 0 s c k 0 s i 1 s o 1 s c k 1 t o c i n t e c 1 e c 0 a / d c o n v e r t e r a v s s a v r e f 8 b i t p w m g e n e r a t o r 0 s e r i a l i n t e r f a c e u n i t 0 f i f o s e r i a l i n t e r f a c e u n i t 1 8 b i t t i m e r / c o u n t e r 0 8 b i t t i m e r 1 1 6 b i t c a p t u r e t i m e r / c o u n t e r 2 i n t e r r u p t c o n t r o l l e r i n t 0 i n t 1 i n t 2 i n t 3 n m i s p c 7 0 0 c p u c o r e f l a s h e e p r o m 6 0 k b y t e s c l o c k g e n e r a t o r / s y s t e m c o n t r o l r a m 1 4 7 2 b y t e s p r e s c a l e r / t i m e - b a s e t i m e r e x t a l x t a l v d d v s s p o r t a 8 8 8 4 4 8 p a 0 t o p a 7 p b 0 t o p b 7 p c 0 t o p c 7 p d 0 t o p d 7 p e 0 t o p e 3 p e 4 t o p e 7 p f 0 t o p f 7 p g 0 t o p g 7 p i 0 t o p i 7 r s t 8 8 8 p o r t b p o r t c p o r t d p o r t e p o r t f p o r t g p o r t i p h 0 t o p h 7 8 p o r t h 2 2 l a t 0 8 b i t p w m g e n e r a t o r 1 p w e t e t a t e t b t e t c
C 3 C CXP845F60 pin assignment 1 (top view) 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 1 3 2 3 3 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 7 0 6 9 6 8 6 7 6 3 6 4 6 5 6 6 6 1 6 2 7 1 7 2 7 3 7 4 7 5 7 6 7 7 7 8 7 9 8 0 1 p e 1 / e c 1 p i 4 p i 3 / i n t 3 p i 2 / i n t 2 p i 1 / i n t 1 p i 0 / i n t 0 p e 5 / t o / p w m 1 / ( t e t a ) p e 4 / p w m 0 / ( t e t b ) p e 3 / n m i / ( t e t c ) p e 2 / c i n t p e 0 / e c 0 p b 7 / s o 1 p b 6 / s i 1 p b 5 / s c k 1 p b 4 / s o 0 p b 3 / s i 0 p b 2 / s c k 0 p b 1 / c s 0 p b 0 / l a t 0 p a 7 / a n 7 p a 6 / a n 6 p a 5 / a n 5 p a 4 / a n 4 p a 3 / a n 3 p h 3 p h 4 p h 5 p h 6 p h 7 r s t e x t a l x t a l v s s p e 6 p e 7 a v s s a v r e f p a 0 / a n 0 p a 1 / a n 1 p a 2 / a n 2 p f 3 p f 4 p f 5 p f 6 p f 7 p d 0 p d 1 p d 2 p d 3 p d 4 p d 5 p d 6 p d 7 p c 0 p c 1 p c 2 p c 3 p c 4 p c 5 p c 6 p c 7 p h 0 p h 1 p h 2 p f 2 p f 1 p f 0 p g 7 p g 6 p g 5 p g 4 p w e v d d p g 3 p g 2 p g 1 p g 0 p i 7 p i 6 p i 5 notes) 1. pwe (pin 73) is left open during normal operation. 2. see the appendix concerning the pins 57 to 59 (teta, tetb and tetc).
C 4 C CXP845F60 pin description symbol i/o description i/o/analog input pa0/an0 to pa7/an7 (port a) 8-bit i/o port. i/o can be set in a unit of single bits. incorporation of the pull-up resistor can be set through the software in a unit of 4 bits. (8 pins) analog inputs to a/d converter. (8 pins) i/o pc0 to pc7 (port c) 8-bit i/o port. i/o can be set in a unit of single bits. can drive 12ma sink current. incorporation of pull-up resistor can be set through the software in a unit of 4 bits. (8 pins) i/o pd0 to pd7 (port d) 8-bit i/o port. i/o can be set in a unit of single bits. incorporation of pull- up resistor can be set through the software in a unit of 4 bits. (8 pins) i/o pf0 to pf7 (port f) 8-bit i/o port. i/o can be set in a unit of single bits. incorporation of pull-up resistor can be set through the software in a unit of 4 bits. (8 pins) input/input input/input input/input input/input/ (input) output/output/ (input) output/output/ output/(input) output output pe0/ec0 pe1/ec1 pe2/cint pe3/nmi/ (tetc) pe4/pwm0/ (tetb) pe5/to/ pwm1/(teta) pe6 pe7 (port e) 8-bit port. lower 4 bits are for inputs; upper 4 bits are for outputs. (8 pins) external event inputs for timer/counter. (2 pins) capture trigger input. i/o/output i/o/input i/o/i/o i/o/input i/o/output i/o/i/o i/o/input i/o/output pb0/lat0 pb1/cs0 pb2/sck0 pb3/si0 pb4/so0 pb5/sck1 pb6/si1 pb7/so1 (port b) 8-bit i/o port. i/o can be set in a unit of single bits. incorporation of pull-up resistor can be set through the software in a unit of 4 bits. (8 pins) latch output for serial interface (ch0). chip select input for serial interface (ch0). serial clock i/o (ch0). serial data input (ch0). serial data output (ch0). serial clock i/o (ch1). serial data input (ch1). serial data output (ch1). control pins for flash eeprom write. (3 pins) non-maskable interruption request input. 8-bit pwm0 output. rectangular wave output for 16-bit timer/counter and 8-bit pwm1 output.
C 5 C CXP845F60 symbol i/o description i/o pg0 to pg7 (port g) 8-bit i/o port. i/o can be set in a unit of single bits. incorporation of pull- up resistor can be set through the software in a unit of 4 bits. (8 pins) i/o ph0 to ph7 (port h) 8-bit i/o port. i/o and standby release input function can be set in a unit of single bits. incorporation of pull-up resistor can be set through the software in a unit of 4 bits. (8 pins) i/o/input pi0/int0 to pi3/int3 i/o pi4 to pi7 input connects a crystal for system clock oscillation. when the clock is supplied externally, input to extal; opposite phase clock should be input to xtal. extal output xtal i/o system reset for active at low level. this pin is i/o pin, and outputs low level at the power on with the power-on reset function executed. rst flash eeprom write enable pin. write is enabled at low level; write is prohibited at high level. leave this pin open for normally operation. pwe input reference voltage input for a/d converter. av ref a/d converter gnd. avss positive power supply. v dd gnd vss (port i) 8-bit i/o port. i/o can be set in a unit of single bits. incorporation of pull-up resistor can be set through the software in a unit of 4 bits. (8 pins) external interruption request inputs. (4 pins) input
C 6 C CXP845F60 d a t a b u s r d ( p o r t b ) a a a a a a a a p o r t b d i r e c t i o n i p a a a a a a a a a a p o r t b d a t a a a a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t " 0 " w h e n r e s e t l a t 0 l a t c h o u t p u t e n a b l e * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * d a t a b u s r d ( p o r t b ) a a a a a a a a a a p o r t b d i r e c t i o n i p a a a a a a a a a a a a p o r t b d a t a a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t " 0 " w h e n r e s e t s c h m i t t i n p u t c s 0 s i 0 s i 1 * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * port b 8 pins hi-z hi-z when reset pa0/an0 to pa7/an7 pb0/lat0 port b 1 pin hi-z pb1/cs0 pb3/si0 pb6/si1 d a t a b u s r d ( p o r t a ) a a a a a a a a a a p o r t a d i r e c t i o n i p a a a a a p o r t a d a t a a a a a a a p u l l - u p r e s i s t o r a a a a a a p o r t a f u n c t i o n s e l e c t i o n i n p u t p r o t e c t i o n c i r c u i t " 0 " w h e n r e s e t " 0 " w h e n r e s e t " 0 " w h e n r e s e t i n p u t m u l t i p l e x e r a / d c o n v e r t e r * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * input/output circuit formats for pins port a pin circuit format 3 pins
C 7 C CXP845F60 d a t a b u s r d ( p o r t b ) a a i p a a a a a a a a a a p o r t b f u n c t i o n s e l e c t i o n " 0 " w h e n r e s e t a a a a a a p o r t b d a t a a a a a a a p o r t b d i r e c t i o n " 0 " w h e n r e s e t a a a a a a p u l l - u p r e s i s t o r s e r i a l d a t a o u t p u t e n a b l e s o * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * d a t a b u s r d ( p o r t c ) a a a a a a a a a a p o r t c d i r e c t i o n i p a a a a a a a a a a a a p o r t c d a t a a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t " 0 " w h e n r e s e t * 2 * 1 * 1 l a r g e c u r r e n t d r i v e 1 2 m a ( v d d = 4 . 5 t o 5 . 5 v ) * 2 p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) port b 2 pins hi-z hi-z pb2/sck0 pb5/sck1 pb4/so0 pb7/so1 port c 2 pins 8 pins hi-z pc0 to pc7 d a t a b u s r d ( p o r t b ) a a i p a a a a a a a a p o r t b f u n c t i o n s e l e c t i o n " 0 " w h e n r e s e t s c h m i t t i n p u t s c k 0 , s c k 1 i n a a a a a a a a p o r t b d a t a a a a a a a a a p o r t b d i r e c t i o n " 0 " w h e n r e s e t a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t s c k o u t s e r i a l c l o c k o u t p u t e n a b l e * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * port b when reset pin circuit format
C 8 C CXP845F60 a a a a a a a a a a a a a a a a a a a a a a a a a a a p o r t e d a t a " 1 " w h e n r e s e t p o r t e f u n c t i o n s e l e c t i o n ( l o w e r ) " 0 0 " w h e n r e s e t t o p o r t e f u n c t i o n s e l e c t i o n ( u p p e r ) p w m 1 a a a a a a a a a a a a a a a a m p x 0 0 0 1 1 x i n t e r n a l r e s e t s i g n a l t o o u t p u t e n a b l e * p u l l - u p t r a n s i s t o r a p p r o x . 1 5 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * ( t o f l a s h e e p r o m c i r c u i t ) high level high level at on resistance of pull-up transistor during a reset. 4 pins 1 pin pe0/ec0 pe1/ec1 pe2/cint pe3/nmi/ (tetc) pe4/pwm0/ (tetb) pe5/to/ pwm1/ (teta) 1 pin low level pe6, pe7 2 pins d a t a b u s r d ( p o r t e ) a a a a a a a a a a a a p o r t e d a t a " 0 " w h e n r e s e t a a a a i p a a a a s c h m i t t i n p u t r d ( p o r t e ) d a t a b u s e c 0 , e c 1 c i n t , n m i ( t o f l a s h e e p r o m c i r c u i t ) d a t a b u s a a a a a a a a a a a a p o r t e f u n c t i o n s e l e c t i o n p w m 0 a a a a a a a a p o r t e d a t a " 0 " w h e n r e s e t " 1 " w h e n r e s e t r d ( p o r t e ) ( t o f l a s h e e p r o m c i r c u i t ) port e port e port e port e hi-z high level when reset pin circuit format
C 9 C CXP845F60 28 pins pd0 to pd7 pf0 to pf7 pg0 to pg7 pi4 to pi7 a a a a i p a a a a a a a a a a a a a a p o r t s d , f , g , i d a t a " 0 " w h e n r e s e t a a a a a a a a a a a a p o r t s d , f , g , i d i r e c t i o n a a a a a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t r d d a t a b u s * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * port i 8 pins hi-z ph0 to ph7 d a t a b u s r d ( p o r t h ) a a a a a a a a a a p o r t h d i r e c t i o n i p a a a a a a a a a a a a p o r t h d a t a a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t " 0 " w h e n r e s e t s t a n d b y r e l e a s e a a e d g e d e t e c t i o n * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * port h 4 pins hi-z pi0/int0 to pi3/int3 port d port f port g port i hi-z d a t a b u s a a a a i p a a a a a a a a a a p o r t i d a t a " 0 " w h e n r e s e t * p u l l - u p t r a n s i s t o r a p p r o x . 1 0 0 k w ( v d d = 4 . 5 t o 5 . 5 v ) * a a a a a a a a p o r t i d i r e c t i o n a a a a a a a a p u l l - u p r e s i s t o r " 0 " w h e n r e s e t i n t 0 i n t 1 i n t 2 i n t 3 r d s c h m i t t i n p u t when reset pin circuit format
C 10 C CXP845F60 2 pins oscillation extal xtal 1 pin rst low level a a a a a a i p a a a a e x t a l x t a l d i a g r a m s h o w s t h e c i r c u i t c o m p o s i t i o n d u r i n g o s c i l l a t i o n . f e e d b a c k r e s i s t o r i s r e m o v e d d u r i n g s t o p m o d e a n d x t a l b e c o m e s h i g h l e v e l . a a a a i p a a s c h m i t t i n p u t p u l l - u p r e s i s t o r a a i p f r o m p o w e r - o n r e s e t c i r c u i t when reset pin circuit format 1 pin pwe high level a a p u l l - u p r e s i s t o r a a i p t o f l a s h e e p r o m c i r c u i t
C 11 C CXP845F60 * 1 v in and v out must not exceed v dd + 0.3v. * 2 the large current drive transistor is the n-ch transistor of port c (pc). note) usage exceeding absolute maximum ratings may permanently impair the lsi. normal operation should be conducted under the recommended operating conditions. exceeding these conditions may adversely affect the reliability of the lsi. input voltage output voltage high level output current high level total output current low level total output current operating temperature storage temperature allowable power dissipation v dd av ss v in v out i oh i oh i ol i olc i ol topr tstg p d supply voltage low level output current C0.3 to +7.0 C0.3 to +0.3 C0.3 to +7.0 * 1 C0.3 to +7.0 * 1 C5 C50 15 20 100 C20 to +75 C55 to +150 600 v v v v ma ma ma ma ma c c mw output (value per pin) total for all output pins all pins excluding large current outputs (value per pin) large current outputs (value per pin * 2 ) total for all output pins item symbol ratings unit remarks absolute maximum ratings (vss = 0v reference) high level input voltage low level input voltage operating temperature supply voltage 5.5 5.5 5.5 v dd v dd v dd + 0.3 0.3v dd 0.2v dd +0.4 +75 v v v v v v c v item symbol min. max. unit remarks 4.5 3.5 2.0 0.7v dd 0.8v dd v dd C 0.4 0 0 C0.3 C20 v ih v ihs v ihex v il v ils v ilex topr guaranteed operation range for 1/2 and 1/4 frequency dividing modes guaranteed operation range for 1/16 frequency dividing and sleep modes guaranteed data hold range during stop mode * 1 hysteresis input * 2 extal * 3 * 1 hysteresis input * 2 extal * 3 v dd * 1 normal input ports (pa, pb0, pb4, pb7, pc, pe0 to pe3, pd, pf to ph, pi4 to pi7) * 2 rst, cint, cs0, sck0, sck1, ec0, ec1, si0, si1, nmi, int0, int1, int2, int3 * 3 specifies only during external clock input. recommended operating conditions (vss = 0v reference)
C 12 C CXP845F60 electrical characteristics dc characteristics (v dd = 4.5 to 5.5v) (ta = C20 to +75 c, vss = 0v reference) v dd = 4.5v, i oh = C0.5ma v dd = 4.5v, i oh = C1.2ma v dd = 4.5v, i ol = 1.8ma v dd = 4.5v, i ol = 3.6ma v dd = 4.5v, i ol = 12.0ma v dd = 5.5v, v ih = 5.5v v dd = 5.5v, v il = 0.4v v dd = 5.5v, v il = 4.0v high level output voltage 4.0 3.5 0.1 C0.1 C1.5 C2.78 v v v v v a a a a a a pc pa to pd, pe4 to pe7, pf to pi, rst (only v ol ) extal rst pa to pd * 1 pf to pi * 1 item symbol pin conditions min. clock 1mhz 0v for all pins excluding measured pins v dd i dd1 i iz i dd2 i dds1 i dds2 i dds3 c in v oh v ol i ihe i ile i ilr i il low level output voltage input current typ. 0.4 0.6 1.5 25 C25 C400 C50 10 max. unit * 1 for pa to pd and pf to pi pins, specifies the input current when pull-up resistance is selected; leakage current when no resistance is selected. * 2 when all output pins are left open. v dd = 5.5v, 28mhz crystal oscillation (c 1 = c 2 = 1pf) sleep mode supply current * 2 input capacity v dd = 4.5v, v il = 4.0v v dd = 5.5v, v i = 0, 5.5v for 1/2 frequency dividing mode i/o leakage current pa to pd * 1 pf to pi * 1 pe0 to pe3 38 2.5 10 66 10 30 20 ma ma a pf v dd = 5.5v, 28mhz crystal oscillation (c 1 = c 2 = 1pf) stop mode v dd = 5.5v, termination of 28mhz crystal oscillation pa to pd, pe0 to pe3, pf to pi, extal, rst
C 13 C CXP845F60 * 1 t sys indicates the three values according to the contents of the clock control register (clc: 00feh) upper 2 bits (cpu clock selection). t sys [ns] = 2000/fc (upper 2 bits = "00"), 4000/fc (upper 2 bits = "01"), 16000/fc (upper 2 bits = "11") e x t a l t x h t x l t c f t c r 0 . 4 v v d d 0 . 4 v 1 / f c a a a a a a a a a a a a a a a a a a a a a a a a a a a c r y s t a l o s c i l l a t i o n c e r a m i c o s c i l l a t i o n e x t a l x t a l e x t e r n a l c l o c k e x t a l x t a l 7 4 h c 0 4 c 1 c 2 ac characteristics (1) clock timing system clock frequency system clock input pulse width system clock input rise time, fall time event count input clock pulse width event count input clock rise time, fall time f c t xl , t xh t cr , t cf t eh , t el t er , t ef xtal extal extal extal ec0 ec1 ec0 ec1 mhz ns ns ns ms item symbol pin conditions min. unit fig. 1, fig. 2 fig. 1, fig. 2 external clock drive fig. 1, fig. 2 external clock drive fig. 3 fig. 3 1 15.6 t sys + 50 * 1 typ. max. 28 100 20 (ta = C20 to +75 c, v dd = 4.5 to 5.5v, vss = 0v reference) fig. 2. clock applied conditions fig. 1. clock timing t e h t e l t e f t e r 0 . 2 v d d 0 . 8 v d d t t h t t l t t f t t r e c 0 e c 1 fig. 3. event count clock timing
C 14 C CXP845F60 chip select transfer mode (sck0 = output mode) chip select transfer mode (sck0 = output mode) chip select transfer mode chip select transfer mode chip select transfer mode note 1) t sys indicates the three values according to the contents of the clock control register (clc: 00feh) upper 2 bits (cpu clock selection). t sys [ns] = 2000/fc (upper 2 bits = "00"), 4000/fc (upper 2 bits = "01"), 16000/fc (upper 2 bits = "11") note 2) the load condition for the sck0 output mode, so0 output delay time is 50pf + 1ttl. (2) serial transfer (ch0) (ta = C20 to +75 c, v dd = 4.5 to 5.5v, vss = 0v reference) item cs0 ? sck0 delay time cs0 - ? sck0 float delay time cs0 ? so0 delay time cs0 - ? so0 float delay time cs0 high level width sck0 cycle time sck0 high, low level width si0 input setup time (for sck0 - ) si0 input hold time (for sck0 - ) sck0 ? so0 delay time t dcsk t dcskf t dcso t dcsof t whcs t kcy t kh t kl t sik t ksi t kso t ladly t lapls sck0 sck0 so0 so0 cs0 sck0 sck0 si0 si0 so0 lat0 lat0 input mode output mode input mode output mode sck0 input mode sck0 output mode sck0 input mode sck0 output mode sck0 input mode sck0 output mode latch output mode (sck0 = output mode) latch output mode (sck0 = output mode) ns ns ns ns ns symbol pin min. 1.5 t sys + 100 1.5 t sys + 100 1.5 t sys + 100 1.5 t sys + 100 t sys + 150 2 t sys + 200 8000/fc t sys + 90 4000/fc C 25 50 100 t sys + 100 50 t kcy t kcy C 10 ns ns ns ns ns ns ns ns ns ns ns ns t sys + 100 50 t kcy + 50 t kcy + 50 max. unit conditions sck0 - ? lat0 output delay time lat0 data pulse width
C 15 C CXP845F60 s c k 0 0 . 2 v d d 0 . 8 v d d t w h c s t d c s k t d c s k f 0 . 8 v d d 0 . 2 v d d 0 . 8 v d d t k c y t k l t k h 0 . 8 v d d 0 . 2 v d d s i 0 t s i k i n p u t d a t a t d c s o t k s o t d c s o f o u t p u t d a t a 0 . 8 v d d 0 . 2 v d d s o 0 c s 0 t k s i t l a p l s l a t 0 t l a d l y 0 . 8 v d d 0 . 8 v d d 0 . 8 v d d fig. 4. serial transfer ch0 timing
C 16 C CXP845F60 (3) serial transfer (ch1) (ta = C20 to +75 c, v dd = 4.5 to 5.5v, v ss = 0v reference) item sck1 cycle time t kcy sck1 input mode output mode input mode output mode sck1 input mode sck1 output mode sck1 input mode sck1 output mode sck1 input mode sck1 output mode 500 8000/fc 200 4000/fc C 25 50 100 100 50 100 50 ns ns ns ns ns ns ns ns ns ns sck1 si1 si1 so1 t kh t kl t sik t ksi t kso sck1 high, low level width si1 input setup time (for sck1 - ) si1 input hold time (for sck1 - ) sck1 ? so1 delay time symbol pin conditions min. max. unit note) the load condition for the sck1 output mode, so1 output delay time is 50pf + 1ttl. 0 . 2 v d d 0 . 8 v d d t k l t k h s o 1 t k c y t s i k t k s i 0 . 2 v d d 0 . 8 v d d t k s o 0 . 2 v d d 0 . 8 v d d o u t p u t d a t a i n p u t d a t a s i 1 s c k 1 fig. 5. serial transfer ch1 timing
C 17 C CXP845F60 conversion time sampling time reference input voltage analog input voltage t conv t samp v ref v ian v zt * 1 v ft * 2 i ref av ref an0 to an7 ta = 25 c v dd = av ref = 5.0v v ss = av ss = 0v operation mode sleep mode stop mode linearity error zero transition voltage full-scale transition voltage resolution av ref current av ref i refs s s v v v dd av ref 1.0 ma 10 a 0.6 27/f adc * 3 6/f adc * 3 v dd C 0.5 0 item symbol pin conditions min. typ. max. unit bits (4) a/d converter characteristics (ta = C20 to +75 c, v dd = 4.5 to 5.5v, av ref = 4.0 to v dd , vss = av ss = 0v reference) 8 lsb 70 mv 5030 10 4970 C10 4910 mv 4 a n a l o g i n p u t l i n e a r i t y e r r o r v f t v z t 0 0 h 0 1 h f e h f f h d i g i t a l c o n v e r s i o n v a l u e * 1 v zt : value at which the digital conversion value changes from 00 h to 01 h and vice versa. * 2 v ft : value at which the digital conversion value changes from fe h to ff h and vice versa. * 3 f adc indicates the values below due to the contents of bit 6 (cks) of the a/d control register (adc: 00f9 h ). f adc = fc (cks = "0"), fc/2 (cks = "1") however, the selection for f adc = fc (cks = "0") is limited in the clock range of fc = 1 to 14mhz (v dd = 4.5 to 5.5v). fig. 6. definition of a/d converter terms
C 18 C CXP845F60 external interruption high, low level width reset input low level width int0 int1 int2 int3 nmi rst 1 32/fc s s item symbol pin conditions min. max. unit t ih t il t rsl (5) interruption, reset input (ta = C20 to +75 c, v dd = 4.5 to 5.5v, vss = 0v reference) 0 . 2 v d d 0 . 8 v d d t i h t i l i n t 0 i n t 1 i n t 2 i n t 3 n m i ( s p e c i f i e s n m i o n l y f o r t h e f a l l i n g e d g e . ) t i l t i h 0 . 2 v d d 0 . 8 v d d fig 7. interruption input timing t r s l 0 . 2 v d d r s t fig. 8. rst input timing power supply rise time power supply cut-off time v dd 0.05 1 50 ms ms item symbol pin conditions min. max. unit t r t off power-on reset repetitive power-on reset (6) power-on reset (ta = C20 to +75 c, v dd = 4.5 to 5.5v, v ss = 0v reference) v d d t r t o f f 0 . 2 v 0 . 2 v 4 . 5 v t u r n t h e p o w e r o n s m o o t h l y . fig. 9. power-on reset
C 19 C CXP845F60 appendix c 1 a a a a a a a a a a a a e x t a l x t a l c 2 r d a a a a a a a a a a a a e x t a l x t a l ( i ) m a i n c l o c k a a a a a a a a a a a a e x t a l x t a l c 1 c 2 r d ( i i ) m a i n c l o c k * 1 models with the built-in ground capacitance (c 1 , c 2 ). manufacturer murata mfg co., ltd. tdk corporation. kinseki ltd. model csa8.00mtz csa10.0mtz csa12.00mtz cst8.00mtw * 1 cst10.0mt * 1 cst12.0mtw * 1 csa16.00mxz040 cst16.00mxz0c1 * 1 csa20.00mxz040 csa24.00mxz040 csa28.00mxz040 ccr20.0mc6 * 1 ccr24.0mc6 * 1 hc49/u-s cx-11f fc (mhz) 8.00 10.00 12.00 8.00 10.00 12.00 16.00 16.00 20.00 24.00 28.00 20.00 24.00 28.00 28.00 30 5 5 open 3 3 16 16 1 1 30 5 5 open 3 3 16 16 1 1 0 0 0 0 0 0 0 0 220 220 c 1 (pf) c 2 (pf) rd ( ) circuit example (i) (ii) (i) (ii) (i) (ii) (i) selection guide CXP845F60q-1- fig. 10. spc700 series recommended oscillation circuit mask package rom capacitance reset pin pull-up resistor power-on reset circuit existent/non-existent 100-pin plastic qfp 40k bytes 48k bytes flash eeprom 60k bytes existent/non-existent existent existent option item 100-pin plastic qfp
C 20 C CXP845F60 characteristics curves 1 0 . 0 1 ( 1 0 a ) 2 3 4 5 6 7 8 9 0 . 1 ( 1 0 0 a ) 0 . 5 ( 5 0 0 a ) 1 1 0 2 0 3 0 4 0 i d d v s . v d d i d d s u p p l y c u r r e n t [ m a ] ( f c = 2 8 m h z , t a = 2 5 ? c , t y p i c a l ) i d d v s . f c ( v d d = 5 v , t a = 2 5 ? c , t y p i c a l ) 4 0 0 1 0 2 0 3 0 5 0 2 0 3 0 1 0 0 f c s y s t e m c l o c k [ m h z ] v d d s u p p l y v o l t a g e [ v ] i d d s u p p l y c u r r e n t [ m a ] s t o p m o d e s l e e p m o d e 1 / 2 d i v i d i n g m o d e 1 / 4 d i v i d i n g m o d e 1 / 1 6 d i v i d i n g m o d e 1 / 2 d i v i d i n g m o d e 1 / 4 d i v i d i n g m o d e 1 / 1 6 d i v i d i n g m o d e s l e e p m o d e
C 21 C CXP845F60 writing to flash eeprom the CXP845F60 contains the 60k bytes of flash eeprom. there are two methods to write to the flash eeprom; off-board write and on-board write. the on-board write supports boot mode and user programming mode. rewriting at the room temperature is recommended. 1. off-board write in order to execute the off-board write, the microcomputer is attached on a conversion adaptor and the adaptor is inserted in the socket of the sfp-1 (flash memory programmer) or nice-spc700r. (see fig. 11.) see the operation manuals for the operation methods of the sfp-1 and nice-spc700r. (mitec systems, inc. manufactures and sells the sfp-1 and nice-spc700r.) c o n v e r s i o n a d a p t o r f l a s h m e m o r y p r o g r a m m e r s f p - 1 fig. 11. off-board write (when writing by using sfp-1) 2. on-board write this is performed with the microcomputer mounted on the board. the CXP845F60 supports boot mode and user programming mode. in boot mode, write is performed through the communication with the sfp-1 as shown in fig. 12. u s e r b o a r d c x p 8 4 5 f 6 0 s i o c o m m u n i c a t i o n c a b l e ( 8 p i n s ) f l a s h m e m o r y p r o g r a m m e r s f p - 1 in user programming mode, write is performed in microcomputer mode (normal operation mode) by the communication method (sio, i/o, etc.) according to the user's application. see the guide of the CXP845F60 write for actual use. fig. 12. on-board write boot mode
C 22 C CXP845F60 when the on-board write is performed, the pins and flash mode register (fmod: 01f4h, 0ff0h) should be set as follows. rst pins mode boot mode teta low fixed tetb high output tetc high fixed pwe low fixed s o 1 s i 1 s c k 1 r s t v s s v d d t e t c t e t b t e t a w h e n n o r m a l o p e r a t i o n s w i t c h i n g c i r c u i t i n b o o t m o d e r e s e t c i r c u i t u s e r c i r c u i t w h e n n o r m a l o p e r a t i o n s w i t c h i n g c i r c u i t i n b o o t m o d e s w i t c h e d t o b o o t m o d e f o r l o w l e v e l s w i t c h e d t o b o o t m o d e f o r l o w l e v e l c u t o f f t h e c o n n e c t i o n t o o t h e r c i r c u i t s d u r i n g t h e f l a s h e e p r o m r e w r i t e . * 1 a m p c t c o n n e c t o r 1 7 5 4 8 9 - 8 a m p c t r e c e p t a c l e 1 7 3 9 7 7 - 8 v s s s o 1 s i 1 s c k 1 r s t v d d v s s s e l g n d s i s o s c k r e s v i n g n d v p p f l a s h m c u p w e fig. 13. connection example for boot mode 1 2 3 4 5 6 7 8 4.7k pull-up open drain, 4.7k pull-up open drain, 4.7k pull-up open drain, 4.7k pull-up 4.7k pull-up gnd si so sck rst vin gnd vpp connector for sfp-1 (amp ct receptacle 173977-8) symbol remarks connector for user board (amp ct connector 175489-8) ? ? ? ? ? ? ? gnd so1 si1 sck1 rst v dd gnd pwe remarks pull-up in the microcomputer (mask option) pull-up in the microcomputer pin no. signal direction symbol * 1 the vpp signal for the sfp-1 is pulled down with 4.7k . connecting cable permits writing when pwe pin is fixed at low level. also, it can be used as select signal of the switching circuit. * 1 flmod bit is set to "1" automatically in boot mode. fmod resister flmod bit 1 * 1 1 user programming mode on- board write high level x x x x: don't care
C 23 C CXP845F60 package outline unit: mm p a c k a g e s t r u c t u r e s o n y c o d e e i a j c o d e j e d e c c o d e q f p - 8 0 p - l 0 1 * q f p 0 8 0 - p - 1 4 2 0 - a p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e w e i g h t e p o x y r e s i n s o l d e r p l a t i n g c o p p e r / 4 2 a l l o y 1 . 6 g 2 3 . 9 0 . 4 2 0 . 0 0 . 1 + 0 . 4 1 8 0 6 5 6 4 4 1 4 0 2 5 2 4 0 . 8 0 . 3 5 0 . 1 + 0 . 1 5 1 4 . 0 0 . 1 + 0 . 4 1 7 . 9 0 . 4 1 6 . 3 0 . 1 0 . 0 5 + 0 . 2 2 . 7 5 0 . 1 5 + 0 . 3 5 0 . 8 0 . 2 0 . 1 5 0 . 0 5 + 0 . 1 8 0 p i n q f p ( p l a s t i c ) m 0 . 1 2 0 . 1 5 0 t o 1 0 d e t a i l a a

▲Up To Search▲

Price & Availability of CXP845F60

	To Download CXP845F60 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .