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  may 2015 docid026788 rev 3 1 / 18 this is information on a product in full production. www.st.com STP7N65M2, stu7n65m2 n - channel 650 v, 0.98 typ., 5 a mdmesh? m2 power mosfets in to - 220 and ipak packages datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max i d STP7N65M2 650 v 1.15 5 a stu7n65m2 650 v 1.15 5 a ? extremely low gate charge ? excellent output capacitance (c oss ) profile ? 100% avalanche tested ? zener - protected applications ? switching applications description these devices are n - channel power mosfets developed using the mdmesh? m2 technology. thanks to the strip layout associated with an improved vertical structure, the device exhibi ts both low on - resistance and optimized switching characteristics. it is therefore suitable for the most demanding high efficiency converters. table 1: device summary order c ode marking package packaging STP7N65M2 7n65m2 to - 220 tube stu7n65m2 7n65m2 ipak tube d(2, t ab) g(1) s(3) am01476v1_tab 3 2 1 t ab i p a k 1 2 3 t ab t o - 2 2 0
contents STP7N65M2, stu7n65m2 2 / 18 docid026788 rev 3 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 9 4 package information ................................ ................................ ..... 10 4.1 to - 220 type a package information ................................ ................ 11 4.2 ipak(to - 251 ) type a package information ................................ ..... 13 4.3 ipak (to - 251) type c package information ................................ .... 15 5 revision history ................................ ................................ ............ 17
STP7N65M2, stu7n65m2 elect rical ratings docid026788 rev 3 3 / 18 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v gs gate - source voltage 25 v i d drain current (continuous) at t c = 25 c 5 a i d drain current (continuous) at t c = 100 c 3.2 a i dm (1) drain current (pulsed) 20 a p tot total dissipation at t c = 25 c 60 w dv/dt (2) peak diode recovery voltage slope 15 v/ns dv/dt (3) mosfet dv/dt ruggedness 50 t stg storage temperature - 55 to 150 c t j operating junction temperature notes: (1) pulse width limited by safe operating area (2) i sd 5 a, di/dt 400 a/s; v dspeak < v (br)dss , v dd =400 v (3) v ds 520 v table 3: thermal data symbol parameter value unit to - 220 ipak r thj - case thermal resistance junction - case max 2.08 c/w r thj - amb thermal resistance junction - ambient max 62.5 100 c/w table 4: avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not repetitive (pulse width limited by t jmax ) 1 a e as single pulse avalanche energy (starting t j =25c, i d = i ar ; v dd =50 v) 103 mj
electrical characteristics STP7N65M2, stu7n65m2 4 / 18 docid026788 rev 3 2 electrical characteristics (t c = 25 c unless otherwise specified) table 5: on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0, i d = 1 ma 650 v i dss zero gate voltage drain current v gs = 0, v ds = 650 v 1 a v gs = 0, v ds = 650 v, t c =125 c 100 a i gss gate - body leakage current v ds = 0, v gs = 25 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 2.5 a 0.98 1.15 table 6: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 100 v, f = 1 mhz, v gs = 0 - 270 - pf c oss output capacitance - 14.5 - c rss reverse transfer capacitance - 0.8 - c oss eq. (1) equivalent output capacitance v ds = 0 to 520 v, v gs = 0 - 108 - pf r g intrinsic gate resistance f = 1 mhz open drain - 7 - q g total gate charge v dd = 520 v, i d = 5 a, v gs = 10 v (see figure 17: "gate charge test circuit" ) - 9 - nc q gs gate - source charge - 2.3 - nc q gd gate - drain charge - 4.3 - nc notes: (1) c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss table 7: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 325 v, i d = 2.5 a, r g = 4.7 , v gs = 10 v (see figure 16: "switching times test circuit for resistive load" and figure 21: "switching time waveform" ) - 8 - ns t r rise time - 20 - ns t d(off) turn - off delay time - 30 - ns t f fall time - 20 - ns
STP7N65M2, stu7n65m2 electrical characteristics docid026788 rev 3 5 / 18 table 8: source drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 5 a i sdm (1) source - drain current (pulsed) - 20 a v sd (2) forward on voltage i sd = 5 a, v gs = 0 - 1.6 v t rr reverse recovery time i sd = 5 a, di/dt = 100 a/s v dd = 60 v (see figure 21: "switching time waveform" ) - 275 ns q rr reverse recovery charge - 1.62 c i rrm reverse recovery current - 11.8 a t rr reverse recovery time i sd = 5 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c (see figure 21: "switching time waveform" ) - 430 ns q rr reverse recovery charge - 2.54 c i rrm reverse recovery current - 11.9 a notes: (1) pulse width limited by safe operating area. (2) pulsed: pulse duration = 300 s, duty cycle 1.5%
electrical characteristics STP7N65M2, stu7n65m2 6 / 18 docid026788 rev 3 2.1 electrical characteristics (curves) figure 2 : safe operating area for to - 220 figure 3 : thermal impedance for to - 220 figure 4 : safe operating area for ipak figure 5 : thermal impedance for ipak figure 6 : output characteristics figure 7 : transfer characteristics k cg34360 c 10 -4 10 -3 10 -2 10 -1 t p (s) 10 -5 10 -1 10 -2 10 0
STP7N65M2, stu7n65m2 electrical ch aracteristics docid026788 rev 3 7 / 18 figure 8 : gate charge vs gate - source voltage figure 9 : static drain - source on - resistance figure 10 : capacitance variations figure 11 : output capacitance stored energy figure 12 : normalized gate threshold voltage vs temperature figure 13 : normalized on - resistance vs temperature
electrical characteristics STP7N65M2, stu7n65m2 8 / 18 docid026788 rev 3 figure 14 : source - drain diode forward characteristics figure 15 : normalized v(br)dss vs temperature
STP7N65M2, stu7n65m2 test circuits docid026788 rev 3 9 / 18 3 test circuits figure 16 : switching times test circuit for resistive load figure 17 : gate charge test circuit figure 18 : test circuit for inductive load switching and diode recovery times figure 19 : u nclamped inductive load test circuit figure 20 : unclamped inductive waveform figure 21 : switching time waveform
package information STP7N65M2, stu7n65m2 10 / 18 docid026788 rev 3 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? speci fications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
STP7N65M2, stu7n65m2 package information docid026788 rev 3 11 / 18 4.1 to - 220 type a package information figure 22 : to - 220 type a package outline
package information STP7N65M2, stu7n65m2 12 / 18 docid026788 rev 3 table 9: to - 220 type a mechanical data dim. mm min. typ. max. a 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 d 15.25 15.75 d1 1.27 e 10 10.40 e 2.40 2.70 e1 4.95 5.15 f 1.23 1.32 h1 6.20 6.60 j1 2.40 2.72 l 13 14 l1 3.50 3.93 l20 16.40 l30 28.90 ?p 3.75 3.85 q 2.65 2.95
STP7N65M2, stu7n65m2 package information docid026788 rev 3 13 / 18 4.2 ipak(to - 251) type a package information figure 23 : ipak (to - 251) type a package outline
package information STP7N65M2, stu7n65m2 14 / 18 docid026788 rev 3 table 10: ipak (to - 251) type a package mechanical data dim. mm min. typ. max. a 2.20 2.40 a1 0.90 1.10 b 0.64 0.90 b2 0.95 b4 5.20 5.40 b5 0.30 c 0.45 0.60 c2 0.48 0.60 d 6.00 6.20 e 6.40 6.60 e 2.28 e1 4.40 4.60 h 16.10 l 9.00 9.40 l1 0.80 1.20 l2 0.80 1.00 v1 10
STP7N65M2, stu7n65m2 package information docid026788 rev 3 15 / 18 4.3 ipak (to - 251) type c package information figure 24 : ipak (to - 251) type c package outline 0068771_ik_typec_rev13
package information STP7N65M2, stu7n65m2 16 / 18 docid026788 rev 3 table 11: ipak (to - 251) type c package mechanical data dim. mm min. typ. max. a 2.20 2.30 2.35 a1 0.90 1.00 1.10 b 0.66 0.79 b2 0.90 b4 5.23 5.33 5.43 c 0.46 0.59 c2 0.46 0.59 d 6.00 6.10 6.20 d1 5.20 5.37 5.55 e 6.50 6.60 6.70 e1 4.60 4.78 4.95 e 2.20 2.25 2.30 e1 4.40 4.50 4.60 h 16.18 16.48 16.78 l 9.00 9.30 9.60 l1 0.90 1.00 1.20 l2 0.90 1.08 1.25 ? 1 3 5 7 ? 2 1 3 5
STP7N65M2, stu7n65m2 revision history docid026788 rev 3 17 / 18 5 revision history table 12: document revision history date revision changes 07 - aug - 2014 1 first release. 09 - oct - 2014 2 added and . updated not found. minor text changes. 28 - may - 2015 3 document status promoted form preliminary to production data. updated package information.
STP7N65M2, stu7n65m2 18 / 18 docid026788 rev 3 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers s hould obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, select ion, and use of st products and st assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved


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