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is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 1 dual 2.6w stereo audio amplifier january 2014 general description the is31ap4088d is a dual bridge-connected audio power amplifier which, when connected to a 5v supply, will deliver 2.6w to a 4 ? load. the is31ap4088d features a low-power consumption shutdown mode and thermal shutdown protection. it also utilizes circuitry to reduce ?clicks-and-pop? during device turn-on. applications ? cell phones, pda, mp4,pmp ? portable and desktop computers ? desktops audio system ? multimedia monitors key specifications ? p o at 1% thd+n, v cc = 5v r l = 4 ? ----------------------- 2.1w (typ.) r l = 8 ? ----------------------- 1.3w (typ.) ? p o at 10% thd+n, v cc = 5v r l = 4 ? ----------------------- 2.6w (typ.) r l = 8 ? ----------------------- 1.6w (typ.) ? p o at 1% thd+n, v cc = 4v r l = 4 ? ----------------------- 1.4w (typ.) r l = 8 ? ----------------------- 0.81w (typ.) ? shutdown current ----------------------- 0.1 a (typ.) ? supply voltage range -------- ------------ 2.7v ~ 5.5v ? qfn-16 (4mm 4mm) package features ? suppress ?click-and-pop? ? thermal shutdown protection circuitry ? micro power shutdown mode typical application circuit figure 1 typical audio amplifier application circuit
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 2 pin configuration package pin configuration (top view) qfn-16 1 2 3 4 12 11 10 9 outa+ vcc outa- ina outb+ vcc outb- bypass pin description no. pin description 1 outa+ left channel +output. 2,11 vcc supply voltage. 3 outa- left channel ?output. 4 ina left channel input. 5~7,13,14,16 gnd ground. 8 inb right channel input. 9 bypass bypass capacitor which provides the common mode voltage. 10 outb- right channel ?output. 12 outb+ right channel +output. 15 sdb shut down control, hold low for shutdown mode. thermal pad connect to gnd.
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 3 ordering information industrial range: -40c to +85c order part no. package qty/reel IS31AP4088D-QFLS2-TR qfn-16, lead-free 2500 copyright ? ? ? 2014 ? integrated ? silicon ? solution, ? inc. ? all ? rights ? reserved. ? issi ? reserves ? the ? right ? to ? make ? changes ? to ? this ? specification ? and ? its ? products ? at ? any ? time ? without ? notice. ? issi ? assumes ? no ? liability ? arising ? out ? of ? the ? application ? or ? use ? of ? any ? information, ? products ? or ? services ? described ? herein. ? customers ? are ? advised ? to ? obtain ? the ? latest ? version ? of ? this ? device ? specification ? before ? relying ? on ? any ? published ? information ? and ? before ? placing ? orders ? for ? products. ? integrated ? silicon ? solution, ? inc. ? does ? not ? recommend ? the ? use ? of ? any ? of ? its ? products ? in ? life ? support ? applications ? where ? the ? failure ? or ? malfunction ? of ? the ? product ? can ? reasonably ? be ? expected ? to ? cause ? failure ? of ? the ? life ? support ? system ? or ? to ? significantly ? affect ? its ? safety ? or ? effectiveness. ? products ? are ? not ? authorized ? for ? use ? in ? such ? applications ? unless ? integrated ? silicon ? solution, ? inc. ? receives ? written ? assurance ? to ? its ? satisfaction, ? that: ? a.) ? the ? risk ? of ? injury ? or ? damage ? has ? been ? minimized; ? b.) ? the ? user ? assume ? all ? such ? risks; ? and ? c.) ? potential ? liability ? of ? integrated ? silicon ? solution, ? inc ? is ? adequately ? protected ? under ? the ? circumstances
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 4 absolute maximum ratings supply voltage, v cc - 0.3v ~ +6.0v voltage at any input pin - 0.3v ~ v cc +0.3v maximum junction temperature, t jmax 150c storage temperature range, t stg - 65c ~ +150c operating temperature range, t a ? 40c ~ +85c esd (hbm) esd (cdm) 1kv 1kv note: stresses beyond those listed under ?absolute ma ximum ratings? may cause permanent damage to the device. these are stress rating s only and functional operation of the device at these or any other condition beyond those indicat ed in the operational sections of the sp ecifications is not implied. exposure to absolute maximu m rating conditions for extended peri ods may affect device reliability. electrical characteristics the following specifications apply for v cc = 5v, unless otherwise noted. limits apply for t a = 25c. symbol parameter condition min. typ. max. unit v cc supply voltage 2.7 5.5 v i cc quiescent power supply current v in = 0v, i o = 0a 4.5 10.5 ma i sd shutdown current gnd applied to the shutdown pin 0.1 2.5 a v ih shutdown input voltage high 1.4 v v il shutdown input voltage low 0.4 v t wu turn on time c bypass = 1 f 120 ms electrical characte ristics operation the following specifications apply for v cc = 5v, unless otherwise noted. limits apply for t a = 25c. symbol parameter condition min. typ. max. unit v os output offset voltage v in = 0v 5 25 mv p o output power thd+n = 1%, f = 1khz, r l = 8 ? 1.15 1.3 w thd+n = 10%, f = 1khz, r l = 8 ? 1.45 1.6 w thd+n = 1%, f = 1khz, r l = 4 ? 1.95 2.1 w thd+n = 10%, f = 1khz, r l = 4 ? 2.45 2.6 w thd+n total harmonic distortion +noise f = 1khz, a v = 2, r l = 8 ? , p o = 1w 0.1 % psrr power supply rejection ratio input floating, 217hz, v ripple = 200mv p-p c bypass = 1 f, r l = 8 ? 80 db input floating 1khz, v ripple = 200mv p-p c bypass = 1 f, r l = 8 ? 70 db input gnd 217hz, v ripple = 200mv p-p c bypass = 1 f, r l =8 ? 60 db input gnd 1khz v ripple = 200mv p-p c bypass = 1 f, r l = 8 ? 60 db x ta l k channel separation f = 1khz, c bypass = 1 f -100 db v no output noise voltage 1khz, a-weighted 7 v
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 5 electrical characteristics the following specifications apply for v cc = 3v, unless otherwise noted. limits apply for t a = 25c. symbol parameter condition min. typ. max. unit i cc quiescent power supply current v in = 0v, i o = 0a 3.8 ma i sd shutdown current gnd applied to the shutdown pin 0.1 a v ih shutdown input voltage high 1.1 v v il shutdown input voltage low 0.4 v t wu turn on time c bypass = 1 f 110 ms electrical characte ristics operation the following specifications apply for v cc = 3v, unless otherwise noted. limits apply for t a = 25c. symbol parameter condition min. typ. max. unit v os output offset voltage v in = 0v 2.5 mv po output power thd+n = 1%, f = 1khz, r l = 8 ? 0.45 w thd+n = 10%, f = 1khz, r l = 8 ? 0.56 w thd+n = 1%, f = 1khz, r l = 4 ? 0.74 w thd+n = 10%, f = 1khz, r l = 4 ? 0.9 w thd+n total harmonic distortion+noise f = 1khz, a v = 2, r l = 8 ? , p o = 0.3w 0.18 % psrr power supply rejection ratio input floating, 217hz, v ripple = 200mv p-p c bypass = 1 f, r l = 8 ? 75 db input floating 1khz, v ripple = 200mv p-p c bypass = 1 f, r l = 8 ? 70 db input gnd 217hz, v ripple = 200mv p-p c bypass = 1 f, r l =8 ? 60 db input gnd 1khz v ripple = 200mv p-p c bypass = 1 f, r l = 8 ? 62 db x ta l k channel separation f = 1khz, c bypass = 1 f -100 db v no output noise voltage 1khz, a-weighted 7 v
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 6 typical performance characteristics vcc = 5v r l f = 1khz figure 2 thd+n vs. output power vcc = 5v r l f = 1khz figure 4 thd+n vs. output power vcc = 5v r l po = 1w figure 6 thd+n vs. frequency vcc = 3v r l f = 1khz figure 3 thd+n vs. output power vcc = 3v r l f = 1khz figure 5 thd+n vs. output power vcc = 3v r l po=300mw figure 7 thd+n vs. frequency
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 7 vcc = 5v r l po = 1w figure 8 thd+n vs. frequency vcc = 5v r l input gnd figure 10 psrr vs. frequency vcc = 5v r l input floating figure 12 psrr vs. frequency vcc = 3v r l po=500mw figure 9 thd+n vs. frequency vcc = 3v r l input gnd figure 11 psrr vs. frequency vcc = 3v r l input floating figure 13 psrr vs. frequency
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 8 vcc = 5v r l figure 14 frequency response vcc = 5v r l figure 16 crosstalk vs. frequency vcc = 5v r l a-weighting figure 18 noise floor vcc = 3v r l figure 15 frequency response vcc = 3v r l figure 17 crosstalk vs. frequency vcc = 3v r l a-weighting figure 19 noise floor
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 9 r l top side bottom side figure 20 dropout voltage vs. supply voltage r l f = 1khz thd+n = 10% thd+n = 1% figure 22 output power vs. supply voltage 0 0.25 0.5 0. 75 1 1. 25 vcc = 5v r l f = 1khz figure 21 power dissipation vs. output power
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 10 functional block diagram inb ina bypass outa- outa+ gnd vcc outb+ outb- sdb
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 11 application information exposed-dap package pcb mounting considerations the is31ap4088d?s qfn (die attach paddle) package provides a low thermal resistance between the die and the pcb to which the part is mounted and soldered. this allows rapid heat transfer from the die to the surrounding pcb copper traces, ground plane and, finally, surrounding air. the qfn package must have it?s dap soldered to a copper pad on the pcb. the dap?s pcb copper pad is connected to a large plane of continuous unbroken copper. this plane forms a thermal mass and heat sink and radiation area. place the heat sink area on either outside plane in the case of a two-sided pcb, or on an inner layer of a board with more than two layers. bridge configuration explanation as shown in figure 1, the is31ap4088d consists of two pairs of operational amplifiers, forming a two-channel (channel a and channel b) stereo amplifier. external feedback resistors r f and input resistors r in set the closed-loop gain of amp a (out-) and amp b (out-) whereas two internal 20k ? resistors set amp a?s (out+) and amp b?s (out+) gain at 1. the is31ap4088d drives a load, such speaker, connected between the two amplifier outputs, outa ? and outa+. figure 1 shows that amp a?s (out-) output serves as amp a?s (out+) input. this results in both amplifiers producing signals identical in magnitude, but 180 out of phase. taking advantage of this phase difference, a load is placed between outa ? and outa+ and driven differentially (commonly referred to as ?bridge mode?). this results in a differential gain of a v = 2(r f /r in ) (1) bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier?s output and ground. for a given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. this produces four times the output power when compared to a single-ended amplifier under the same conditions. this increase in attainable output power assumes that the amplifier is not current limited another advantage of the differential bridge output is no net dc voltage across the load. this is accomplished by biasing channel a?s and channel b?s outputs at half-supply. this eliminates the coupling capacitor that single supply, single ended amplifiers require. eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier?s half-supply bias voltage across the load. this increases internal ic power dissipation and may permanently damage loads such as speakers. power supply bypassing as with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. applications that employ a 5v regulator typically use a 10 f in parallel with a 0.1 f filter capacitor to stabilize the regulator?s output, reduce noise on the supply line, and improve the supply?s transient response. however, their presence does not eliminate the need for a local 1.0 f tantalum bypass capacitance connected between the is31ap4088d?s supply pins and ground. keep the length of leads and traces that connect capacitors between the is31ap4088d?s power supply pin and ground as short as possible. micro-power shutdown the voltage applied to the sdb pin controls the is31ap4088d?s shutdown function. activate micro-power shutdown by applying gnd to the sdb pin. when active, the is31ap4088d?s micro-power shutdown feature turns off the amplifier?s bias circuitry, reducing the supply current. the low 0.1 a typical shutdown current is achieved by applying a voltage that is as near as gnd as possible to the sdb pin. there are a few ways to control the micro-power shutdown. these include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. when use a switch, connect an external 100k ? resistor between the sdb pin and gnd. select normal amplifier operation by closing the switch. opening the switch sets the sdb pin to ground through the 100k ? resistor, which activates the micro power shutdown. the switch and resistor guarantee that the sdb pin will not floa t. this prevents unwanted state changes. in a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the sdb pin. driving the sdb pin with active circuitry eliminates the pull up resistor. selecting proper external components optimizing the is31ap4088d?s performance requires properly selecting external components. though the is31ap4088d operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. the is31ap4088d is unity-gain stable, giving a designer maximum design fl exibility. the gain should be set to no more than a given application requires. this allows the amplifier to achieve minimum thd+n and maximum signal-to-noise ratio. these parameters are compromised as the closed-loop gain increases. however, low gain demands input signals with greater voltage swings to achieve maximum output power. fortunately, many signal sources such as audio codecs have outputs of 1vrms (2.83v p-p ). please refer to the audio power amplifier design section for
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 12 more information on selecting the proper gain. input capacitor value selection amplifying the lowest audio frequencies requires high value input coupling capacitors (c in ) in figure 1. a high value capacitor can be expensive and may compromise space efficiency in portable designs. in many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150hz. applications using speakers with this limited frequency response reap little improvement by using large input capacitor. besides effecting system cost and size, c in have an effect on the is31ap4088d?s click-and-pop performance. when the supply voltage is first applied, a transient (pop) is created as the charge on the input capacitor changes from zero to a quiescent state. the magnitude of the pop is directly proportional to the input capacitor?s size. higher value capacitors need more time to reach a quiescent dc voltage (usually v cc /2) when charged with a fixed current. the amplifier?s output charges the input capacitor through the feedback resistors, r f . thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired ? 3db frequency. a shown in figure 1, the input resistors (r in ) and the input capacitors (c in ) produce a ? 3db high pass filter cutoff frequency that is found using equation (2). f -3db = 1/2 r in c in (2) as an example when using a speaker with a low frequency limit of 150hz, c ina , using equation (2) is 0.053 f. the 0.33 f c ina allows the is31ap4088d to drive high efficiency, full range speaker whose response extends below 30hz. bypass capacitor value selection besides minimizing the input capacitor size, careful consideration should be paid to value of c bypass , the capacitor connected to the bypass pin. since c bypass determines how fast the is31ap4088d settles to quiescent operation, its value is critical when minimizing turn-on pops. the slower the is31ap4088d?s outputs ramp to their quiescent dc voltage (nominally 1/2 v cc ), the smaller the turn-on pop. choosing c bypass equal to 1.0 f along with a small value of c in (in the range of 0.1 f to 0.39 f), produces a click-less and pop-less shutdown function. as discussed above, choosing c in no larger than necessary for the desired band with helps minimize click-and-pop. connecting a 1 f capacitor, c bypass , between the bypass pin and ground improves the internal bias voltage?s stability and improves the amplifier?s psrr. optimizing click-and-pop reduction performance the is31ap4088d contains circuitry that minimizes turn-on and shutdown transients or ?click-and-pop?. for this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. when the part is turned on, an internal current source changes t he voltage of the bypass pin in a controlled, linear manner. ideally, the input and outputs track the voltage applied to the bypass pin. the gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches 1/2v cc . as soon as the voltage on the bypass pin is stable, the device becomes fully operational. although the bypass pin current cannot be modified, changing the size of c bypass alters the device?s turn-on time and the magnitude of ?click-and-pop?. increasing the value of c bypass reduces the magnitude of turn-on pops. however, this presents a tradeoff: as the size of c bypass increases, the turn-on time increases. there is a linear relationship between the size of c bypass and the turn-on time. here are some typical turn-on times for various values of c bypass (all tested at v cc = 5v). c bypass t on 0.01 f 13ms 0.1 f 26ms 0.22 f 44ms 0.47 f 68ms 1.0 f 120 ms in order eliminate ?click-and-pop?; all capacitors must be discharged before turn-on. rapidly switching v cc on and off may not allow the capacitors to fully discharge, which may cause ?click-and-pop?. audio power amplifier design audio amplifier design: driving 1w into an 8 ? load the following are the desired operational parameters: power output: 1w rms load impedance: 8 ? input level: 1v rms input impedance: 20k ? bandwidth: 100hz~20khz 0.25db the design begins by specifying the minimum supply voltage necessary to obtain the specified output power. one way to find the minimum supply voltage is to use the output power vs. supply voltage curve in the typical performance characte ristics section. another way, using equation (3), is to calculate the peak output voltage necessary to achieve the desired output power for a given load impedance. to account for the amplifier?s dropout voltage, two additional voltages, based on the dropout voltage vs. supply voltage in the typical performance characteristics curves, must be added to the result obtained by equation (3). the
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 13 result is in equation (4). o l outpeck p 2r v ? (3) v cc v outpeak + (v odtop + v odbot ) (4) the output power vs. supply voltage graph for an 8 ? load indicates a minimum supply voltage of 4.35v for a 1w output at 1% thd+n. this is easily met by the commonly used 5v supply voltage. the additional voltage creates the benefit of headroom, allowing the is31ap4088d to produce peak output power in excess of 1.2w at 5v of v cc and 1% thd+n without clipping or other audible distortion. the choice of supply voltage must also not create a situation that violates maximum power dissipation. after satisfying the is31ap4088d?s power dissipation requirements, the minimum differential gain needed to achieve 1w dissipation in an 8 ? load is found using equation (5). inrms orms in l o v /v v v / r p a ? ? (5) thus, a minimum gain of 2.83 allows the is31ap4088d?s to reach full output swing and maintain low noise and thd+n performance. for this example, let a v = 3. the amplifier?s overall gain is set using the input, r in , and feedback resistors, r f . with the desired input impedance set at 20k ? , the feedback resistor is found using equation (6). r f /r in = a v /2 (6) the value of r f is 30k ? . the last step in this design example is setting the amplifier?s ? 3db frequency bandwidth. to achieve the desired 0.25db pass band magnitude variation limit, the low frequency response must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit. the gain variation for both response limits is 0.17db, well within the 0.25db desired limit. the results are an f l = 100hz/5 = 20hz and an f h = 20khz5 = 100khz. as mentioned in the external components section, r in and c in create a high pass filter that sets the amplifier?s lower band pass frequency limit. find the coupling capacitor?s value using equation (7). c in 1/(2 r in f l ) (7) the result is 1/(2 20k ? 20hz) = 0.398 f use a 0.39 f capacitor, the closest standard value. the product of the desired high frequency cut off (100khz in this example) and the differential gain, a v , determines the upper pass band response limit. with a v = 3 and f h = 100khz, the closed-loop gain bandwidth product (gbwp) is 300khz. with this margin, the amplifier can be used in designs that require more differential gain while avoiding performance-restricting bandwidth limitations.
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 14 classification reflow profiles profile feature pb-free assembly preheat & soak temperature min (tsmin) temperature max (tsmax) time (tsmin to tsmax) (ts) 150c 200c 60-120 seconds average ramp-up rate (tsmax to tp) 3c/second max. liquidous temperature (tl) time at liquidous (tl) 217c 60-150 seconds peak package body temperature (tp)* max 260c time (tp)** within 5c of the specified classification temperature (tc) max 30 seconds average ramp-down rate (tp to tsmax) 6c/second max. time 25c to peak temperature 8 minutes max. figure 23 classification profile
is31ap4088d integrated silicon solution, inc. ? www.issi.com rev. b, 01/03/2014 15 package information qfn-16 note: all dimensions in millimet ers unless otherwise stated.

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