1 BSS340NW rev.2.0,2016-06-23 final data sheet sot-323-3 mosfet optimos a 2small-signal-transistor ,30v features ?n-channel ?enhancementmode ?logiclevel(4.5vrated) ?avalancherated ?qualifiedaccordingtoaecq101 ?100%lead-free;rohscompliant ?halogen-freeaccordingtoiec61249-2-21 table1keyperformanceparameters parameter value unit v ds 30 v r ds(on),max, v gs =4.5v 600 m w r ds(on),max, v gs =10v 400 m w i d 0.88 a type/orderingcode package marking relatedlinks BSS340NW pg-sot323 xgs - drain pin 2 gate pin 1 source pin 3
2 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet tableofcontents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 drain pin 2 gate pin 1 source pin 3
3 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet 1maximumratings at t a =25c,unlessotherwisespecified table2maximumratings values min. typ. max. parameter symbol unit note/testcondition continuous drain current i d - - - - 0.88 0.71 a t a =25c t a =70c pulsed drain current i d,pulse - - 3.5 a t a =25c avalanche energy, single pulse e as - - 1.6 mj i d =0.88a, r gs =16 w reversedioded v /d t d v /d t - - 6 kv/s i d =0.88a, v ds =16v,d i /d t =200a/s, t j,max =150c gate source voltage v gs -20 - 20 v - power dissipation p tot - - 0.5 w t a =25c operating and storage temperature t j , t stg -55 - 150 c iec climatic category; din iec 68-1: 55/150/56 esd class - - - 0 - jesd22-a114 -hbm, esd class 0 = < 250v soldering temperature - - - 260 c - 2thermalcharacteristics table3thermalcharacteristics values min. typ. max. parameter symbol unit note/testcondition thermal resistance, junction - ambient, minimal footprint 1) r thja - - 250 k/w - 3electricalcharacteristics table4staticcharacteristics values min. typ. max. parameter symbol unit note/testcondition drain-source breakdown voltage v (br)dss 30 - - v v gs =0v, i d =250a gate threshold voltage v gs(th) 1.2 1.6 2.0 v v ds =v gs , i d =1.6a drain-source leakage current i dss - - - - 0.01 5 a v ds =30v, v gs =0v, t j =25c v ds =30v, v gs =0v, t j =150c gate-source leakage current i gss - - 10 na v gs =20v, v ds =0v drain-source on-state resistance r ds(on) - - 447 286 600 400 m w v gs =4.5v, i d =0.29a v gs =10v, i d =0.88a transconductance g fs - 1.2 - s | v ds |>2| i d | r ds(on)max , i d =0.71a 1) performed on 40 mm x 40 mm fr4 pcb. the traces are 1mm wide, 70m thick and 20mm long; they are present on both sides of the pcb drain pin 2 gate pin 1 source pin 3
4 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet table5dynamiccharacteristics 1) values min. typ. max. parameter symbol unit note/testcondition input capacitance c iss - 31 41 pf v gs =0v, v ds =15v, f =1mhz output capacitance c oss - 12 16 pf v gs =0v, v ds =15v, f =1mhz reverse transfer capacitance c rss - 2.4 3.6 pf v gs =0v, v ds =15v, f =1mhz turn-on delay time t d(on) - 2.6 - ns v dd =15v, v gs =10v, i d =0.88a, r g,ext =6 w rise time t r - 6.3 - ns v dd =15v, v gs =10v, i d =0.88a, r g,ext =6 w turn-off delay time t d(off) - 4.6 - ns v dd =15v, v gs =10v, i d =0.88a, r g,ext =6 w fall time t f - 2.5 - ns v dd =15v, v gs =10v, i d =0.88a, r g,ext =6 w table6gatechargecharacteristics 1) values min. typ. max. parameter symbol unit note/testcondition gate to source charge q gs - 0.11 0.15 nc v dd =15v, i d =0.88a, v gs =0to10v gate to drain charge q gd - 0.08 0.1 nc v dd =15v, i d =0.88a, v gs =0to10v gate charge total q g - 0.46 0.7 nc v dd =15v, i d =0.88a, v gs =0to10v gate plateau voltage v plateau - 3.6 - v v dd =15v, i d =0.88a, v gs =0to10v table7reversediode values min. typ. max. parameter symbol unit note/testcondition diode continous forward current i s - - 0.4 a t a =25c diode pulse current i s,pulse - - 3.5 a t a =25c diode forward voltage v sd - 0.9 1.1 v v gs =0v, i f =0.88a, t j =25c reverse recovery time 1) t rr - 7.8 - ns v r =15v, i f =0.88a,d i f /d t =100a/s reverse recovery charge 1) q rr - 1.9 - nc v r =15v, i f =0.88a,d i f /d t =100a/s 1) defined by design. not subjected to production test. drain pin 2 gate pin 1 source pin 3
5 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet 4electricalcharacteristicsdiagrams diagram1:powerdissipation t a [c] p tot [w] 0 40 80 120 0.0 0.1 0.2 0.3 0.4 0.5 0.6 p tot =f( t a ) diagram2:draincurrent t a [c] i d [a] 0 40 80 120 160 0.0 0.2 0.4 0.6 0.8 1.0 i d =f( t a ); v gs 3 10v diagram3:safeoperatingarea v ds [v] i d [a] 10 -1 10 0 10 1 10 2 10 -3 10 -2 10 -1 10 0 10 1 1s 100 s 1 ms 10 ms dc i d =f( v ds ); t a =25c; d =0;parameter: t p diagram4:max.transientthermalimpedance t p [s] z thja [k/w] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 0 10 1 10 2 10 3 0.5 0.2 0.1 0.05 0.01 single pulse z thja =f( t p );parameter: d = t p / t drain pin 2 gate pin 1 source pin 3
6 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet diagram5:typ.outputcharacteristics v ds [v] i d [a] 0 1 2 3 4 0 1 2 3 4 5 6 v 10 v 4.5 v 5 v 4v 3.5v i d =f( v ds ); t j =25c;parameter: v gs diagram6:typ.drain-sourceonresistance i d [a] r ds(on) [m w ] 0 1 2 3 4 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 3.5v 4 v 4.5 v 5 v 6 v 10 v r ds(on) =f( i d ); t j =25c;parameter: v gs diagram7:typ.transfercharacteristics v gs [v] i d [a] 0 2 4 6 0.0 0.4 0.8 1.2 1.6 2.0 150 c 25 c i d =f( v gs );| v ds |>2| i d | r ds(on)max diagram8:typ.forwardtransconductance i d [a] g fs [s] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.0 0.5 1.0 1.5 2.0 2.5 g fs =f( i d ); t j =25c drain pin 2 gate pin 1 source pin 3
7 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet diagram9:drain-sourceon-stateresistance t j [c] r ds(on) [m w ] -60 -20 20 60 100 140 0 100 200 300 400 500 600 700 800 900 1000 max typ r ds(on) =f( t j ); i d =0.88a; v gs =10v diagram10:typ.gatethresholdvoltage t j [c] v gs(th) [v] -60 -20 20 60 100 140 0.0 0.4 0.8 1.2 1.6 2.0 2.4 min typ max v gs(th) =f( t j ); v ds =v gs ; i d =1.6a;parameter: i d diagram11:typ.capacitances v ds [v] c [pf] 0 10 20 30 10 0 10 1 10 2 ciss coss crss c =f( v ds ); v gs =0v; f =1mhz;t j =25c diagram12:forwardcharacteristicsofreversediode v sd [v] i f [a] 0.0 0.4 0.8 1.2 1.6 10 -3 10 -2 10 -1 10 0 10 1 25 c 150 c 25 c, max 150 c, max i f =f( v sd );parameter: t j drain pin 2 gate pin 1 source pin 3
8 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet diagram13:avalanchecharacteristics t av [s] i av [a] 10 0 10 1 10 2 10 3 10 4 10 -2 10 -1 10 0 10 1 25 c 100 c 125 c i as =f( t av ); r gs =16 w ;parameter: t j(start) diagram14:typ.gatecharge q gate [nc] v gs [v] 0.0 0.1 0.2 0.3 0.4 0.5 0 1 2 3 4 5 6 7 8 9 10 6 v 24 v 15 v v gs =f( q gate ); i d =0.88apulsed;parameter: v dd diagram15:drain-sourcebreakdownvoltage t j [c] v br(dss) [v] -60 -20 20 60 100 140 180 25 27 29 31 33 35 37 v br(dss) =f( t j ); i d =250a drain pin 2 gate pin 1 source pin 3 gate charge waveforms
9 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet 5packageoutlines figure1outlinepg-sot323,dimensionsinmm drain pin 2 gate pin 1 source pin 3 gate charge waveforms
10 optimos a 2small-signal-transistor ,30v BSS340NW rev.2.0,2016-06-23 final data sheet revisionhistory BSS340NW revision:2016-06-23,rev.2.0 previous revision revision date subjects (major changes since last revision) 2.0 2016-06-23 release of final version trademarksofinfineontechnologiesag aurix?,c166?,canpak?,cipos?,coolgan?,coolmos?,coolset?,coolsic?,corecontrol?,crossave?,dave?,di-pol?,drblade?, easypim?,econobridge?,econodual?,econopack?,econopim?,eicedriver?,eupec?,fcos?,hitfet?,hybridpack?,infineon?, isoface?,isopack?,i-wafer?,mipaq?,modstack?,my-d?,novalithic?,omnitune?,optiga?,optimos?,origa?,powercode?, primarion?,primepack?,primestack?,profet?,pro-sil?,rasic?,real3?,reversave?,satric?,sieget?,sipmos?,smartlewis?, solidflash?,spoc?,tempfet?,thinq?,trenchstop?,tricore?. trademarksupdatedaugust2015 othertrademarks allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. welistentoyourcomments anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com publishedby infineontechnologiesag 81726mnchen,germany ?2016infineontechnologiesag allrightsreserved. legaldisclaimer theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.with respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. information forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestinfineon technologiesoffice( www.infineon.com ). warnings duetotechnicalrequirements,componentsmaycontaindangeroussubstances.forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. theinfineontechnologiescomponentdescribedinthisdatasheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. drain pin 2 gate pin 1 source pin 3 gate charge waveforms
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