cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 1/8 MTBB5N10L3 preliminary cystek product specification n -channel logic level enhancement mode mosfet MTBB5N10L3 bv dss 100v i d 5a r dson @v gs =10v, i d =2a 125m (typ.) features 131m (typ.) r dson @v gs =4.5v, i d =1a ? low gate charge ? simple drive requirement ? pb-free lead plating & halogen-free package equivalent circuit outline absolute maximum ratings (t c =25 c, unless otherwise noted) MTBB5N10L3 sot-223 g d s d g gate d drain s source parameter symbol limits unit drain-source voltage v ds 100 v gs 20 v gate-source voltage i d 5 continuous drain current @ t c =25 c i d 3 continuous drain current @ t c =100c pulsed drain current *1 i dm 20 i as 5 a avalanche current avalanche energy @ l=0.1mh, i d =5a, r g =25 e as 1.25 repetitive avalanche energy @ l=0.05mh *2 e ar 0.625 mj total power dissipation @t c =25 7.5 p d w total power dissipation @t c =100 3 operating junction and storage temperature range tj, tstg -55~+150 c note : *1 . pulse width limited by maximum junction temperature *2. duty cycle 1%
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 2/8 MTBB5N10L3 preliminary cystek product specification thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 16.7 c/w thermal resistance, junction-to-ambient, max r th,j-a 150 (note) c/w note : when mounted on a 1 in 2 pad of 2 oz. copper. characteristics (tc=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 100 - - v v gs =0, i d =250 a v gs(th) 1 2 3 v v ds =v gs , i d =250 a g fs *1 - 4 - s v ds =5v, i d =2a i gss - - 100 na v gs = 20, v ds =0 - - 1 a v ds =80v, v gs =0 i dss - - 25 a v ds =70v, v gs =0, tj=125 c - 125 150 m v gs =10v, i d =2a r ds(on) *1 - 131 160 m v gs =4.5v, i d =1a dynamic qg *1, 2 - 20 - qgs *1, 2 - 4 - qgd *1, 2 - 5 - nc v ds =50v, v gs =10v, i d =2a t d(on) *1, 2 - 20 - tr *1, 2 - 40 - t d(off) *1, 2 - 36 - t f *1, 2 - 30 - ns v ds =50v, i d =1a, v gs =10v, r g =6 ciss - 1188 - coss - 12 - crss - 17 - pf v gs =0v, v ds =50v, f=1mhz source-drain diode i s *1 - - 5 i sm *3 - - 20 a v sd *1 - - 1.2 v i f =i s , v gs =0v trr - 50 - ns qrr - 90 - nc i f =5a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. ordering information device package shipping MTBB5N10L3 sot-223 (pb-free lead plating & halogen-free package) 2500 pcs / tape & reel
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 3/8 MTBB5N10L3 preliminary cystek product specification typical characteristics typical output characteristics 0 2 4 6 8 10 12 14 16 18 20 024681 0 brekdown voltage vs junction temperature 100 110 120 130 140 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , drain-source breakdown voltage (v) i d =250 a, v gs =0v v ds , drain-source voltage(v) i d , drain current (a) 10v 9v 8v 7v 6v 5v 4.5v 4v v gs =3.5v v gs =3v v =2.5v gs static drain-source on-state resistance vs drain current 10 100 1000 0.001 0.01 0.1 1 10 i d , drain current(a) r ds( on) , static drain-source on-state resistance(m) v gs =3v v gs =10v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 i dr , reverse drain current(a) v sd , source-drain voltage(v) static drain-source on-state resistance vs gate-source voltage 100 150 200 250 300 350 400 024681 0 0 tj=25c tj=150c v gs =0v drain-source on-state resistance vs junction tempearture 80 100 120 140 160 180 200 220 240 260 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , static drain-source on-state resistance(m) v gs =4.5v, i d =1a v gs =10v, i d =2a v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =2a i d =1a
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 4/8 MTBB5N10L3 preliminary cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 1.2 1.4 1.6 1.8 2 2.2 2.4 -60 -20 20 60 100 140 tj, junction temperature(c) v gs( th) , threshold voltage(v) i d =250 a forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 12 04812162024 qg, total gate charge(nc) v gs , gate-source voltage(v) v ds =50v i d =2a maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) operation in this area is limited by rds(on) dc 10ms 100ms 1ms 100 s 10 s t a =25c, tj=150c sin g le pulse maximum drain current vs case temperature 0 1 2 3 4 5 6 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a)
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 5/8 MTBB5N10L3 preliminary cystek product specification typical characteristics(cont.) typical transfer characteristics 0 2 4 6 8 10 12 14 16 18 0246810 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v power derating curve 0 1 2 3 4 5 6 7 8 0 50 100 150 200 t c , casetemperature() p d , power dissipation(w) transient thermal response curves 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =150c/w
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 6/8 MTBB5N10L3 preliminary cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 7/8 MTBB5N10L3 preliminary cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds ? time(ts min to ts max ) time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c593l3 issued date : 2010.07.07 revised date : 2011.12.09 page no. : 8/8 MTBB5N10L3 preliminary cystek product specification sot-223 dimension *: typical inches millimeters 321 f b a c d e g h a1 a2 i style: pin 1.gate 2.drain 3.source marking: 3-lead sot-223 plastic surface mounted package cystek package code: l3 device name date code inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1142 0.1220 2.90 3.10 g 0.0551 0.0709 1.40 1.80 b 0.2638 0.2874 6.70 7.30 h 0.0098 0.0138 0.25 0.35 c 0.1299 0.1457 3.30 3.70 i 0.0008 0.0039 0.02 0.10 d 0.0236 0.0315 0.60 0.80 a1 *13 o - *13 o - e *0.0906 - *2.30 - a2 0 o 10 o 0 o 10 o f 0.2480 0.2638 6.30 6.70 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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