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smsc lan950x family revision 1.1 (04-18-13) datasheet datasheet product features lan9500/lan9500i lan9500a/lan9500ai usb 2.0 to 10/100 ethernet controller highlights ? single chip hi-speed usb 2.0 to 10/100 ethernet controller ? integrated 10/100 ethernet mac with full-duplex support ? integrated 10/100 ethernet phy with hp auto-mdix support ? integrated usb 2.0 hi-speed device controller ? integrated usb 2.0 hi-speed phy ? implements reduced power operating modes target applications ? embedded systems ? set-top boxes ? pvr?s ? ce devices ? networked printers ? usb port replicators ? standalone usb to ethernet dongles ? test instrumentation ? industrial key features ? usb device controller ? fully compliant with hi-speed universal serial bus specification revision 2.0 ? supports hs (480 mbps) and fs (12 mbps) modes ? four endpoints supported ? supports vendor specific commands ? integrated usb 2.0 phy ? remote wakeup supported ? high-performance 10/100 ethernet controller ? fully compliant with ieee802.3/802.3u ? integrated ethernet mac and phy ? 10base-t and 100base-tx support ? full- and half-duplex support ? full- and half-duplex flow control ? preamble generation and removal ? automatic 32-bit crc generation and checking ? automatic payload padding and pad removal ? loop-back modes ? tcp/udp/ip/icmp checksum offload support ? flexible address filtering modes ? one 48-bit perfect address ? 64 hash-filtered multicast addresses ? pass all multicast ? promiscuous mode ? inverse filtering ? pass all incoming with status report ? wakeup packet support ? integrated ethernet phy ? auto-negotiation ? automatic polarity detection and correction ? hp auto-mdix support ? link status change wake-up detection ? support for 3 status leds ? external mii and turbo mii support homepna? and homeplug? phy ? power and i/os ? various low power modes ? netdetach feature increases battery life 1 ? supports pci-like pme wake 1 ?11 gpios ? supports bus-powered and self-powered operation ? integrated power-on reset circuit ? single external 3.3v i/o supply ? internal core regulator ? miscellaneous features ? eeprom controller ? supports custom operation without eeprom 1 ? ieee 1149.1 (jtag) boundary scan ? requires single 25 mhz crystal ? software ? windows xp/vista driver ? linux driver ? win ce driver ?mac os driver ? eeprom utility ? packaging ? 56-pin qfn (8x8 mm) lead-free rohs compliant ? environmental ? commercial temperature range (0c to +70c) ? industrial temperature range (-40c to +85c) 1 = lan9500a/lan9500ai only
order numbers: lan9500-abzj (tray) for 56-pin, qf n lead-free rohs compliant package (0 to +70c temp range) lan9500-abzj-tr (tape & reel) for 56- pin, qfn lead-free rohs compliant package (0 to +70c temp range) lan9500i-abzj (tray) for 56-pin, qfn lead-free ro hs compliant package (-40 to +85c temp range) lan9500i-abzj-tr (tape & reel ) for 56-pin, qfn lead-fre e rohs compliant package (-40 to +85c temp range) lan9500a-abzj (tray) for 56-pin, qfn lead-free rohs co mpliant package (0 to +70c temp range) LAN9500A-ABZJ-TR (tape & reel) for 56-pin, qfn lead-free rohs compliant package (0 to +70c temp range) lan9500ai-abzj (tray) for 56-pin, qfn lead-free rohs compliant package (-40 to +85c temp range) lan9500ai-abzj-tr (tape & reel) for 56-pin, qfn lead-free ro hs compliant package (-40 to +85c temp range) this product meets the halogen maximum concentration values per iec61249-2-21 for rohs compliance and environmen tal information, please visit www.smsc.com/rohs please contact your smsc sales representative fo r additional documentation related to this product such as application notes, anomaly sheets, and design guidelines. usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 2 smsc lan950x family datasheet copyright ? 2013 smsc or its subsidiaries. all rights reserved. circuit diagrams and other information relating to smsc produc ts are included as a means of illustrating typical applications. consequently, complete information sufficient for construction purposes is not necessarily given. although the information has been checked and is believed to be accurate, no re sponsibility is assumed for inaccuracies. smsc reserves the right to make changes to specifications and produc t descriptions at any time without notice. contact your local sm sc sales office to obtain the latest specifications before placing your product order. the provision of this inform ation does not convey to the purchaser of the described semicond uctor devices any licenses under any patent rights or other intellectual property rights of smsc or others. all sales are expressly conditional on your agreement to the te rms and conditions of the most recently dated version of smsc's standard terms of sale agreement dated before the date of your order (the "terms of sale agreement"). the pro duct may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. anomaly sheets are availab le upon request. smsc products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. any and all such uses without prior written approval of an officer of smsc and further testing and/or modification will be fully at the risk of the customer. copies of this document or other smsc literature, as well as the terms of sale agreement, may be obtained by visiting smsc?s website at h ttp://www.smsc.com. smsc is a registered trademark of standard microsystems corporat ion (?smsc?). product names and company na mes are the trademarks of their respective holders. the microchip name and logo, and the microchip logo are registered trademarks of microchip technology incorporated in the u.s.a . and other countries. smsc disclaims and excludes any and all warrant ies, including without limi tation any and all implied warranties of merchantabil ity, fitness for a particular purpose, title, a nd against infringement and the like, and any and all warranties arising from any cou rse of dealing or usage of trade. in no event shall smsc be liable for any direct, incidental, indi rect, special, punitive, or cons equential damages; or for lost data, profits, savings or revenues of any kind; regardless of the form of action, whether based on contrac t; tort; negligence of smsc or others; strict liability; breach of wa rranty; or otherwise; whether or not any remedy of buyer is h eld to have failed of its essential purpose, and whether or not smsc has been advised of the possibility of such damages.
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 3 revision 1.1 (04-18-13) datasheet table of contents chapter 1 lan950x family differences overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 chapter 2 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1.2 usb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.3 fifo controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.4 ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.5 power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0 2.1.6 eeprom controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.1.7 general purpose i/o . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 chapter 3 pin description and configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 pin assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.2 buffer types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 chapter 4 power connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 chapter 5 eeprom controller (epc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.1 eeprom format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.2 eeprom defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.3 eeprom auto-load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4 examples of eeprom format inte rpretation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.1 lan9500/lan9500i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.2 lan9500a/lan9500ai . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.5 customized operation without eeprom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 chapter 6 pme operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 chapter 7 netdetach operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 chapter 8 operational characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8.1 absolute maximum ratings*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8.2 operating conditions** . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8.3 power consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8.3.1 suspend0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8.3.2 suspend1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 8.3.3 suspend2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 8.3.4 suspend3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 8.3.5 operational . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 8.3.6 customer evaluation board oper ational current consumption*** . . . . . . . . . . . . . . . . . 51 8.4 dc specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 8.5 ac specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 8.5.1 equivalent test load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 8.5.2 power-on configuration strap valid timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 8.5.3 reset and configuration strap timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 8.5.4 eeprom timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 8.5.5 mii interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 8.5.6 turbo mii interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 0
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 4 smsc lan950x family datasheet 8.5.7 jtag timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 8.6 clock circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 chapter 9 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 chapter 10 datasheet revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 5 revision 1.1 (04-18-13) datasheet list of figures figure 1.1 system component differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 2.1 system diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 3.1 pin assignments (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 4.1 power connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 6.1 typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 6.2 pme operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 figure 7.1 device detach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 figure 7.2 device attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 figure 8.1 output equivalent test load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 figure 8.2 power-on configuration strap valid timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 figure 8.3 nreset reset pin timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 figure 8.4 eeprom timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 figure 8.5 mii transmit timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 figure 8.6 mii receive timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 figure 8.7 turbo mii transmit timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 figure 8.8 turbo mii receive timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 figure 8.9 jtag timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 figure 9.1 lan950x 56-qfn package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 figure 9.2 lan950x 56-qfn recommended pcb land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 6 smsc lan950x family datasheet list of tables table 1.1 lan950x family differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3.1 mii interface pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 3.2 eeprom pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 3.3 jtag pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 3.4 miscellaneous pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 3.5 usb pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 3.6 ethernet phy pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 3.7 i/o power pins, core power pins, and ground pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 3.8 no-connect pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 3.9 56-qfn package pin assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 3.10 buffer types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 5.1 eeprom format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 5.2 configuration flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 5.3 gpio pme flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 5.4 eeprom defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 5.5 dump of eeprom memory - lan950 0/lan9500i . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 5.6 eeprom example - 256 byte eeprom - lan9500/lan9500i . . . . . . . . . . . . . . . . . . . . . . . 32 table 5.7 dump of eeprom memory - lan950 0a/lan9500ai. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 5.8 eeprom example - 256 byte eeprom - lan9500a/lan9500ai . . . . . . . . . . . . . . . . . . . . 36 table 8.1 power consumption/dissipation - suspend0 (lan9500/lan9500i) . . . . . . . . . . . . . . . . . . 48 table 8.2 power consumption/dissipation - suspend0 (l an9500a/lan9500ai) . . . . . . . . . . . . . . . . 48 table 8.3 power consumption/dissipation - suspend1 (lan9500/lan9500i) . . . . . . . . . . . . . . . . . . 49 table 8.4 power consumption/dissipation - suspend1 (l an9500a/lan9500ai) . . . . . . . . . . . . . . . . 49 table 8.5 power consumption/dissipation - suspend2 (lan9500/lan9500i) . . . . . . . . . . . . . . . . . . 49 table 8.6 power consumption/dissipation - suspend2 (l an9500a/lan9500ai) . . . . . . . . . . . . . . . . 49 table 8.7 power consumption/dissipation - suspend3 (l an9500a/lan9500ai) . . . . . . . . . . . . . . . . 50 table 8.8 operational power consumptio n/dissipation (lan9500/lan9500i) . . . . . . . . . . . . . . . . . . . . 50 table 8.9 operational power consumptio n/dissipation (lan9500a/lan9500ai) . . . . . . . . . . . . . . . . . 51 table 8.10 ceb operational current consum ption (lan9500/lan9500i) . . . . . . . . . . . . . . . . . . . . . . . . 51 table 8.11 ceb operational current consumption (lan9500a/l an9500ai). . . . . . . . . . . . . . . . . . . . . . 51 table 8.12 i/o buffer characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 table 8.13 100base-tx transceiver ch aracteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 table 8.14 10base-t transceiver char acteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 table 8.15 power-on configuration strap valid timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 table 8.16 nreset reset pin timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 table 8.17 eeprom timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 table 8.18 mii transmit timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 table 8.19 mii receive timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 table 8.20 turbo mii transmit timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 table 8.21 turbo mii receive timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 table 8.22 jtag timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 table 8.23 crystal specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 table 9.1 lan950x 56-qfn dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 table 10.1 customer revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 7 revision 1.1 (04-18-13) datasheet chapter 1 lan950x family differences overview the smsc lan950x is a family of high performanc e hi-speed usb 2.0 to 10/10 0 ethernet controllers. the ?x? in the part number is a generic term referring to the entire family, which includes the following devices: ? lan9500 ? lan9500i ? lan9500a ? lan9500ai device specific features that do no pertain to the entire la n950x family are called out independently throughout this document. table 1.1 provides a summary of the feature differences between family members. the lan9500/lan9500i and lan9500a/lan9500ai are pin compatible. however, the value of the required exres resistor and other system comp onents differ between devices. refer to figure 1.1 and the lan950x reference schematics for additional information. table 1.1 lan950x family differences part number pme wake net detach suspend3 state good packet wakeup phy boost custom operation without eeprom increased wakeup frame filter 0 o to 70 o c -40 o to 85 o c lan9500 x lan9500i x lan9500a x x x x x x x x lan9500ai x x x x x x x x
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 8 smsc lan950x family datasheet figure 1.1 system component differences +3.3v analog lan950x 56-pin qfn txp txn rxp rxn r1 for lan9500/lan9500i: 10 ohm 1% for lan9500a/lan9500ai: 0 ohm ethernet magnetics/rj45 to ethernet 49.9 ohm 1% 49.9 ohm 1% 49.9 ohm 1% 49.9 ohm 1% exres r2 for lan9500/lan9500i: 12.4k ohm 1% for lan9500a/lan9500ai: 12.0k ohm 1% xo xi 33pf 33pf 25.000mhz r3 for lan9500/lan9500i: 1m ohm 1% for lan9500a/lan9500ai: do not populate
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 9 revision 1.1 (04-18-13) datasheet chapter 2 introduction 2.1 block diagram 2.1.1 overview the lan950x is a high performance hi-speed usb 2.0 to 10/100 ethernet controller. with applications ranging from embedded systems, set-top boxes, and pv r?s, to usb port replicators, usb to ethernet dongles, and test instrumentation, the device is a high performance and cost competitive usb to ethernet connectivity solution. the lan950x contains an integrated 10/100 ether net phy, usb phy, hi-speed usb 2.0 device controller, 10/100 ethernet mac, t ap controller, eeprom controller, and a fifo controller with a total of 30 kb of internal packet buffering. the internal usb 2.0 device controller and usb phy are compliant with the usb 2.0 hi-speed standard. the device implements control, inte rrupt, bulk-in, and bulk-out usb endpoints. the ethernet controller supports auto-negotiation, auto-polarity correction, hp auto-mdix, and is compliant with the ieee 80 2.3 and ieee 802.3u standards. an exte rnal mii interface provides support for an external fast ethernet phy, homepna, and homeplug functionality. multiple power management feat ures are provided, including various low power modes and "magic packet", "wake on lan", and "link status c hange" wake events. these wake events can be programmed to initiate a usb remote wakeup. an internal eeprom controller exis ts to load various usb configur ation informati on and the device mac address. the integrated ieee 11 49.1 compliant tap controller provides boundar y scan via jtag. figure 2.1 system diagram tap controller eeprom controller usb 2.0 device controller sram ethernet phy 10/100 ethernet mac fifo controller usb phy lan950x mii: to optional external phy ethernet eeprom jtag usb
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 10 smsc lan950x family datasheet 2.1.2 usb the usb portion of the lan950x integrates a hi-speed usb 2.0 device controller and usb phy. the usb device controller contains a usb low-level protocol interpreter which implements the usb bus protocol, packet generation/ex traction, pid/device id parsing, and crc coding/decoding, with autonomous error handling. the usb device controller is capable of operating in usb 2.0 hi-speed and full-speed compliant modes and contains aut onomous protocol handling functions such as handling of suspend/resume/reset conditions, remo te wakeup, and stall condition clearing on setup packets. the usb device controller also autonomously handles error conditions such as retry for crc and data toggle errors, and generates nyet, stall, ack and nack handshake responses, depending on the endpoint buffer status. the lan950x implements four usb endpoints: contro l, interrupt, bulk-in, and bulk-out. the bulk-in and bulk-out endpoints allow for ethernet recept ion and transmission respectively. implementation of vendor-specific commands allows for efficient stat istics gathering and access to the device?s system control and status registers. 2.1.3 fifo controller the fifo controller uses an internal sram to buffer rx and tx traffic. bulk-out packets from the usb controller are directly stored into the tx buffer. et hernet frames are directly stored into the rx buffer and become the basis for bulk-in packets. 2.1.4 ethernet the lan950x integrates an ieee 802.3 phy for twisted pair ethernet applications and a 10/100 ethernet media access controller (mac). the phy can be configured for either 100 mbps (100base-tx) or 10 mbps (10base-t) ethernet operation in either full- or half-duplex configur ations and includes auto-negotiation, auto-polarity correction, and auto-mdix. minimal external co mponents are required for the utilization of the integrated phy. optionally, an external phy may be used via the m ii (media independent interface) port, effectively bypassing the internal phy. this option allows support for homepna and homeplug applications. the ethernet mac/phy supports numerous power management wakeup features, including ?magic packet?, ?wake on lan?, and ?link status change? . eight wakeup frame f ilters are provided by lan9500a/lan9500ai, while lan9500/lan9500i support four. 2.1.5 power management the lan950x features four ( note 2.1 ) variations of usb susp end: suspend0, suspend1, suspend2, and suspend3. these modes allow the applic ation to select the ideal balance of remote wakeup functionality and power consumption. ? suspend0: supports gpio, ?wake on lan?, and ?magic packet? remote wakeup events. this suspend state reduces power by stopping the clocks of the mac and other internal modules. ? suspend1: supports gpio and ?link status change? for remote wakeup events. this suspend state consumes less power than suspend0. ? suspend2: supports only gpio assertion for a remote wakeup event. this is the default suspend mode for the device. ? suspend3: ( note 2.1 ) supports gpio and ?good packet? remote wakeup event. a ?good packet? is a received frame passing certain filtering co nstraints independent of those imposed on ?wake on lan? and ?magic packet? frames. this suspend state consumes power at a level similar to the normal state, however, it allows for power savings in the host cpu.
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 11 revision 1.1 (04-18-13) datasheet note 2.1 all four suspend states are supported by lan9500a/lan9500ai. suspend3 is not supported by lan9500/lan9500i. 2.1.6 eeprom controller the lan950x contains an eeprom controller for connection to an external eeprom. this allows for the automatic loading of static configuration data upon power-on reset, pin reset, or software reset. the eeprom can be configured to load usb de scriptors, usb device configuration, and mac address. custom operation without eeprom is also provided (lan9500a/lan 9500ai only). 2.1.7 general purpose i/o when configured for internal phy mode, up to el even gpios are supported. all gpios can serve as remote wakeup events when the lan950x is in a suspended state.
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 12 smsc lan950x family datasheet chapter 3 pin description and configuration note: ** this pin is a no-connect (nc) for lan950 0a/lan9500ai, but may be connected to vdd33a for backward compatibility with lan9500/lan9500i. note: *** for lan9500a/lan9500ai this pin provides additional pme related functionality. refer to the respective pi n descriptions and chapter 6, "pme operation," on page 41 for additional information. note: **** for lan9500a/lan9500ai gpio7 may provide additional phy link up related functionality. note: when hp auto-mdix is activated, the txn/txp pi ns can function as rxn/rxp and vice-versa. note: exposed pad (vss) on bottom of pa ckage must be connected to ground. figure 3.1 pin assignments (top view) vss smsc lan950x 56 pin qfn (top view) txen rxdv nspd_led/gpio10 *** nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 42 41 40 39 38 37 36 35 34 33 32 31 30 29 56 55 54 53 52 51 50 49 48 47 46 45 44 43 test2 usbdp usbdm vddpll vdd33a exres vdd33a ** rxp rxn vdd33a txp txn nphy_int rxclk tdi/rxd3 tms/rxd2 tck/rxd1 tdo/nphy_rst ntrst/rxd0 vdd33io phy_sel test3 eedi eedo/automdix_en eecs eeclk/pwr_sel rxer crs/gpio3 col/gpio0 *** txclk vdd33io test1 vddcore vdd33io vdd33io txd3/gpio7/eep_size **** txd2/gpio6/port_swap txd1/gpio5/rmt_wkp txd0/gpio4/eep_disable nlnka_led/gpio9 *** nfdx_led/gpio8 *** vdd33io nreset *** mdio/gpio1 *** mdc/gpio2 vddcore vbus_det *** xo xi vddusbpll usbrbias vdd33a
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 13 revision 1.1 (04-18-13) datasheet table 3.1 mii interface pins num pins name symbol buffer type description 1 receive error (external phy mode) rxer is (pd) in external phy mode, the signal on this pin is input from the external phy and indicates a receive error in the packet. in internal phy mode, this pin is not used. 1 transmit enable (external phy mode) txen o8 (pd) in external phy mode, this pin functions as an output to the external phy and indicates valid data on txd[3:0]. in internal phy mode, this pin is not used. 1 receive data valid (external phy mode) rxdv is (pd) in external phy mode, the signal on this pin is input from the external phy and indicates valid data on rxd[3:0]. in internal phy mode, this pin is not used. 1 receive clock (external phy mode) rxclk is (pd) in external phy mode, this pin is the receiver clock input from the external phy. in internal phy mode, this pin is not used. 1 carrier sense (external phy mode) crs is (pd) in external phy mode, the signal on this pin is input from the external phy and indicates a network carrier. general purpose i/o 3 (internal phy mode only) gpio3 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. 1 mii collision detect (external phy mode) col is (pd) in external phy mode, the signal on this pin is input from the external phy and indicates a collision event. general purpose i/o 0 (internal phy mode only) gpio0 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. note: (lan9500a/lan9500ai only) this pin may be used to signal pme when internal phy and pme modes of operation are in effect. refer to chapter 6, "pme operation," on page 41 for additional information.
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 14 smsc lan950x family datasheet 1 management data (external phy mode) mdio is/o8 (pd) in external phy mode, this pin provides the management data to/from the external phy. general purpose i/o 1 (internal phy mode only) gpio1 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. note: (lan9500a/lan9500ai only) this pin may serve as the pme_mode_sel input when internal phy and pme modes of operation are in effect. refer to chapter 6, "pme operation," on page 41 for additional information. 1 management clock (external phy mode) mdc o8 (pd) in external phy mode, this pin outputs the management clock to the external phy. general purpose i/o 2 (internal phy mode only) gpio2 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. 1 transmit data 3 (external phy mode) txd3 o8 (pu) in external phy mode, this pin functions as the transmit data 3 output to the external phy. general purpose i/o 7 (internal phy mode only) gpio7 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. note: (lan9500a/lan9500ai only): gpio7 may provide additional phy link up related functionality. eeprom size configuration strap eep_size is (pu) the eep_size strap sele cts the size of the eeprom attached to the device. 0 = 128 byte eeprom is attached and a total of seven address bits are used. 1 = 256/512 byte eeprom is attached and a total of nine address bits are used. note: a 3-wire style 1k/2k/4k eeprom that is organized for 128 x 8-bit or 256/512 x 8-bit operation must be used. see note 3.1 for more information on configuration straps. table 3.1 mii interfa ce pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 15 revision 1.1 (04-18-13) datasheet 1 transmit data 2 (external phy mode) txd2 o8 (pd) in external phy mode, this pin functions as the transmit data 2 output to the external phy. general purpose i/o 6 (internal phy mode only) gpio6 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. usb port swap configuration strap port_swap is (pd) swaps the mapping of usbdp and usbdm. 0 = usbdp maps to the usb d+ line and usbdm maps to the usb d- line. 1 = usbdp maps to the usb d- line. usbdm maps to the usb d+ line. see note 3.1 for more information on configuration straps. 1 transmit data 1 (external phy mode) txd1 o8 (pd) in external phy mode, this pin functions as the transmit data 1 output to the external phy. general purpose i/o 5 (internal phy mode only) gpio5 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. remote wakeup configuration strap rmt_wkp is (pd) this strap configures the default descriptor values to support remote wakeup. 0 = remote wakeup is not supported. 1 = remote wakeup is supported. see note 3.1 for more information on configuration straps. table 3.1 mii interfa ce pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 16 smsc lan950x family datasheet note 3.1 configuration strap va lues are latched on pow er-on reset and system reset. configuration straps are identified by an underlined symbol name. signals that function as configuration straps must be augmented with an external resistor when connected to a load. 1 transmit data 0 (external phy mode) txd0 o8 (pd) in external phy mode, this pin functions as the transmit data 0 output to the external phy. general purpose i/o 4 (internal phy mode only) gpio4 is/o8/ od8 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. eeprom disable configuration strap eep_disable is (pd) this strap disables t he autoloading of the eeprom contents. the asse rtion of this strap does not prevent register access to the eeprom. 0 = eeprom is recognized if present. 1 = eeprom is not recognized even if it is present. see note 3.1 for more information on configuration straps. 1 transmit clock (external phy mode) txclk is (pu) in external phy mode, this pin is the transmitter clock input from the external phy. in internal phy mode, this pin is not used. table 3.2 eeprom pins num pins name symbol buffer type description 1 eeprom data in eedi is (pd) this pin is driven by the eedo output of the external eeprom. 1 eeprom data out eedo o8 (pu) this pin drives the eedi input of the external eeprom. auto-mdix enable configuration strap automdix_en is (pu) determines the default auto-mdix setting. 0 = auto-mdix is disabled. 1 = auto-mdix is enabled. see note 3.2 for more information on configuration straps. table 3.1 mii interfa ce pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 17 revision 1.1 (04-18-13) datasheet note 3.2 configuration strap va lues are latched on pow er-on reset and system reset. configuration straps are identified by an underlined symbol name. signals that function as configuration straps must be augmented with an external resistor when connected to a load. 1 eeprom chip select eecs o8 this pin drives the chip select output of the external eeprom. note: the eecs output may tri-state briefly during power-up. some eeprom devices may be prone to false selection during this time. when an eeprom is used, an external pull-down resistor is recommended on this signal to prevent false selection. re fer to your eeprom manufacturer?s datasheet for additional information. 1 eeprom clock eeclk o8 (pd) this pin drives the eeprom clock of the external eeprom. power select configuration strap pwr_sel is (pd) determines the default power setting when no eeprom is present. 0 = the device is bus powered. 1 = the device is self powered. see note 3.2 for more information on configuration straps. table 3.3 jtag pins num pins name symbol buffer type description 1 jtag test port reset (internal phy mode) ntrst is (pu) in internal phy mode, this active-low pin functions as the jtag test port reset input. receive data 0 (external phy mode) rxd0 is (pd) in external phy mode, this pin functions as the receive data 0 input from the external phy. 1 jtag test data out (internal phy mode) tdo o8 in internal phy mode, this pin functions as the jtag data output. phy reset (external phy mode) nphy_rst o8 in external phy mode, this active-low pin functions as the phy reset output. table 3.2 eeprom pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 18 smsc lan950x family datasheet 1 jtag test clock (internal phy mode) tck is (pu) in internal phy mode, this pin functions as the jtag test clock. t he maximum operating frequency of this clock is 25mhz. receive data 1 (external phy mode) rxd1 is (pd) in external phy mode, this pin functions as the receive data 1 input from the external phy. 1 jtag test mode select (internal phy mode) tms is (pu) in internal phy mode, this pin functions as the jtag test mode select. receive data 2 (external phy mode) rxd2 is (pd) in external phy mode, this pin functions as the receive data 2 input from the external phy. 1 jtag test data input (internal phy mode) tdi is (pu) in internal phy mode, this pin functions as the jtag data input. receive data 3 (external phy mode) rxd3 is (pd) in external phy mode, this pin functions as the receive data 3 input from the external phy. table 3.4 miscellaneous pins num pins name symbol buffer type description 1 phy select phy_sel is (pd) selects whether to use the internal ethernet phy or the external phy connected to the mii port. 0 = internal phy is used. 1 = external phy is used. 1 system reset nreset is (pu) this active-low pin allows external hardware to reset the device. note: (lan9500a/lan9500ai only) this pin may be used to signal pme_clear when pme mode of operation is in effect. refer to chapter 6, "pme operation," on page 41 for additional information. table 3.3 jtag pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 19 revision 1.1 (04-18-13) datasheet 1 ethernet full-duplex indicator led nfdx_led od12 (pu) this pin is driven low (led on) when the ethernet link is operating in full-duplex mode. general purpose i/o 8 gpio8 is/o12/ od12 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. note: (lan9500a/lan9500ai only) this pin may be used to signal pme when external phy and pme modes of operation are in effect. refer to chapter 6, "pme operation," on page 41 for additional information. note: by default this pin is configured as a gpio. 1 ethernet link activity indicator led nlnka_led od12 (pu) this pin is driven low (led on) when a valid link is detected. this pin is pulsed high (led off) for 80ms whenever transmit or receive activity is detected. this pin is then driven low again for a minimum of 80ms, after which time it will repeat the process if tx or rx activity is detected. effectively, led2 is activated solid for a link. when transmit or receiv e activity is sensed, led2 will function as an activity indicator. general purpose i/o 9 gpio9 is/o12/ od12 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. note: (lan9500a/lan9500ai only) this pin may serve as the pme_mode_sel input when external phy and pme modes of operation are in effect. refer to chapter 6, "pme operation," on page 41 for additional information. note: by default this pin is configured as a gpio. table 3.4 miscellaneous pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 20 smsc lan950x family datasheet 1 ethernet speed indicator led nspd_led od12 (pu) this pin is driven low (led on) when the ethernet operating speed is 100mbs, or during auto- negotiation. this pin is driven high during 10mbs operation, or during line isolation. general purpose i/o 10 gpio10 is/o12/ od12 (pu) this general purpose i/o pin is fully programmable as either a push-pull output, an open-drain output, or a schmitt-triggered input. note: (lan9500a/lan9500ai only) this pin may serve as a wakeup pin whose detection mode is selectable when external phy and pme modes of operation are in effect. refer to chapter 6, "pme operation," on page 41 for additional information. note: by default this pin is configured as a gpio. 1 detect upstream vbus power vbus_det is_5v (pd) detects state of upstream bus power. for bus powered applications, this pin must be tied to vdd33io. for self powered applications where the device is permanently attached to a host, vbus_det should be pulled to vdd33io. for other self powered applications, refer to the device reference schematic for additional connection information. note: (lan9500a/lan9500ai only) this pin may be used to signal bus power availability when pme mode of operation is in effect. refer to chapter 6, "pme operation," on page 41 for additional information. 1 test 1 test1 - this pin must always be connected to vdd33io for proper operation. 1 test 2 test2 - this pin must a lways be connected to vss for proper operation. 1 test 3 test3 - this pin must a lways be connected to vss for proper operation. table 3.4 miscellaneous pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 21 revision 1.1 (04-18-13) datasheet table 3.5 usb pins num pins name symbol buffer type description 1 usb dminus usbdm aio note: the functionality of this pin may be swapped to usb dplus via the port_swap configuration strap. 1 usb dplus usbdp aio note: the functionality of this pin may be swapped to usb dminus via the port_swap configuration strap. 1 external usb bias resistor. usbrbias ai used for setting hs tr ansmit current level and on- chip termination impedance. connect to an external 12k 1.0% resistor to ground. 1 usb pll supply vddusbpll p this pin must be connected to vddcore for proper operation. refer to chapter 4, "power connections," on page 25 and the device reference schematic for additional connection information. 1 crystal input xi iclk external 25 mhz crystal input. note: this pin can also be driven by a single- ended clock oscillator. when this method is used, xo should be left unconnected 1 crystal output xo oclk external 25 mhz crystal output. table 3.6 ethernet phy pins num pins name symbol buffer type description 1 ethernet tx data out negative txn aio the transmit data outputs may be swapped internally with receive data inputs when auto- mdix is enabled. 1 ethernet tx data out positive txp aio the transmit data outputs may be swapped internally with receive data inputs when auto- mdix is enabled. 1 ethernet rx data in negative rxn aio the receive data inputs may be swapped internally with transmit data outputs when auto- mdix is enabled. 1 ethernet rx data in positive rxp aio the receive data inputs may be swapped internally with transmit data outputs when auto- mdix is enabled.
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 22 smsc lan950x family datasheet 1 phy interrupt (internal phy mode) nphy_int o8 in internal phy mode, this pin can be configured to output the internal phy interrupt signal. note: the internal phy interrupt signal is active-high. phy interrupt (external phy mode) nphy_int is (pu) in external phy mode, the active-low signal on this pin is input from the external phy and indicates a phy interrupt has occurred. 4 +3.3v analog power supply vdd33a p refer to the device reference schematic for connection information. note: pin 7 is a no-connect (nc) for lan9500a/lan9500ai, but may be connected to vdd33a for backward compatibility with lan9500/lan9500i. 1 external phy bias resistor exres ai used for the internal bias circuits. connect to an external resistor to ground. for lan9500a/lan9500ai use 12.0k, 1%. for lan9500/lan9500i use 12.4k, 1%. 1 ethernet pll power supply vddpll p this pin must be connected to vddcore for proper operation. refer to chapter 4, "power connections," on page 25 and the device reference schematic for additional connection information. table 3.7 i/o power pins, core power pins, and ground pad num pins name symbol buffer type description 5 +3.3v i/o power vdd33io p refer to the device reference schematic for connection information. 2 digital core power supply output vddcore p refer to chapter 4, "power connections," on page 25 and the device reference schematic for connection information. exposed pad on package bottom ( figure 3.1 ) ground vss p common ground table 3.6 ethernet ph y pins (continued) num pins name symbol buffer type description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 23 revision 1.1 (04-18-13) datasheet 3.1 pin assignments table 3.8 no-connect pins num pins name symbol buffer type description 1 no connect nc - these pins must be left floating for normal device operation. table 3.9 56-qfn package pin assignments pin num pin name pin num pin name pin num pin name pin num pin name 1 nphy_int 15 vdd33a 29 eeclk/ pwr_sel 43 txen 2 txn 16 usbrbias 30 eecs 44 rxer 3 txp 17 vddusbpll 31 eedo/ automdix_en 45 crs/gpio3 4 vdd33a 18 xi 32 eedi 46 col/gpio0 note 3.4 5 rxn 19 xo 33 test3 47 txclk 6 rxp 20 vbus_det note 3.4 34 phy_sel 48 vdd33io 7 vdd33a note 3.3 21 vddcore 35 vdd33io 49 test1 8 exres 22 mdc/gpio2 36 ntrst/rxd0 50 vddcore 9 vdd33a 23 mdio/gpio1 note 3.4 37 tdo/nphy_rst 51 vdd33io 10 vddpll 24 nreset note 3.4 38 tck/rxd1 52 vdd33io 11 usbdm 25 vdd33io 39 tms/rxd2 53 txd3/gpio7/ eep_size 12 usbdp 26 nfdx_led/ gpio8 note 3.4 40 tdi/rxd3 54 txd2/gpio6/ port_swap 13 test2 27 nlnka_led/ gpio9 note 3.4 41 rxclk 55 txd1/gpio5/ rmt_wkp 14 nc 28 nspd_led/ gpio10 note 3.4 42 rxdv 56 txd0/gpio4/ eep_disable exposed pad must be connected to vss
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 24 smsc lan950x family datasheet note 3.3 this pin is a no-connect (nc) for lan9500a/lan9500ai, but may be connected to vdd33a for backward compat ibility with lan9500/lan9500i. note 3.4 for lan9500a/lan9500ai this pin provides add itional pme related functionality. refer to the respective pin descriptions and chapter 6, "pme operation," on page 41 for additional information. 3.2 buffer types table 3.10 buffer types buffer type description is schmitt-triggered input is_5v 5v tolerant schmitt-triggered input o8 output with 8ma sink and 8ma source od8 open-drain output with 8ma sink o12 output with 12ma sink and 12ma source od12 open-drain output with 12ma sink pu 50ua (typical) internal pull-up. unless otherwis e noted in the pin description, internal pull- ups are always enabled. note: internal pull-up resistors prevent unconnected inputs from floating. do not rely on internal resistors to drive signals external to the device. when connected to a load that must be pulled high, an ex ternal resistor must be added. pd 50ua (typical) internal pull-down. unless ot herwise noted in the pin description, internal pull-downs are always enabled. note: internal pull-down resistors prevent unconnected inputs from floating. do not rely on internal resistors to drive signals ex ternal to the device. when connected to a load that must be pulled low, an external resistor must be added. ai analog input aio analog bi-directional iclk crystal oscillator input pin oclk crystal oscillator output pin p power pin
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 25 revision 1.1 (04-18-13) datasheet chapter 4 power connections figure 4.1 illustrates the power connections for lan950x. figure 4.1 power connections (in) (out) internal core regulator vdd33io +3.3v vddcore vddcore core logic 1uf 0.1 ohm esr vddusbpll usb phy 0.1uf exposed pad vdd33a vdd33io 0.1uf vdd33io vdd33io vdd33io 0.1uf 0.1uf 0.1uf 0.1uf 0.1uf lan950x vdd33a vdd33a vdd33a 0.1uf 0.1uf 56-pin qfn 0.5a 120 ohm @ 100mhz vss vddpll 0.1uf pll & ethernet phy 0.5a 120 ohm @ 100mhz 0.1uf 0.5a 120 ohm @ 100mhz
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 26 smsc lan950x family datasheet chapter 5 eeprom controller (epc) lan950x may use an external eeprom to store th e default values for the usb descriptors and the mac address. the eeprom contro ller supports most ?93c46? type eeproms. the eep_size strap selects the size of the eeprom attached to the device. when this strap is set to ?0?, a 128 byte eeprom is attached and a total of seven address bi ts are used. when this strap is set to ?1? a 256/512 byte eeprom is attached and a total of nine address bits are used. note: a 3-wire style 1k/2k/4k eeprom that is organi zed for 128 x 8-bit or 256/512 x 8-bit operation must be used. the mac address is used as the de fault ethernet mac address and is loaded into the mac?s addrh and addrl registers. if a properly configured eeprom is not detected, it is the responsibility of the host lan driver to set the ieee addresses. after a system-level reset occurs, the device will load the default values from a properly configured eeprom. the device wil l not accept usb transactions from t he host until this process is completed. the device?s eeprom controller al so allows the host system to re ad, write and eras e the contents of the serial eeprom. 5.1 eeprom format table 5.1 illustrates the format in which da ta is stored inside of the eeprom. note the eeprom offsets are given in units of 16-bit word offsets. a length field with a value of zero indicates that the field does not exist in the eeprom . the device will use the field?s hw default value in this case. note: for the device descriptor, the only valid values for the length are 0 and 18. note: for the configuration and interface descriptor, the only valid values for the length are 0 and 18. note: the eeprom programmer must ensu re that if a string descri ptor does not exist in the eeprom, the referencing descripto r must contain 00h for the re spective string index field. note: if all string descriptor lengths are zero, then a language id will not be supported. table 5.1 eeprom format eeprom address eeprom contents 00h 0xa5 01h mac address [7:0] 02h mac address [15:8] 03h mac address [23:16] 04h mac address [31:24] 05h mac address [39:32] 06h mac address [47:40] 07h full-speed polling interval for interrupt endpoint 08h hi-speed polling interval for interrupt endpoint
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 27 revision 1.1 (04-18-13) datasheet note: eeprom byte addresses past the indicat ed address can be used to store data for any purpose: lan9500/lan9500i - 1dh lan9500a/lan9500ai - 20h 09h configuration flags 0ah language id descriptor [7:0] 0bh language id descriptor [15:8] 0ch manufacturer id string descriptor length (bytes) 0dh manufacturer id string descriptor eeprom word offset 0eh product name string descriptor length (bytes) 0fh product name string descriptor eeprom word offset 10h serial number string descriptor length (bytes) 11h serial number string descriptor eeprom word offset 12h configuration string descriptor length (bytes) 13h configuration string descriptor word offset 14h interface string descriptor length (bytes) 15h interface string descriptor word offset 16h hi-speed device descriptor length (bytes) 17h hi-speed device descriptor word offset 18h hi-speed configuration and interface descriptor length (bytes) 19h hi-speed configuration and interface descriptor word offset 1ah full-speed device descriptor length (bytes) 1bh full-speed device descriptor word offset 1ch full-speed configuration and interface descriptor length (bytes) 1dh full-speed configuration and interface descriptor word offset 1eh (lan9500a/lan9500ai only) gpio7:0 wakeup enables bit x = 0 -> gpiox pin disabled for wakeup use. bit x = 1 -> gpiox pin enabled for wakeup use. 1fh (lan9500a/lan9500ai only) gpi010:8 wakeup enables bit x = 0 -> gpio(x+8) pi n disabled for wakeup use. bit x = 1 -> gpio(x+8) pin enabled for wakeup use. note: bits 7:3 unused. 20h (lan9500a/lan9500ai only) gpio pme flags table 5.1 eeprom format (continued) eeprom address eeprom contents
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 28 smsc lan950x family datasheet table 5.2 describes the configuration flags. table 5.2 configuration flags bits description 7:6 reserved 5:4 (lan9500a/lan9500ai only , otherwise reserved) phy boost this field provides the ability to boost the electrical drive strength of the hs output current to the upstream port. 00 = normal electrical drive strength. 01 = elevated electrical dr ive strength (+4% boost). 10 = elevated electrical dr ive strength (+8% boost). 11 = elevated electrical drive strength (+12% boost). 3 reserved 2 remote wakeup support 0 = the device does not support remote wakeup. 1 = the device supports remote wakeup. 1 (lan9500a/lan9500ai only , otherwise reserved) led select this bit determines the functionality of external led pins. 0 power method 0 = the device is bus powered. 1 = the device is self powered. bit value pin name function 0 nspd_led speed indicator nlnka_led link and activity indicator nfdx_led full duplex link indicator 1 nspd_led speed indicator nlnka_led link indicator nfdx_led activity indicator
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 29 revision 1.1 (04-18-13) datasheet table 5.3 describes the gpio pme flags (lan9500a/lan9500ai only) . table 5.3 gpio pme flags bits description 7 gpio pme enable setting this bit enables the assertion of the gpio0 or gpio8 pin, as a result of a wakeup (gpio) pin, magic packet, or phy link up. the host processor may use the gpio0/gpio8 pin to asynchronously wake up, in a manner analogous to a pci pme pin. gpio0 signals the event when operating in internal phy mode, while gpio8 signals the event when operati ng in external phy mode. internal or external phy mode of operation is dictated by the phy_sel pin. 0 = the device does not support gpio pme signaling. 1 = the device supports gpio pme signaling. note: when this bit is 0, the remaining gpio pme parameters in this flag byte are ignored. 6 gpio pme configuration this bit selects whether the gpio pme is signaled on the gpio pin as a level or a pulse. if pulse is selected, the duration of the pulse is determined by the setting of the gpio pme length bit of this flag byte. the level of the signal or the pola rity of the pulse is determined by the gpio pme polarity bit of this flag byte. 0 = gpio pme is signaled via a level. 1 = gpio pme is signaled via a pulse. note: if gpio pme enable is 0, this bit is ignored. 5 gpio pme length when the gpio pme configuration bit of this flag byte indicates that the gpio pme is signaled by a pulse on the gpio pin, this bit de termines the duration of the pulse. 0 = gpio pme pulse length is 1.5 ms. 1 = gpio pme pulse length is 150 ms. note: if gpio pme enable is 0, this bit is ignored. 4 gpio pme polarity specifies the level of the si gnal or the polarity of the pulse used for gpio pme signaling. 0 = gpio pme signaling polarity is low. 1 = gpio pme signaling polarity is high. note: if gpio pme enable is 0, this bit is ignored. 3 gpio pme buffer type this bit selects the output buffer type for gpio0/gpio8. 0 = open drain driver / open source 1 = push-pull driver note: buffer type = 0, polarity = 0 implies open drain buffer type = 0, polarity = 1 implies open source note: if gpio pme enable is 0, this bit is ignored. 2 gpio pme wol select three types of wakeup events are supported; m agic packet, phy link up, and wakeup pin(s) asser- tion. wakeup pin(s) are selected via the gpio wakeup enables specified in bytes 1eh and 1fh of the eeprom. this bit selects whether magic packet or link up wakeup events are supported. 0 = magic packet wakeup supported. 1 = phy linkup wakeup supported. ( not supported in external phy mode) note: if gpio pme enable is 0, this bit is ignored.
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 30 smsc lan950x family datasheet 5.2 eeprom defaults the signature value of 0xa5 is stored at address 0. a different signature value indicates to the eeprom controller that no eeprom or an un-progr ammed eeprom is attached to the device. in this case, the hardware default values are used, as shown in ta b l e 5 . 4 . note: the configuration flags are affected by the pwr_sel and rmt_wkp straps. 1 gpio10 detection select this bit selects the detection mode for gpio10 when operating in pme mode. in pme mode, gpio10 is usable in both internal and external phy mode as a wakeup pin. this parameter defines whether the wakeup should occur on an active high or active low signal. 0 = active-low detection for gpio10. 1 = active-high detection for gpio10. note: if gpio pme enable is 0, this bit is ignored. 0 reserved table 5.4 eeprom defaults field default value mac address ffffffffffffh full-speed polling interval (ms) 01h hi-speed polling interval (ms) 04h configuration flags 04h maximum power (ma) fah vendor id 0424h product id table 5.3 gpio pme flags (continued) bits description device product id lan9500/lan9500i 9500h lan9500a/lan9500ai 9e00h
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 31 revision 1.1 (04-18-13) datasheet 5.3 eeprom auto-load certain system level resets (usb reset, por, nreset, and srst) cause the eeprom contents to be loaded into the device. after a reset, the eeprom controller attempts to read the first byte of data from the eeprom. if the value 0xa5 is read from the first address, then th e eeprom controller will assume that an external serial eeprom is present. note: the usb reset only loads the mac address. 5.4 examples of eeprom format interpretation 5.4.1 lan9500/lan9500i table 5.5 and table 5.6 provide an example of how the conten ts of a eeprom are formatted in the case of lan9500/lan9500i. ta b l e 5 . 5 is a dump of the eeprom memory (256-byte eeprom), while table 5.6 illustrates, byte by byte , how the eeprom is formatted. table 5.5 dump of eeprom memory - lan9500/lan9500i offset byte value 0000h a5 12 34 56 78 9a bc 01 0008h 04 04 09 04 0a 0f 10 14 0010h 10 1c 00 00 00 00 12 24 0018h 12 2d 12 36 12 3f 0a 03 0020h 53 00 4d 00 53 00 43 00 0028h 10 03 4c 00 41 00 4e 00 0030h 39 00 35 00 30 00 30 00 0038h 10 03 30 00 30 00 30 00 0040h 35 00 31 00 32 00 33 00 0048h 12 01 00 02 ff 00 01 40 0050h 24 04 00 95 00 01 01 02 0058h 03 01 09 02 27 00 01 01 0060h 00 a0 fa 09 04 00 00 03 0068h ff 00 ff 00 12 01 00 02 0070h ff 00 01 40 24 04 00 95 0078h 00 01 01 02 03 01 09 02 0080h 27 00 01 01 00 a0 fa 09 0088h 04 00 00 03 ff 00 ff 00 0090h - 00ffh ..............................................
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 32 smsc lan950x family datasheet table 5.6 eeprom example - 256 byte eeprom - l an9500/lan9500i eeprom address eeprom contents (hex) description 00h a5 eeprom programmed indicator 01h - 06h 12 34 56 78 9a bc mac address 12 34 56 78 9a bc 07h 01 full-speed polling interval for interrupt endpoint (1ms) 08h 04 hi-speed polling interval for interrupt endpoint (4ms) 09h 04 configuration flags - the device is bus powered and supports remote wakeup. 0ah - 0bh 09 04 language id descriptor 0409h, english 0ch 0a manufacturer id string descriptor length (10 bytes) 0dh 0f manufacturer id string descr iptor eeprom word offset (0fh) corresponds to eeprom byte offset 1eh 0eh 10 product name string descriptor length (16 bytes) 0fh 14 product name string descrip tor eeprom word offset (14h) corresponds to eeprom byte offset 28h 10h 10 serial number string descriptor length (16 bytes) 11h 1c serial number string descr iptor eeprom word offset (1ch) corresponds to eeprom byte offset 38h 12h 00 configuration string descriptor length (0 bytes - na) 13h 00 configuration string descriptor word offset (don?t care) 14h 00 interface string descrip tor length (0 bytes - na) 15h 00 interface string descrip tor word offset (don?t care) 16h 12 hi-speed device descriptor length (18 bytes) 17h 24 hi-speed device descriptor word offset (24h) corresponds to eeprom byte offset 48h 18h 12 hi-speed configuration and interface descriptor length (18 bytes) 19h 2d hi-speed configuration and interface descriptor word offset (2dh) corresponds to eeprom byte offset 5ah 1ah 12 full-speed device descriptor length (18 bytes) 1bh 36 full-speed device descriptor word offset (36h) corresponds to eeprom byte offset 6ch 1ch 12 full-speed configuration and interface descriptor length (18bytes) 1dh 3f full-speed configuration and interface descriptor word offset (3fh) corresponds to eeprom byte offset 7eh 1eh 0a size of manufacturer id string descriptor (10 bytes)
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 33 revision 1.1 (04-18-13) datasheet 1fh 03 descriptor type (string descriptor - 03h) 20h-27h 53 00 4d 00 53 00 43 00 manufac turer id string (?smsc? in unicode) 28h 10 size of product name string descriptor (16 bytes) 29h 03 descriptor type (string descriptor - 03h) 2ah-37h 4c 00 41 00 4e 00 39 00 35 00 30 00 30 00 product name string (?lan9500? in unicode) 38h 10 size of serial number string descriptor (16 bytes) 39h 03 descriptor type (string descriptor - 03h) 3ah-47h 30 00 30 00 30 00 35 00 31 00 32 00 33 00 serial number string (?0005123? in unicode) 48h 12 size of hi-speed device descriptor in bytes (18 bytes) 49h 01 descriptor type (device descriptor - 01h) 4ah-4bh 00 02 usb specification number th at the device complies with (0200h) 4ch ff class code 4dh 00 subclass code 4eh 01 protocol code 4fh 40 maximum packet size for endpoint 0 50h-51h 24 04 vendor id (0424h) 52h-53h 00 95 product id (9500h) 54h-55h 00 01 device release number (0100h) 56h 01 index of manufacturer string descriptor 57h 02 index of product string descriptor 58h 03 index of serial number string descriptor 59h 01 number of possible configurations 5ah 09 size of hi-speed configuration descriptor in bytes (9 bytes) 5bh 02 descriptor type (configuration descriptor - 02h) 5ch-5dh 27 00 total length in bytes of data returned (0027h = 39 bytes) 5eh 01 number of interfaces 5fh 01 value to use as an argument to select this configuration 60h 00 index of string descriptor describing this configuration 61h a0 bus powered and remote wakeup enabled table 5.6 eeprom example - 256 byte eeprom - lan9500/lan9500i (continued) eeprom address eeprom contents (hex) description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 34 smsc lan950x family datasheet 62h fa maximum power consumption is 500 ma 63h 09 size of descriptor in bytes (9 bytes) 64h 04 descriptor type (int erface descriptor - 04h) 65h 00 number identifying this interface 66h 00 value used to select alternative setting 67h 03 number of endpoints used for this interface (less endpoint 0) 68h ff class code 69h 00 subclass code 6ah ff protocol code 6bh 00 index of string descriptor describing this interface 6ch 12 size of full-speed device descriptor in bytes (18 bytes) 6dh 01 descriptor type (device descriptor - 01h) 6eh-6fh 00 02 usb specification number th at the device complies with (0200h) 70h ff class code 71h 00 subclass code 72h 01 protocol code 73h 40 maximum packet size for endpoint 0 74h-75h 24 04 vendor id (0424h) 76h-77h 00 95 product id (9500h) 78h-79h 00 01 device release number (0100h) 7ah 01 index of manufacturer string descriptor 7bh 02 index of product string descriptor 7ch 03 index of serial number string descriptor 7dh 01 number of possible configurations 7eh 09 size of full-speed configuration descriptor in bytes (9 bytes) 7fh 02 descriptor type (configuration descriptor - 02h) 80h-81h 27 00 total length in bytes of data returned (0027h = 39 bytes) 82h 01 number of interfaces 83h 01 value to use as an argument to select this configuration 84h 00 index of string descriptor describing this configuration table 5.6 eeprom example - 256 byte eeprom - lan9500/lan9500i (continued) eeprom address eeprom contents (hex) description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 35 revision 1.1 (04-18-13) datasheet 5.4.2 lan9500a/lan9500ai table 5.7 and table 5.8 provide an example of how the conten ts of a eeprom are formatted in the case of lan9500a/lan9500ai. ta b l e 5 . 7 is a dump of the eeprom memory (256-byte eeprom), while ta b l e 5 . 8 illustrates, byte by byte , how the eeprom is formatted. 85h a0 bus powered and remote wakeup enabled 86h fa maximum power consumption is 500 ma 87h 09 size of full-speed interface descriptor in bytes (9 bytes) 88h 04 descriptor type (int erface descriptor - 04h) 89h 00 number identifying this interface 8ah 00 value used to select alternative setting 8bh 03 number of endpoints used for this interface (less endpoint 0) 8ch ff class code 8dh 00 subclass code 8eh ff protocol code 8fh 00 index of string descriptor describing this interface 90h- ffh - data storage for use by host as desired table 5.7 dump of eeprom memory - lan9500a/lan9500ai offset byte value 0000h a5 12 34 56 78 9a bc 01 0008h 04 04 09 04 0a 11 12 16 0010h 10 1f 00 00 00 00 12 27 0018h 12 30 12 39 12 42 00 04 0020h 8a 00 0a 03 53 00 4d 00 0028h 53 00 43 00 12 03 4c 00 0030h 41 00 4e 00 39 00 35 00 0038h 30 00 30 00 41 00 10 03 0040h 30 00 30 00 30 00 35 00 0048h 31 00 32 00 33 00 12 01 table 5.6 eeprom example - 256 byte eeprom - lan9500/lan9500i (continued) eeprom address eeprom contents (hex) description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 36 smsc lan950x family datasheet 0050h 00 02 ff 00 ff 40 24 04 0058h 00 9e 00 01 01 02 03 01 0060h 09 02 27 00 01 01 00 a0 0068h fa 09 04 00 00 03 ff 00 0070h ff 00 12 01 00 02 ff 00 0078h ff 40 24 04 00 9e 00 01 0080h 01 02 03 01 09 02 27 00 0088h 01 01 00 a0 fa 09 04 00 0090h - 00ffh 00 03 ff 00 ff 00 ......... table 5.8 eeprom example - 256 by te eeprom - lan9500a/lan9500ai eeprom address eeprom contents (hex) description 00h a5 eeprom programmed indicator 01h - 06h 12 34 56 78 9a bc mac address 12 34 56 78 9a bc 07h 01 full-speed polling interval for interrupt endpoint (1ms) 08h 04 hi-speed polling interval for interrupt endpoint (4ms) 09h 04 configuration flags - no phy boost, the device is bus powered and supports remote wakeup, nspd_led = speed indicator, nlnka_led = link and activity indicator, nfdx_led = full duplex link indicator. 0ah - 0bh 09 04 language id descriptor 0409h, english 0ch 0a manufacturer id string descriptor length (10 bytes) 0dh 11 manufacturer id string descriptor eeprom word offset (11h) corresponds to eeprom byte offset 22h 0eh 12 product name string descriptor length (18 bytes) 0fh 16 product name string descrip tor eeprom word offset (16h) corresponds to eeprom byte offset 2ch 10h 10 serial number string descriptor length (16 bytes) 11h 1f serial number string descr iptor eeprom word offset (1fh) corresponds to eeprom byte offset 3eh 12h 00 configuration string descriptor length (0 bytes - na) 13h 00 configuration string descriptor word offset (don?t care) table 5.7 dump of eeprom memory - lan9500a/lan950 0ai (continued) offset byte value
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 37 revision 1.1 (04-18-13) datasheet 14h 00 interface string descrip tor length (0 bytes - na) 15h 00 interface string descrip tor word offset (don?t care) 16h 12 hi-speed device descriptor length (18 bytes) 17h 27 hi-speed device descriptor word offset (27h) corresponds to eeprom byte offset 4eh 18h 12 hi-speed configuration and interface descriptor length (18 bytes) 19h 30 hi-speed configuration and inte rface descriptor word offset (30h) corresponds to eeprom byte offset 60h 1ah 12 full-speed device descriptor length (18 bytes) 1bh 39 full-speed device descriptor word offset (39h) corresponds to eeprom byte offset 72h 1ch 12 full-speed configuration and interface descriptor length (18bytes) 1dh 42 full-speed configuration and interface descriptor word offset (42h) corresponds to eeprom byte offset 84h 1eh 00 gpio7:0 wake enables - gpio7:0 not used for wakeup signaling 1fh 04 gpio10:8 wake enables - gpio10 used for wakeup signaling 20h 8a gpio pme flags - pme signaling enabled via low level, push-pull driver, gpio10 active high detection. 21h 00 pad byte - used to align following descriptor on word boundary 22h 0a size of manufacturer id string descriptor (10 bytes) 23h 03 descriptor type (string descriptor - 03h) 24h - 2bh 53 00 4d 00 53 00 43 00 manufacturer id string (?smsc? in unicode) 2ch 12 size of product name string descriptor (18 bytes) 2dh 03 descriptor type (string descriptor - 03h) 2eh - 3dh 4c 00 41 00 4e 00 39 00 35 00 30 00 30 00 41 00 product name string (?lan9500a? in unicode) 3eh 10 size of serial number string descriptor (16 bytes) 3fh 03 descriptor type (string descriptor - 03h) 40h - 4dh 30 00 30 00 30 00 35 00 31 00 32 00 33 00 serial number string (?0005123? in unicode) 4eh 12 size of hi-speed device descriptor in bytes (18 bytes) 4fh 01 descriptor type (device descriptor - 01h) 50h - 51h 00 02 usb specification number that the device complies with (0200h) 52h ff class code table 5.8 eeprom example - 256 byte eeprom - lan9500 a/lan9500ai (continued) eeprom address eeprom contents (hex) description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 38 smsc lan950x family datasheet 53h 00 subclass code 54h ff protocol code 55h 40 maximum packet size for endpoint 0 56h - 57h 24 04 vendor id (0424h) 58h - 59h 00 9e product id (9e00h) 5ah - 5bh 00 01 device release number (0100h) 5ch 01 index of manufacturer string descriptor 5dh 02 index of product string descriptor 5eh 03 index of serial number string descriptor 5fh 01 number of possible configurations 60h 09 size of hi-speed configuration descriptor in bytes (9 bytes) 61h 02 descriptor type (configuration descriptor - 02h) 62h - 63h 27 00 total length in bytes of data returned (0027h = 39 bytes) 64h 01 number of interfaces 65h 01 value to use as an argument to select this configuration 66h 00 index of string descriptor describing this configuration 67h a0 bus powered and remote wakeup enabled 68h fa maximum power consumption is 500 ma 69h 09 size of descriptor in bytes (9 bytes) 6ah 04 descriptor type (interface descriptor - 04h) 6bh 00 number identifying this interface 6ch 00 value used to select alternative setting 6dh 03 number of endpoints used for this interface (less endpoint 0) 6eh ff class code 6fh 00 subclass code 70h ff protocol code 71h 00 index of string descriptor describing this interface 72h 12 size of full-speed device descriptor in bytes (18 bytes) 73h 01 descriptor type (device descriptor - 01h) 74h - 75h 00 02 usb specification number that the device complies with (0200h) table 5.8 eeprom example - 256 byte eeprom - lan9500 a/lan9500ai (continued) eeprom address eeprom contents (hex) description
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 39 revision 1.1 (04-18-13) datasheet 76h ff class code 77h 00 subclass code 78h ff protocol code 79h 40 maximum packet size for endpoint 0 7ah - 7bh 24 04 vendor id (0424h) 7ch - 7dh 00 9e product id (9e00h) 7eh - 7fh 00 01 device release number (0100h) 80h 01 index of manufacturer string descriptor 81h 02 index of product string descriptor 82h 03 index of serial number string descriptor 83h 01 number of possible configurations 84h 09 size of full-speed configuration descriptor in bytes (9 bytes) 85h 02 descriptor type (configuration descriptor - 02h) 86h - 87h 27 00 total length in bytes of data returned (0027h = 39 bytes) 88h 01 number of interfaces 89h 01 value to use as an argument to select this configuration 8ah 00 index of string descriptor describing this configuration 8bh a0 bus powered and remote wakeup enabled 8ch fa maximum power consumption is 500 ma 8dh 09 size of full-speed interface descriptor in bytes (9 bytes) 8eh 04 descriptor type (interface descriptor - 04h) 8fh 00 number identifying this interface 90h 00 value used to select alternative setting 91h 03 number of endpoints used for this interface (less endpoint 0) 92h ff class code 93h 00 subclass code 94h ff protocol code 95h 00 index of string descriptor describing this interface 96h - ffh - data storage for use by host as desired table 5.8 eeprom example - 256 byte eeprom - lan9500 a/lan9500ai (continued) eeprom address eeprom contents (hex) description
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 40 smsc lan950x family datasheet 5.5 customized operation without eeprom customized operation without eeprom is supported only by lan9500a/lan9500ai. the device provides the capability to customize operation without the use of an eeprom. descriptor information and initializ ation quantities normally fetched from eeprom a nd used to initialize descriptors and elements of the system control and status registers may be specified via an alternate mechanism. this alternate mechanism involves the use of the descriptor ram in conjunction with the attribute registers and select elements of the sy stem control and status registers. the software device driver orchestrates the pr ocess by performing the following actions in the order indicated: ? initialization of system control and status register elements in lieu of eeprom load ? attribute register initialization ? descriptor ram initialization ? enable descriptor ram and flag attribute registers as source ? inhibit reset of select system co ntrol and status register elements
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 41 revision 1.1 (04-18-13) datasheet chapter 6 pme operation pme operation is supported only by lan9500a/lan9500ai. the device provides a mechanism for waking up a host system vi a pme mode of operation. pme signaling is only available while the device is operating in the self powered mode. figure 6.1 illustrates a typical application using lan9500a/lan9500ai. figure 6.1 typical application lan9500a/ lan9500ai embedded controller chipset dp/dm pme pme_mode_sel enable hc pme_clear vbus_det eeprom host processor
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 42 smsc lan950x family datasheet the host processor is connected to a chipset containing the host usb controller (hc). the usb host controller interfaces to the device via the dp/dm usb signals. an embedded controller (ec) signals the chipset and the host processor to power up vi a an enable signal. the ec interfaces to the device via four signals. the pme signal is an input to t he ec from the device that indicates the occurrence of a wakeup event. the vbus_det out put of the ec is used to indicate bus power availability. the pme_clear (nreset) signal is us ed to clear the pme. the pme_mode_sel si gnal is sampled by the device when pme_clear (nreset) is asserted and is used by the dev ice to determine whether it should remain in pme mode or resume normal operation. gpio pins are used for pme handling. the pins used depend on the value of the phy_sel pin, which determines phy mode of operation. in internal phy mode of operation, gpio0 is reserved for use as an output to signal the pme. gpio1 is reserved for use as the pme_mode_sel input. gpio8 and gpio9 are reserved for analogous use, respec tively, in external phy mode of operation. the application scenario in figure 6.1 assumes that the host processor and the chipset are powered off, the ec is operational, and the device is in pme mode, waiting for a wake event to occur. a wake event will result in the device signaling a pme event to the ec, which will then wake up the host processor and chipset via the enable signal. the ec asserts vbus_det after the usb bus is powered, sets pme_mode_sel to determine whether the device is to begin normal operation or continue in pme mode, and asserts pme_clear (nreset) to clear the pme. the following wake events are supported: ? wakeup pin(s) the gpio pins not reserved for pme handling have the capability to wake up the device when operating in pme mode. in order for a gpio to gen erate a wake event, it?s enable bit must be set in the gpi010:8 wakeup enables or gpio7:0 wakeup enables bytes of the eeprom, as appropriate. during pme mode of operation, t he gpios used for signaling (gpios 0 and 1 or gpios 8 and 9) are not affected by the values set in the corresponding bits of gpi010:8 wakeup enables or gpio7:0 wakeup enables . gpio10 is available as a wakeup pin in external phy mode, while gpios 2 - 10 are available in internal phy mode. the gpio10 detection select bit in the gpio pme flags byte of the eeprom sets the detection mode for gpio10 in both external and internal phy mode (if set in gpi010:8 wakeup enables ), while gpios 2 - 9 are fixed as active low when operating in internal phy mode. ? magic packet reception of a magic packet when in pme mode will result in a pme being asserted. ? phy link up detection of a phy link partner when in pme mode will result in a pme being asserted. in order to facilitate pme mode of operation, the gpio pme enable bit in the gpio pme flags field, must be set and all remaining gpio pme flags field bits must be appropriately configured for pulse or level signaling, buffer type, and gpio pme wo l selection. the pme event is signaled on gpio0 (external phy mode) or gpio8, depending on the phy mode of operation. the pme_mode_sel pin (gpio1 in internal m ode of operation, gpio9 in external mode of operation) must be driven to the value that determi nes whether or not the device remains in pme mode of operation (1) or resumes normal operation (0) when the pme is recognized and cleared by the ec via pme_clear (nreset) assertion. note: when in pme mode, nreset or por will always cause the contents of the eeprom to be reloaded. note: gpio10 may be used in pme and external phy mode to connect to an external phy?s link led, in order to generate a phy link up wake event.
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 43 revision 1.1 (04-18-13) datasheet figure 6.2 flowcharts pme operation while in internal phy mode. the following conditions hold: eeprom configuration: ? gpio pme enable = 1 (enabled) ? gpio pme configuration = 0 (pme signaled via level on gpio pin) ? gpio pme length = 0 (na) ? gpio pme polarity = 1 (high level signals event) ? gpio pme buffer type = 1 (push-pull) ? gpio pme wol select = 0 (magic packet wakeup) ? gpio10 detection select = 0 (active-low detection) ? power method = 1 (self powered) ? mac address for magic packet pme signaling configuration (as determined by phy mode) ? gpio0 signals pme ? gpio1 is pme_mode_sel note: a por occurring when pme_mode_sel = 1 and an eeprom present with the gpio pme enable set results in the device entering pme mode.
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 44 smsc lan950x family datasheet figure 6.2 pme operation wakeup event detected by device? host & chipset powered off device asserts pme true false vbus_det set to 0 by ec or via circuitry ec sets pme_mode_sel = 1 and pulses pme_clear low device has eeprom with gpio pme enable =1, enters pme mode ec detects pme ec to wake system to process wakeup event? ec asserts pme_clear device resets and deasserts pme vbus_det set to 1 by ec or via circuitry ec sets pme_mode_sel = 0 and asserts pme_clear ec signals enable to host device resets and deasserts pme device connects to usb bus device is in normal operation yes no
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 45 revision 1.1 (04-18-13) datasheet chapter 7 netdetach operation netdetach operation is supported only by lan9500a/lan9500ai . netdetach is a mode of operation where the devic e detaches from the usb bus after the ethernet cable is disconnected. this is advantageous for mo bile devices, as an at tached usb device may prevent the host cpu from entering the apci c3 state. allowing the cpu to enter the c3 state maximizes battery life, as the c3 state is the lowest of the four apci power states. when detached, the device is in a low power state. after the ethernet cabl e is reconnected, or a programmed gpio pin asserts, the device automatically attaches to the usb bus. gpio pin assertion is supported so that this feature can be used with external phy mode. in this case, the external phy?s link led would be connected to a gpio. figure 7.1 device detach usb electricals detach remove ethernet cable 1 ...zzz 2 battery-powered netbook pc may enter c3 sleep mode 3 ethernet smsc lan9500a/ lan9500ai
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 46 smsc lan950x family datasheet figure 7.2 device attach usb electricals attach insert ethernet cable 1 2 lan9500a enumerates and the driver is loaded 3 ethernet smsc lan9500a/ lan9500ai
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 47 revision 1.1 (04-18-13) datasheet chapter 8 operational characteristics 8.1 absolute maximum ratings* supply voltage (vdd33io, vdd33a) ( note 8.1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0v to +3.6v positive voltage on signal pins, with respect to ground ( note 8.2 ) . . . . . . . . . . . . . . . . . . . . . . . . . . +6v negative voltage on signal pins, with respect to ground ( note 8.3 ) . . . . . . . . . . . . . . . . . . . . . . . . -0.5v positive voltage on xi, with re spect to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 4.6v positive voltage on xo, with respect to ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2. 5v ambient operating temperature in still air (t a ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . note 8.4 storage temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55 o c to +150 o c lead temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . refer to jedec spec. j-std-020 hbm esd performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. note 8.5 iec61000-4-2 contact discharge esd performance ( note 8.6 ) . . . . . . . . . . . . . . . . . . . . . . . . . .+/-8kv iec61000-4-2 air-gap discharge esd performance ( note 8.6 ) . . . . . . . . . . . . . . . . . . . . . . . . .+/-15kv note 8.1 when powering this device from laboratory or system power supplies, it is important that the absolute maximum ratings not be exceeded or device failure can result. some power supplies exhibit voltage spikes on their outputs when ac power is switched on or off. in addition, voltage transients on the ac power line may appear on the dc output. if this possibility exists, it is suggeste d that a clamp circuit be used. note 8.2 this rating does not apply to the following pins: xi, xo, exres, usbrbias. note 8.3 this rating does not apply to the following pins: exres, usbrbias. note 8.4 0 o c to +70 o c for commercial version, -40 o c to +85 o c for industrial version. note 8.5 +/-8kv for lan9500/lan9500i, +/-5kv for lan9500a/lan9500ai note 8.6 performed by independent 3rd party test facility. *stresses exceeding those listed in this section c ould cause permanent damage to the device. this is a stress rating only. exposure to absolute maximum rating conditions for extended periods may affect device reliability. functional operation of the device at any condition exceeding those indicated in section 8.2, "operating conditions**" , section 8.4, "dc specifications" , or any other applicable section of this specification is not im plied. note, device signals are not 5 volt tolerant unless specified otherwise.
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 48 smsc lan950x family datasheet 8.2 operating conditions** supply voltage (vdd33a, vdd33bias, vdd33io) . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.3v +/- 300mv ambient operating temperature in still air (t a ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . note 8.4 **proper operation of the device is guaranteed on ly within the ranges specified in this section. 8.3 power consumption this section details the power consumption of the device as measured during various modes of operation. power consumption values are provided fo r both the device-only, and for the device plus ethernet components. power dissipation is determined by temperature, supply voltage, and external source/sink requirements. note: all current consumption and power dissipation values were measured at vdd33io and vdd33a equal to 3.3v. 8.3.1 suspend0 table 8.1 power consumption/dissip ation - suspend0 (lan9500/lan9500i) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 78 ma power dissipation (device only) 257 mw power dissipation (device and ethernet components) 395 mw table 8.2 power consumption/dissipation - suspend0 (lan9500a/lan9500ai) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 46 ma power dissipation (device only) 152 mw power dissipation (device and ethernet components) 291 mw
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 49 revision 1.1 (04-18-13) datasheet 8.3.2 suspend1 8.3.3 suspend2 note: suspend2 power consumption/dissipation va lues were measured in bus-powered mode. table 8.3 power consumption/dissip ation - suspend1 (lan9500/lan9500i) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 20 ma power dissipation (device only) 66 mw power dissipation (device and ethernet components) 66 mw table 8.4 power consumption/dissipation - suspend1 (lan9500a/lan9500ai) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 7.0 ma power dissipation (device only) 23.5 mw power dissipation (device and ethernet components) 27.5 mw table 8.5 power consumption/dissip ation - suspend2 (lan9500/lan9500i) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 0.624 ma power dissipation (device only) 2.1 mw power dissipation (device and ethernet components) 2.1 mw table 8.6 power consumption/dissipation - suspend2 (lan9500a/lan9500ai) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 1.6 ma power dissipation (device only) 5.3 mw power dissipation (device and ethernet components) 5.3 mw
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 50 smsc lan950x family datasheet 8.3.4 suspend3 note: suspend3 not supported by lan9500/lan9500i. 8.3.5 operational table 8.7 power consumption/dissipation - suspend3 (lan9500a/lan9500ai) parameter min typical max unit supply current (vdd33io, vdd33a) (device only) 24.5 ma power dissipation (device only) 81.2 mw power dissipation (device and ethernet components) 85.1 mw table 8.8 operational power consum ption/dissipation (lan9500/lan9500i) parameter min typical max unit 100base-tx full duplex (usb high-speed) supply current (vdd33io, vdd33a) (device only) 143 ma power dissipation (device only) 474 mw power dissipation (device and ethernet components) 618 mw 10base-t full duplex (usb high-speed) supply current (vdd33io, vdd33a) (device only) 103 ma power dissipation (device only) 342 mw power dissipation (device and ethernet components) 692 mw 100base-tx full duplex (usb full-speed) supply current (vdd33io, vdd33a) (device only) 139 ma power dissipation (device only) 460 mw power dissipation (device and ethernet components) 605 mw 10base-t full duplex (usb full-speed) supply current (vdd33io, vdd33a) (device only) 98 ma power dissipation (device only) 324 mw power dissipation (device and ethernet components) 673 mw
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 51 revision 1.1 (04-18-13) datasheet 8.3.6 customer evaluati on board operational cu rrent consumption*** ***total system current consumption as measur ed on the 5v usb vbus input to a bus-powered customer evaluation board, where vbus = 5.0v and vdd33io = vdd33a = 3.3v. table 8.9 operational power consumpt ion/dissipation (l an9500a/lan9500ai) parameter min typical max unit 100base-tx full duplex (usb high-speed) supply current (vdd33io, vdd33a) (device only) 69 ma power dissipation (device only) 228 mw power dissipation (device and ethernet components) 367 mw 10base-t full duplex (usb high-speed) supply current (vdd33io, vdd33a) (device only) 45 ma power dissipation (device only) 149 mw power dissipation (device and ethernet components) 489 mw 100base-tx full duplex (usb full-speed) supply current (vdd33io, vdd33a) (device only) 66 ma power dissipation (device only) 218 mw power dissipation (device and ethernet components) 356 mw 10base-t full duplex (usb full-speed) supply current (vdd33io, vdd33a) (device only) 43 ma power dissipation (device only) 142 mw power dissipation (device and ethernet components) 483 mw table 8.10 ceb operational current consumption (lan9500/lan9500i) parameter min typical max unit 100base-tx full duplex (usb high-speed) total smsc customer evaluation board current consumption 208 ma table 8.11 ceb operational current consumption (lan9500a/lan9500ai) parameter min typical max unit 100base-tx full duplex (usb high-speed) total smsc customer evaluation board current consumption 150 ma
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 52 smsc lan950x family datasheet 8.4 dc specifications table 8.12 i/o buffer characteristics parameter symbol min typ max units notes is type input buffer low input level high input level negative-going threshold positive-going threshold schmitttrigger hysteresis (v iht - v ilt ) input leakage (v in = vss or vdd33io) input capacitance v ili v ihi v ilt v iht v hys i ih c in -0.3 1.01 1.39 336 -10 1.19 1.59 399 3.6 1.39 1.8 485 10 3 v v v v mv ua pf schmitt trigger schmitt trigger note 8.7 is_5v type input buffer low input level high input level negative-going threshold positive-going threshold schmitttrigger hysteresis (v iht - v ilt ) input leakage (v in = vss or vdd33io) input leakage (v in = 5.5v) input capacitance v ili v ihi v ilt v iht v hys i ih i ih c in -0.3 1.01 1.39 336 -10 1.19 1.59 399 5.5 1.39 1.8 485 10 79 4 v v v v mv ua ua pf schmitt trigger schmitt trigger note 8.7 note 8.7 , note 8.8 o8 type buffers low output level high output level v ol v oh vdd33io - 0.4 0.4 v v i ol = 8ma i oh = -8ma od8 type buffer low output level v ol 0.4 v i ol = 8ma o12 type buffers low output level high output level v ol v oh vdd33io - 0.4 0.4 v v i ol = 12ma i oh = -12ma od12 type buffer low output level v ol 0.4 v i ol = 12ma iclk type buffer (xi input) low input level high input level v ili v ihi -0.3 1.4 0.5 3.6 v v note 8.9
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 53 revision 1.1 (04-18-13) datasheet note 8.7 this specification applies to all inputs and tri-stated bi-directional pins. internal pull-down and pull-up resistors add +/- 50ua per-pin (typical). note 8.8 this is the total 5.5v input leakage for the entire device. note 8.9 xi can optionally be driven from a 25mhz single-ended clock oscillator. note 8.10 measured at line side of transformer, line replaced by 100 (+/- 1%) resistor. note 8.11 offset from 16ns pulse width at 50% of pulse peak. note 8.12 measured differentially. note 8.13 min/max voltages guaranteed as measured with 100 resistive load. table 8.13 100base-tx transceiver characteristics parameter symbol min typ max units notes peak differential output voltage high v pph 950 - 1050 mvpk note 8.10 peak differential output voltage low v ppl -950 - -1050 mvpk note 8.10 signal amplitude symmetry v ss 98 - 102 % note 8.10 signal rise and fall time t rf 3.0 - 5.0 ns note 8.10 rise and fall symmetry t rfs --0.5ns note 8.10 duty cycle distortion d cd 35 50 65 % note 8.11 overshoot and undershoot v os --5% jitter 1.4 ns note 8.12 table 8.14 10base-t transceiver characteristics parameter symbol min typ max units notes transmitter peak differential output voltage v out 2.2 2.5 2.8 v note 8.13 receiver differential squelch threshold v ds 300 420 585 mv
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 54 smsc lan950x family datasheet 8.5 ac specifications this section details the various ac ti ming specifications of the device. note: the mii timing adheres to the ieee 802.3 specification. refe r to the ieee 802.3 specification for additional mii timing information. note: the usbdp and usbdm pin timing adheres to the usb 2.0 specification. refer to the universal serial bus revision 2.0 specification for detailed usb timing information. 8.5.1 equivalent test load output timing specifications assume t he 25pf equivalent test load illustrated in figure 8.1 below, unless otherwise specified. figure 8.1 output equivalent test load 25 pf output
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 55 revision 1.1 (04-18-13) datasheet 8.5.2 power-on configurat ion strap valid timing figure 8.2 illustrates the configuration strap valid timi ng requirement in relation to power-on. in order for valid configuration strap values to be read at power-on, the following timing requirements must be met. figure 8.2 power-on configuration strap valid timing table 8.15 power-on configuration strap valid timing symbol description min typ max units t cfg configuration strap valid time 15 ms vdd33io configuration straps t cfg 2.0v
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 56 smsc lan950x family datasheet 8.5.3 reset and confi guration strap timing figure 8.3 illustrates the nreset pin timing requirement s and its relation to the configuration strap pins and output drive. as sertion of nreset is not a requirement. however, if used, it must be asserted for the minimum period specified. figure 8.3 nreset reset pin timing table 8.16 nreset reset pin timing values symbol description min typ max units t rstia nreset input assertion time 1 us t css configuration strap pins setup to nreset deassertion 200 ns t csh configuration strap pins hold after nreset deassertion 10 ns t odad output drive after deassertion 30 ns t css nreset configuration strap pins t rstia t csh output drive t odad
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 57 revision 1.1 (04-18-13) datasheet 8.5.4 eeprom timing the following specifies the eeprom ti ming requirements for the device: figure 8.4 eeprom timing table 8.17 eeprom timing values symbol description min typ max units t ckcyc eeclk cycle time 1110 1130 ns t ckh eeclk high time 550 570 ns t ckl eeclk low time 550 570 ns t cshckh eecs high before rising edge of eeclk 1070 ns t cklcsl eeclk falling edge to eecs low 30 ns t dvckh eedo valid before rising edge of eeclk 550 ns t ckhdis eedo disable after rising edge eeclk 550 ns t dsckh eedi setup to rising edge of eeclk 90 ns t dhckh eedi hold after rising edge of eeclk 0 ns t ckldis eeclk low to data disable (output) 580 ns t cshdv eedio valid after eecs high (verify) 600 ns t dhcsl eedio hold after eecs low (verify) 0 ns t csl eecs low 1070 ns eeclk eedo eedi eecs t ckldis t cshckh eedi (verify) t ckh t ckl t ckcyc t cklcsl t csl t dvckh t ckhdis t dsckh t dhckh t dhcsl t cshdv
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 58 smsc lan950x family datasheet 8.5.5 mii in terface timing this section specifies the mii interface transmit and receive timing. note 8.14 timing was designed for system load between 10 pf and 25 pf. figure 8.5 mii transmit timing table 8.18 mii transmit timing values symbol description min max units notes t clkp txclk period 40 ns t clkh txclk high time t clkp *0.4 t clkp *0.6 ns t clkl txclk low time t clkp *0.4 t clkp *0.6 ns t val txd[3:0], txen output valid from rising edge of txclk 22.0 ns note 8.14 t hold txd[3:0], txen output hold from rising edge of txclk 0ns note 8.14 txclk txd[3:0] txen t clkh t clkl t clkp t val t hold t val t val t hold
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 59 revision 1.1 (04-18-13) datasheet note 8.15 timing was designed for system load between 10 pf and 25 pf. figure 8.6 mii receive timing table 8.19 mii receive timing values symbol description min max units notes t clkp rxclk period 40 ns t clkh rxclk high time t clkp *0.4 t clkp *0.6 ns t clkl rxclk low time t clkp *0.4 t clkp *0.6 ns t su rxd[3:0], rxdv setup time to rising edge of rxclk 8.0 ns note 8.15 t hold rxd[3:0], rxdv hold time after rising edge of rxclk 9.0 ns note 8.15 rxclk t su rxd[3:0] rxdv t clkh t clkl t clkp t hold t su t hold t hold t su t hold
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 60 smsc lan950x family datasheet 8.5.6 turbo mii interface timing this section specifies the turbo mii in terface transmit and receive timing. note 8.16 timing was designed for system load between 10 pf and 15 pf. figure 8.7 turbo mii transmit timing table 8.20 turbo mii transmit timing values symbol description min max units notes t clkp txclk period 20 ns t clkh txclk high time t clkp *0.4 t clkp *0.6 ns t clkl txclk low time t clkp *0.4 t clkp *0.6 ns t val txd[3:0], txen output valid from rising edge of txclk 12.5 ns note 8.16 t hold txd[3:0], txen output hold from rising edge of txclk 1.5 ns note 8.16 txclk txd[3:0] txen t clkh t clkl t clkp t val t hold t val t val t hold
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 61 revision 1.1 (04-18-13) datasheet note 8.17 timing was designed for system load between 10 pf and 15 pf. figure 8.8 turbo mii receive timing table 8.21 turbo mii receive timing values symbol description min max units notes t clkp rxclk period 20 ns t clkh rxclk high time t clkp *0.4 t clkp *0.6 ns t clkl rxclk low time t clkp *0.4 t clkp *0.6 ns t su rxd[3:0], rxdv setup time to rising edge of rxclk 5.5 ns note 8.17 t hold rxd[3:0], rxdv hold time after rising edge of rxclk 0ns note 8.17 rxclk t su rxd[3:0] rxdv t clkh t clkl t clkp t hold t su t hold t hold t su t hold
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 62 smsc lan950x family datasheet 8.5.7 jtag timing this section specifies the jtag timing of the device. figure 8.9 jtag timing table 8.22 jtag timing values symbol description min max units notes t tckp tck clock period 66.67 ns t tckhl tck clock high/low time t tckp *0.4 t tckp *0.6 ns t su tdi, tms setup to tck rising edge 10 ns t h tdi, tms hold from tck rising edge 10 ns t dov tdo output valid from tck falling edge 16 ns t doinvld tdo output invalid from tck falling edge 0 ns tck (input) tdi, tms (inputs) t tckhl t tckp t tckhl t su t h t dov tdo (output) t doh
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 63 revision 1.1 (04-18-13) datasheet 8.6 clock circuit the device can accept either a 25mhz crystal (prefe rred) or a 25mhz single-ended clock oscillator (+/- 50ppm) input. if the single-ended clock oscillator method is implemented, xo should be left unconnected and xi should be driven with a nominal 0-3.3v clock signal. the input clock duty cycle is 40% minimum, 50% typical and 60% maximum. it is recommended that a crystal utilizing matchi ng parallel load capacitors be used for the crystal input/output signals (xi/xo). see table 8.23 for the recommended crystal specifications. note 8.18 the maximum allowable values for frequency tolerance and frequency stability are application dependant. since any particular application must meet the ieee +/-50 ppm total ppm budget, the combination of these tw o values must be approximately +/-45 ppm (allowing for aging). note 8.19 frequency deviation over time is also referred to as aging. note 8.20 the total deviation for the transmitter clock frequency is specified by ieee 802.3u as +/- 50 ppm. note 8.21 0 o c for commercial version, -40 o c for industrial version. note 8.22 +70 o c for commercial version, +85 o c for industrial version. note 8.23 this number includes the pad, the bond wire and the lead frame. pcb capacitance is not included in this value. the xo/xi pin and pcb capacitance values are required to accurately calculate the value of the two exte rnal load capacitors. these two external load capacitors determine the accuracy of the 25.000 mhz frequency. table 8.23 crystal specifications parameter symbol min nom max units notes crystal cut at, typ crystal oscillation mode fundamental mode crystal calibration mode parallel resonant mode frequency f fund - 25.000 - mhz frequency tolerance @ 25 o cf tol - - +/-50 ppm note 8.18 frequency stability over temp f temp - - +/-50 ppm note 8.18 frequency deviation over time f age - +/-3 to 5 - ppm note 8.19 total allowable ppm budget - - +/-50 ppm note 8.20 shunt capacitance c o -7 typ-pf load capacitance c l - 20 typ - pf drive level p w 300 - - uw equivalent series resistance r 1 --50ohm operating temperature range note 8.21 - note 8.22 o c xi pin capacitance - 3 typ - pf note 8.23 xo pin capacitance - 3 typ - pf note 8.23
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 64 smsc lan950x family datasheet chapter 9 package outline figure 9.1 lan950x 56-qfn package table 9.1 lan950x 56-qfn dimensions min nominal max remarks a 0.70 0.85 1.00 overall package height a1 0.00 0.02 0.05 standoff a2 - - 0.90 mold cap thickness d/e 7.85 8.00 8.15 x/y body size d1/e1 7.55 7.75 7.95 x/y mold cap size d2/e2 5.80 5.90 6.00 x/y exposed pad size l 0.30 0.40 0.50 terminal length b 0.18 0.25 0.30 terminal width k 0.55 - - center pad to pin clearance e 0.50 bsc terminal pitch
usb 2.0 to 10/100 ethernet controller datasheet smsc lan950x family 65 revision 1.1 (04-18-13) datasheet notes: 1. all dimensions are in mill imeters unless otherwise noted. 2. position tolerance of each terminal and exposed pad is +/- 0.05 mm at maxi mum material condition. dimension ?b? applies to plated terminals and is measured between 0.15 and 0.30 mm from the terminal tip. 3. the pin 1 identifier may vary, but is always located within the zone indicated. figure 9.2 lan950x 56-qfn recommended pcb land pattern
usb 2.0 to 10/100 ethernet controller datasheet revision 1.1 (04-18-13) 66 smsc lan950x family datasheet chapter 10 datasheet revision history table 10.1 customer revision history revision level and date section/figur e/entry correction rev. 1.1 (04-18-13) microchip logo added to cover, legal disclaimer modified. added to ordering information: ?please contact your smsc sales representati ve for additional documentation related to this product such as application notes, anomaly sheets, and design guidelines.? rev. 1.1 (07-15-11) ordering inform ation added tape and reel options. rev. 1.1 (07-12-11) figure 4.1 power connections on page 25 substitued ?u? and ?ohm ? for greek symbols mu and omega that were not properly displayed because of font issues. section 8.5.7, "jtag timing," on page 62 added this section. rev. 1.0 (05-17-10) initial release

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