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TB67S101AFG/ftg/fng 2013- 11- 05 1 toshiba bicd integrated circuit silicon monolithic tb67s10 1 afg, tb67s10 1 aftg, tb67s10 1 afng phase - in controlled bipolar stepping motor driver the tb67s10 1 a is a two - phase bipolar stepping motor driver using a pwm chopper. an interface is phase in contr ol . fabricated with the bicd process, rating is 50 v/4.0 a . features ? bicd process integrated monolithic ic. ? capable of controlling 1 bipolar stepping motor. ? pwm controlled constant - current drive. ? allows full, half, quarter step operation. ? low on - res istance (high + low side=0.49 (typ)) mosfet output stage. ? high effici ency motor current control mechanism (advanced dynamic mixed decay) ? high voltage and current (for specification, please refer to absolute maximum ratings and operation ranges) ? built- in error detection circuits (thermal shutdown (tsd) , over - current shutd own (isd), and power - on reset (por)) ? built- in v cc regulator for internal circuit use. ? chopping frequency of a motor can be customized by external resistance and condenser. ? multi packag e lineup tb67s10 1 afg : hsop28 -p-450- 0.8 0 tb67s10 1 aftg: p - wqfn48- 0707- 0.50- 003 tb67s10 1 afng: htssop48 -p- 300- 0.50 note) please be careful a bout thermal conditions during use. h sop 2 8 -p-045 0 -0. 8 0 fg p - wqf n48 - 0707 - 0.50 - 003 htssop 48-p- 300- 0 .5 0 ftg weight 0.10g (typ.) fng weight 0.21g (typ.) weight 0.79g (typ.)
TB67S101AFG/ftg/fng 2013- 11- 05 2 1. pin assignment (tb67s101a) please mount the fin of the hsop package to the gnd area of the pcb. please mount the four corner pins of the qfn package and the exposed pad to the gnd area of the pcb. (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 15 16 17 18 19 20 21 22 23 24 25 26 27 28 14 ina1 ina2 phasea phaseb inb1 inb2 standby fin(gnd) rsa nc outa nc gnd outa gnd gnd outb gnd nc outb nc rsb fin(gnd) vm vcc nc nc vrefb vrefa oscm fg (top view) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 3 4 33 32 31 30 29 28 27 26 13 14 15 16 17 18 19 20 21 22 23 24 25 48 47 46 45 44 43 42 41 40 39 38 37 f t g nc inb1 inb2 standby gnd nc rsa rsa nc outa outa nc nc nc gnd outa outa gnd gnd outb outb gnd nc nc nc outb outb nc rsb rsb nc vm nc vcc nc nc nc nc nc gnd vrefb vrefa oscm ina1 ina2 phasea phaseb nc
TB67S101AFG/ftg/fng 2013- 11- 05 3 please mount the exposed pad of the htssop package to the gnd area of the pcb. 1 2 3 4 5 6 7 15 16 17 18 19 20 28 29 30 31 32 33 34 42 43 44 45 46 47 48 21 oscm ina1 ina2 phasea phaseb nc nc nc outa outa nc nc gnd nc gnd nc nc nc outb+ outb+ n c nc vrefb nc vrefa nc gnd nc fng (top view) 22 23 24 25 26 27 8 9 10 11 12 13 14 35 36 37 38 39 40 41 inb1 inb2 standby gnd nc rsa rsa outa outa gnd gnd outb outb nc rsb rsb vm nc vcc nc
TB67S101AFG/ftg/fng 2013- 11- 05 4 2. tb67s101a bloc k diagram functional blocks/circuits/con stants in the block chart etc. may be omitted or simplified for explanatory purposes. inb1 inb2 standby phaseb phasea vrefa vrefb motor oscillator oscm vcc regulator vcc tsd isd rsb motor control logic predriver rsa vm current reference setting current comp current comp predriver current level set power - on reset osc - clock converter system oscillator gnd ina2 ina1 standby c ontrol + phase/step s elector + signal decode logic outb+ outb - outa+ outa -
TB67S101AFG/ftg/fng 2013- 11- 05 5 application notes all the grounding wires of the tb67s10 1 a must run on the solder mask on the pcb and be externally terminated at only one point. also, a grounding method should be considered for efficient heat dissipation. careful attention should be paid to the layout of the output, vdd(vm) and gnd traces, to avoid short circuits across output pins or to the power supply or ground. if such a short circuit occurs, t he device may be permanently damaged. also, the utmost care should be taken for pattern designing and implementation of the device since it has power supply pins (vm, rs, out, gnd) through which a particularly large current may run. if these pins are wired incorrectly, an operation error may occur or the device may be destroyed. the logic input pins must also be wired correctly. otherwise, the device may be damaged owing to a current running through the ic that is larger than the specified current.
TB67S101AFG/ftg/fng 2013- 11- 05 6 3. pin explanations tb67s101 a fg (hsop28) pin no.1 C 28 pin no. pin name function 1 ina1 motor ach excitation control input 1 2 ina2 motor ach excitation control input 2 3 phasea current direction signal i nput for m otor ach 4 phaseb current direction signal input for m otor bch 5 inb1 motor bch excitation control input 1 6 inb2 motor bch excitation control input 2 7 standby all - function- initializing and low power dissipation mode 8 r sa motor ach current sense pin 9 nc non - connection pin 10 outa+ motor ach (+) output pin 11 nc non - connection pin 12 gnd ground pin 13 outa motor ach ( - ) output pin 14 gnd ground pin 15 gnd ground pin 16 outb motor bch ( - ) output pin 17 gnd ground pin 18 nc non - co nnection pin 19 outb motor bch (+) output pin 20 nc non - connection pin 21 r sb motor bch current sense pin 22 vm motor power supply pin 23 vcc internal vcc regulator monitor pin 24 nc non - connection pin 25 nc non - connection pin 26 v ref b motor bch o utput set pin 27 v ref a motor ach output set pin 28 oscm oscillating circuit frequency for chopping set pin please do not run patterns under nc pins.
TB67S101AFG/ftg/fng 2013- 11- 05 7 3. pin explanations tb67s101 a ftg (qfn48) pin no.1 C 28 pin no. pin name function 1 n c non - connection pin 2 inb1 motor bch excitation control input 1 3 inb2 motor bch excitation control input 2 4 standby all - function- initializing and low power dissipation mode 5 gnd ground pin 6 nc non - connection pin 7 rsa( * ) motor ach current sense pin 8 rsa( * ) motor ach current sense pin 9 nc non - connection pin 10 outa (* ) motor ach (+) output pin 11 outa (* ) motor ach (+) output pin 12 nc non - connection pin 13 nc non - connection pin 14 nc non - connection pin 15 gnd ground pin 16 outa (* ) mot or a ch ( - ) output pin 17 outa (*) motor a ch ( - ) output pin 18 gnd ground pin 19 gnd ground pin 20 outb (* ) motor bch ( - ) output pin 21 outb (* ) motor bch ( - ) output pin 22 gnd ground pin 23 nc non - connection pin 24 nc non - connection pin 25 nc non - connection pin 26 outb (* ) motor b ch (+) output pin 27 outb (* ) motor b ch (+) output pin 28 nc non - connection pin
TB67S101AFG/ftg/fng 2013- 11- 05 8 pin no.29 C 48 pin no. pin name function 29 rsb( * ) motor b ch current sense pin 30 rsb( * ) motor b ch current sense pin 31 nc non - connection pin 32 vm motor power supply pin 33 nc non - connection pin 34 vcc internal vcc regulator monitor pin 35 nc non - connection pin 36 nc non - connection pin 37 nc non - connection pin 38 nc non - connection pin 39 nc non - connection pin 40 gnd ground pin 41 v ref b motor bch output set pin 42 v ref a motor ach output set pin 43 oscm oscillating circuit frequency for chopping set pin 44 ina1 motor ach excitation control input 1 45 ina2 motor ach excitation control input 2 46 phasea curr ent direction signal input for m otor ach 47 phaseb current direction signal input for m otor bch 48 nc non - connection pin (*) note: ? please do not run patterns under nc pins. ? please connect the pins with the same pi n name, while using the tb67s101 a.
TB67S101AFG/ftg/fng 2013- 11- 05 9 3. pin explanations tb67s101 a fng (h ts sop 48) pin no.1 C 28 pin no. pin name function 1 oscm oscillating circuit frequency for chopping set pin 2 nc non - connection pin 3 in a1 motor a ch excitation control input 1 4 ina2 moto r ach excitation control input 2 5 phasea current direction signal input for m otor ach 6 nc non - connection pin 7 phaseb current direction signal input for m otor bch 8 inb1 motor bch excitation control input 1 9 inb2 motor b ch excitation control input 2 10 standby all - function- initializing and low power dissipation mode 11 gnd ground pin 12 nc non - connection pin 13 rsa( * ) motor a ch current sense pin 14 rsa( *) motor a ch current sense pin 15 nc non - connection pin 16 outa (* ) motor a ch ( + ) output pi n 17 outa (* ) motor a ch ( + ) output pin 18 nc non - connection pin 19 nc non - connection pin 20 gnd ground pin 21 nc non - connection pin 22 outa (* ) motor a ch ( - ) output pin 23 outa (* ) motor a ch ( - ) output pin 24 gnd ground pin 25 gnd ground pin 26 o ut b(* ) motor bch ( - ) output pin 27 outb (* ) motor bch ( - ) output pin 28 nc non - connection pin
TB67S101AFG/ftg/fng 2013- 11- 05 10 pin no.29 C 48 pin no. pin name function 29 gnd ground pin 30 nc non - connection pin 31 nc non - connection pin 32 outb (* ) motor bch ( + ) output pin 33 outb (* ) motor bch ( + ) output pin 34 nc non - connection pin 35 rsb( * ) motor b ch current sense pin 36 rsb( * ) motor b ch current sense pin 37 nc non - connection pin 38 nc non - connection pin 39 vm motor power supply pin 40 nc non - connectio n pin 41 vcc internal vcc regulator monitor pin 42 nc non - connection pin 43 nc non - connection pin 44 nc non - connection pin 45 nc non - connection pin 46 gnd ground pin 47 vrefb motor bch output set pin 48 vrefa motor ach output set pin (*) note: ?p lease do not run patterns under nc pins. ? please connect the pins with the same pin name, while using the tb67s101a.
TB67S101AFG/ftg/fng 2013- 11- 05 11 4. input/output equivalent circuit (tb67s101a) pin name in/out signal equivalent circuit ina1 ina2 phase a inb 1 inb2 phase b standby digital input (vih/vil) vih: 2.0v(min)~5.5v(max) vil : 0v(min)~0.8v(max) vcc vrefa vref b vcc voltage range 4.75v(min)~5.0v(typ)~5.25v(max) vref voltage range 0v~3.6v oscm oscm frequency setting range 0.64mhz(min)~1.12mhz(typ)~2.4mhz(max) outa+ outa - outb+ outb - rsa rsb vm power supply voltage range 10v(min)~47v(max) output pin voltage 10v(min)~ 47v(max) the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 100k 1 k gnd logic input pin 1k vcc gnd vref 500 1k oscm gnd gnd rs out+ out -
TB67S101AFG/ftg/fng 2013- 11- 05 12 5. function explanation (stepping motor) motor output current (iout) : t he flow from out+ to out - is p lus current . the flow from out - to out+ is minus current . < full step resolution > ach bch input output input output phasea ina1 ina2 i out (a) phaseb inb1 inb2 i out (b) h h h + 100% h h h + 100% l h h -100% h h h + 100% l h h -100% l h h -100% h h h + 100% l h h -100% please set ina1, ina2 , inb1, and inb2 to low until vm power supply reaches the proper operating range . < half step resolution > ach bch input output input output phasea ina1 ina2 i out (a) phaseb inb1 inb2 i out (b) h h h + 100% h h h + 100% - l l 0% h h h + 100% l h h -100% h h h + 100% l h h -100% - l l 0% l h h -100% l h h -100% - l l 0% l h h -100% h h h + 100% l h h -100% h h h + 100% - l l 0% - : don't care
TB67S101AFG/ftg/fng 2013- 11- 05 13 < quarter step resolution > ach bch input out put input output phas ea ina1 ina2 i out (a) phaseb inb1 inb2 i out (b) h h l + 71% h h l + 71% h l h + 38% h h h + 100% x l l 0% h h h + 100% l l h -38% h h h + 100% l h l -71% h h l + 71% l h h -100% h l h + 38% l h h -100% x l l 0% l h h -100% l l h -38% l h l -71% l h l -71% l l h -38% l h h -100% x l l 0% l h h -100% h l h + 38% l h h -100% h h l + 71% l h l -71% h h h + 100% l l h -38% h h h + 100% x l l 0% h h h + 100% h l h + 38% x : don't care others pin name h l notes ina1, ina2 inb1, inb2 the current value of each ch is set up with 2 input 4 value. please refer to the above - mentioned current value setting table. phase a phaseb o ut+: h out - : l o ut +: l out - : h in phase=h, charge current flows in the direction of out - from out+ . standby standby r elease standby mode in standby= l, an internal oscillating circuit and a motor output part are stopped. (the drive of a motor cannot be performed.)
TB67S101AFG/ftg/fng 2013- 11- 05 14 current phasor ( full step resolution ) timing charts may be simplified for explanatory purpose. please set ina1, ina2, i nb1, and inb2 to low until vm power supply reaches the proper operating range . bch current [%] 100% 100% - 100% - 100% ach current [%] 0% a d c b phasea phaseb i ou t ( a ) i out ( b ) ina1 ina2 inb1 inb2 0% 100 % -100% 0% -100% 100 % h l h l h l h l h l h l a b c d a b c d a b c d b a cw ccw cw ccw
TB67S101AFG/ftg/fng 2013- 11- 05 15 cur rent phasor ( half step resolution ) timing charts may be simplified for explanatory purpose. please set ina1, ina2, inb1, and inb2 to low until vm power supply reaches the proper operating range . 100% 100% - 100% - 100% b ch current [%] a ch current [%] 0% a h g f e d c b phasea i out( a ) i out( b) in a1 in a2 phase b in b1 in b2 0% 100 % -100% 0% - 100 % 100 % h l h l h l h l h l h l a b c d e f g h a b c d h e g cw ccw cw ccw
TB67S101AFG/ftg/fng 2013- 11- 05 16 curren t phasor ( quarter step resolution ) timing charts may be s implified for explanatory purpose. please set ina1, ina2, inb1, and inb2 to low until vm power supply reaches the proper operating range . 0% 38% 71% - 38% - 71% 0% 38% 71% - 38% - 71% - 100% phasea iout(a) iout(b) ina1 ina2 phaseb inb1 inb2 100% - 100% 100% h l h l h l h l h l h l a b c d e f g h i j k l m n o p a b c d e f g h i j k l m n o p a p o n cw ccw cw ccw 100% 100% - 100% - 100% b ch current [%] a ch current [%] 0% 71 % 38 % - 71 % - 38 % 38 % 71 % - 38 % - 71 % a p o n m l k j i h g f e d c b
TB67S101AFG/ftg/fng 2013- 11- 05 17 6 . decay function admd( advanced dynamic mixed decay) constant current control the advanced dynamic mixed decay thr eshold, which determines the current ripple level during current feedback control, is a unique value. auto decay mode current waveform timing charts may be simplified for explanatory purpose. nf detect fchop internal osc admdth (advanced dynamic mixed decay threshold) fchop 1 cycle 16clk charge mode nf detect fast decay admdth detect slow decay fchop 1 cycle charge mode iout setting current value detect nf detect nf detect setting current value internal osc iout fchop fchop advanced dynamic mixed decay threshold admdth fast decay slow decay
TB67S101AFG/ftg/fng 2013- 11- 05 18 admd current waveform ? when the next current step is higher : ? when charge period is more than 1 fchop cycle : when the charge period is longer than fchop cycle, the charge period will be extended until the motor current reaches the nf threshold. once the current reach es the next current step, then the sequence will go on to decay mode. setting current value slow slow slow slow fast fast charge charge fast charge fast charge setting current value nf nf nf nf internal osc fchop fchop fchop fchop setting current value slow slow slow fast fast charge charge fast charge setting current value nf nf nf internal osc fchop fchop fchop fchop
TB67S101AFG/ftg/fng 2013- 11- 05 19 ? when the next current step is lower : ? when the fast continues past 1 fchop cycle (the motor current not reaching the admd threshold during 1 fchop cycle) setting current value fast nf nf nf t he operation mode will be switched to charge to monitor the motor current with the rs comparator; then will be switched to fast because the motor current is above the threshold. f chop f chop f chop f chop setting current value internal osc slow fast charge slow fast charge fast slow slow charge charge setting current value fast nf nf the operation mode will be switched to charge to monitor the motor current with the rs comparator; then will be switched to fast because the motor current is above the threshold. f chop f chop f chop f chop setting current value internal osc slow fast charge fast charge slow slow charge if the motor current is still above the admd threshold after reaching 1 fchop cycle, the o utput stage function will stay fast until the current reaches the admdth.
TB67S101AFG/ftg/fng 2013- 11- 05 20 7 output transistor function mode output transistor function mode u1 u2 l1 l2 charge on off off on slow off off on on fast off on on off note: this table shows an example of when the current flows as indicated by the arrows in the figure s shown above. if the current flows in the opposite direction, refer to the following table. mode u1 u2 l1 l2 charge off on on off slow off off on on fast on off off on this ic controls the motor current to be constant by 3 modes listed above. the e quivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. u1 l1 u2 l2 pgnd off off u1 l1 u2 l2 off on on load pgnd u1 l1 u2 l2 load pgnd rspin rrs vm on on load charge mode slow mode fast mode on rs pin rrs vm rs pin rrs v m off off on off
TB67S101AFG/ftg/fng 2013- 11- 05 21 8 calculation of the predefined output current for pwm constant - current control, this ic uses a clock generated by the oscm oscilla tor. the peak output current (setting current value) can be set via the current - sensing resistor (rs) and the reference voltage (vref), as follows: iout(max) = vref(gain) vref(gain) : the vref decay rate is 1/ 5.0 (typ.) for example : in the case of a 100% setup when vref = 3.0 v, torque=100%,rs=0.51 , the motor constant current (setting current value) will be calculated as: i out 9 9 >, calculation of the oscm oscillation frequency (chopper reference frequency) an approximation of the oscm oscillation frequency (foscm) a nd chopper frequency (fchop) can be calculated by the following expressions. foscm=1/[0.56x{cx(r1+500)}] c,r1: external components for oscm (c=270pf , r 1 =5.1k? => foscm =about 1.12mhz (typ. )) fchop = foscm / 16 foscm=1.12mhz => fchop =a bout 70khz if chopping frequency is raised, rippl of current will become small and wave - like reproducibility will improve. however, the gate loss inside ic goes up and generation of heat becomes large. by lowering chopping frequency, reduction in gene ration of heat is expectable. however, rippl of current may become large. it is a standard about about 70 khz. a setup in the range of 50 to 100 khz is recommended. vref(v) r rs
TB67S101AFG/ftg/fng 2013- 11- 05 22 absolute maximum ratings (ta = 25 c ) characteristics symbol rating un it remarks motor power supply vm 50 v - motor output voltage v out 50 v - motor output current i out 4 .0 a note 1 internal logic power supply vcc 6.0 v when externally applied. logic input voltage vin(h) 6.0 v - vin(l) - 0.4 v - vref input voltage v ref 5.0 v - power dissipation qfn48 pd 1.3 w note 2 htssop48 pd 1.3 w note 2 hsop28 pd 1.15 w note 2 operating temperature topr - 20 85 - storage temperature tstr -55 150 - junction temperature tj(max) 150 - note 1: usually, the maximum current value at the time should use 70% or less of the absolute maximum ratings for a standard on thermal rating. the maximum output curr ent may be further limited in view of thermal considerations, depending on ambient temperature and board conditions. note 2: device alone (ta =25c) ta: ambient temperature topr : ambient temperature while the ic is active tj: junction temperature while t he ic is active. the maximum junction temperature is limited by the thermal shutdown (tsd) circuitry. it is advisable to keep the maximum current below a certain level so that the maximum junction temperature, tj (max), will not exceed 120c. cauti on >' absolute maximum ratings the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating (s) may cause device breakdown, damage or deterio ration, and may result in injury by explosion or combustion. the value of even one parameter of the absolute maximum ratings should not be exceeded under any circumstances. the tb67s10 1 a does not have overvoltage detection circuit. therefore, the device is damaged if a voltage exceeding its rated maximum is applied. all voltage ratings, including supply voltages, must always be followed. the other notes and considerations described later should also be referred to. operation ranges (ta= - 20 to 85c) charact eristics symbol min typ. max unit remarks motor power supply vm 10 24 47 v motor output current iout - 1.5 3.0 a note1 logic input voltage vin(h) 2.0 - 5.5 v logic input high level vin(l) 0 - 0.8 v logic input low level phase input frequency fphase - - 400 khz chopper frequency fchop(range) 40 70 150 khz vref input voltage vref gnd 2.0 3.6 v note 1: maximum current for actual usage may be limited by the operating circumstances such as operating conditions (exciting mode, operating time, and so on), ambient temperature, and heat conditions (board condition and so on).
TB67S101AFG/ftg/fng 2013- 11- 05 23 electrical specifications 1 (ta = 25c, vm = 24 v, unless specified otherwise) characteristics symbol test condition min typ. max unit logic input voltage high vin(h) logic input pin ( * ) 2.0 - 5.5 v low vin(l) logic input pin ( * ) 0 - 0.8 v logic input hysteresis voltage vin(hys) logic input pin ( * ) 100 - 300 mv logic input current high iin(h) logic input voltage = 3.3v - 33 - a low iin(l) logic input voltage = 0v - - 1 a power consumption im1 output pins=open , standby=l - 2 3.5 ma im2 output pins=open , standby=h - 3.5 5.5 ma im3 output pins=open full step resolution - 5.5 7 ma output leakage current high - side ioh vrs=vm=50v,vout=0v - - 1 a low - side iol vrs=vm=vout =50v 1 - - a motor current channel differential iout1 current differential between ch - 5 0 5 % motor current setting accuracy iout2 iout=1.5a - 5 0 5 % rs pin current irs vrs=vm=24v 0 - 10 a motor output on - resistance (high - side+low - side) ron(s)_pn tj=25 c, forward direction (high - side+low - side) h 0.49 0.6 *: vin (h) is defined as the vin volta ge that causes the outputs (outa,out b) to change when a pin under test is gradually raised from 0 v. v in (l) is defined as the v in voltage that causes the outputs (outa, out b) to change when the pin is th en gradually lowered. the dif ference between vin ( h) and v in (l) is defined as the input hysteresis. * : when the logic signal is applied to the device whilst the vm power supply is not asserted; the device is designed not to function, but for safe usage, please apply the logic signal after the vm power supply is asserted and the vm voltage reaches the proper operating range.
TB67S101AFG/ftg/fng 2013- 11- 05 24 electrical specifications 2 (ta = 25c, v m = 24 v, unless specified otherwise) characteristics symbol test condition min typ. max unit vref input current iref v ref = 2 .0v - 0 1 a vcc voltage vcc icc=5.0ma 4.75 5.0 5.25 v vcc current icc vcc=5.0v - 2.5 5 ma vref gain rate vref(gain) vref=2.0v 1/5.2 1/5.0 1/4.8 thermal shutdown(tsd) threshold (note1) t j tsd 145 160 175 qc vm recovery voltage vmr 7.0 8.0 9.0 v over - current detection (isd) threshold (note2) isd 4.1 4.9 5.7 a note1: about tsd when the junction temperature of the device reached the tsd threshold, the tsd circuit is triggered; the internal reset circuit then turns off the output transistors. noise rejection blanking time is built - in to avoid misdetection. once the tsd circuit is triggered, the device will be set to standby mode, and can be cleared by reasserting the vm power source , or setting the dmode pins to standby mode. the tsd circuit is a backup function to detect a thermal error, therefore is not recommended to be used aggressively. note2: about isd when the output current reaches the threshold, the isd circuit is triggered ; the internal reset circuit then turns off the output transistors. once the isd circuit is triggered, the device keeps the output off until power - on reset (por), is reasserted or the device is set to standby mode by dmode pins. for fail - safe, please inser t a fuse to avoid secondary trouble. back - emf while a motor is rotating, there is a timing at which power is fed back to the power supply. at that timing, the motor current recirculates back to the power supply due to the effect of the motor back - emf. if the power supply does not have enough sink capability, the power supply and output pins of the device might rise above the rated voltages. the magnitude of the motor back - emf varies with usage conditions and motor characteristics. it must be fully verifie d that there is no risk that the tb6 7s101a or other components will be damaged or fail due to the motor back - emf. cautions on overcurrent shutdown (isd) and thermal shutdown (tsd) the isd and tsd circuits are only intended to provide temporary protection against irregular conditions such as an output short - circuit; they do not necessarily guarantee the complete ic safety. if the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device may be damaged due to an output short - circuit. the isd circuit is only intended to provide a temporary protection against an output short - circuit. if such a condition persists for a long time, the device may be damaged due to overstress. overcurrent conditions must be remov ed immediately by external hardware. ic mounting do not insert devices incorrectly or in the wrong orientation. otherwise, it may cause breakdown, damage and/or deterioration of the device.
TB67S101AFG/ftg/fng 2013- 11- 05 25 ac electrical specification (ta = 25c, vm = 24 v, 6. 8 mh/5.7 ? ) characteristics symbol test condition min typ. max unit minimum phase pulse width fphase(min) 100 - - ns twp 50 - - twn 50 - - output transistor switching specific tr 30 80 130 ns tf 40 90 140 tplh(phase) phase - o utput 250 - 1200 tphl(phase) phase - o utput 250 - 1200 analog noise blanking time atblk vm=24v,iout=1.5a anal og tblank 250 4 00 550 ns oscillator frequency accuracy S foscm cosc=270pf, rosc=5.1k -15 - +15 % oscillator reference frequency fosc m cosc=270pf, rosc=5.1k 952 1120 1288 khz chopping frequency fchop output:active(iout =1.5 a), fosc = 1120 khz - 7 0 - kh z ac electrical specification timing chart timing charts may be simplified for explanatory purpose. twp tw n tplh(phase) tphl(phase) 10% 90% tr 90% 10% tf phase out 50% 50% 50% 50% 50% 1/fphase
TB67S101AFG/ftg/fng 2013- 11- 05 26 package dimensions (unit :mm) hsop28 - p - 0 450- 0.80
TB67S101AFG/ftg/fng 2013- 11- 05 27 p - wqfn48 - 0707- 0.50 - 003 (unit :mm)
TB67S101AFG/ftg/fng 2013- 11- 05 28 htssop48 - p - 300- 0.50 (unit :mm)
TB67S101AFG/ftg/fng 2013- 11- 05 29 notes on contents block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. timing charts timing charts may be simplified for explanatory purposes. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluatio n is required, especially at the mass - production design stage . toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics (1) the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause device breakdown, damage or deterioration, and may result in injury by explosion or combustion. (2) use an appropriate power supply fuse to ensure that a large current does not continuously flow in the case of overcurrent and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the w iring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead to smoke or ignition. to minimize the effects of the flow of a large current in the case of b reakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malf unction or breakdown caused by the current resulting from the inrush current at power on or the negative current resulting from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built - in protection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. (4) do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause device breakdown, damage or deterioration, an d may result in injury by explosion or combustion. in addition, do not use any device inserted in the wrong orientation or incorrectly to which current is applied even just once . (5) carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. if there is a large amount of leakage current such as from input or negative feedback condenser , the ic output dc voltage will increase. if this output voltage is co nnected to a speaker with low input withstand voltage, overcurrent or ic failure may cause smoke or ignition. (the overcurrent may cause smoke or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connecti on - type ic that inputs output dc voltage to a speaker directly.
TB67S101AFG/ftg/fng 2013- 11- 05 30 points to remember on handling of ics overcurrent detection circuit overcurrent detection circuits (referred to as current limiter circuits) do not necessarily protect ics under all circumst ances. if the overcurrent detection circuits operate against the overcurrent, clear the overcurrent status immediately . depending on the method of use and usage conditions, exceeding absolute maximum ratings may cause the overcurrent detection circuit to operate improperly or ic breakdown may occur before operation. in addition, depending on the method of use and usage conditions, if overcurrent continues to flow for a long time after operation, the ic may generate heat resulting in breakdown. thermal shu tdown circuit thermal shutdown circuits do not necessarily protect ics under all circumstances. if the thermal shutdown circuits operate against the over - temperature, clear the heat generation status immediately . depending on the method of use and usage c onditions, exceeding absolute maximum ratings may cause the thermal shutdown circuit to operate improperly or ic breakdown to occur before operation. heat radiation design when using an ic with large current flow such as power amp, regulator or driver, de sign the device so that heat is appropriately radiated, in order not to exceed the specified junction temperature (tj) at any time or under any condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to de crease in ic life, deterioration of ic characteristics or ic breakdown. in addition, when designing the device, take into consideration the effect of ic heat radiation with peripheral components. back -emf when a motor rotates in the reverse direction, sto ps or slows abruptly, current flows back to the motors power supply owing to the effect of back - emf. if the current sink capability of the power supply is small, the devices motor power supply and output pins might be exposed to conditions beyond the abs olute maximum ratings. to avoid this problem, take the effect of back - emf into consideration in system design.
TB67S101AFG/ftg/fng 2013- 11- 05 31 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make ch anges to the information in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshi ba 's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complyin g with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all rel evant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes f or product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instr uctions for the application with which the product will be used with or for. customers are solely responsible for all aspects of their own pr oduct design or applications, including but not limited to (a) determining the appropriateness of the use of this p roduct in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) val idating all operating parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted for use in equipments or systems that require extraordinarily high l evels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance - related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse - engineer, alter, modify, translate or copy product, whether in whole or in part. ? product s hall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. ? the information contained herein is presented only as guidance for product use. no responsibility is assumed by toshiba for any infringement of patents or any other intellectual property rights of third parties that may result from the use of product. n o license to any intellectual property right is granted by this document, whether express or implied, b y estoppel or otherwise. ? absent a written signed agreement, except as provided in the relevant terms and conditions of sale for product, and to the maximum extent allowable by law, toshiba (1) assumes no liability whatsoever, including without limitation , indirect, consequential, special, or incidental damages or loss, including without limitation, loss of profits, loss of opportunities, business interruption and loss of data, and (2) disclaims any and all express or implied warranties and conditions rela ted to sale, use of product, or information, including warranties or conditions of merchantability, fitness for a particular purpose, accuracy of information, or noninfringement. ? do not use or otherwise make available product or related software or techn ology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technol ogy products (mass destruction weapons). product and related softwar e and technology may be controlled under the applicable export laws and regulations including, without limitation, the japanese foreign exchange and foreign trade law and the u.s. export admini stration regulations. export and re - export of product or relate d software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. ? please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of pr oduct. ple ase use product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled subst ances, including without limitation, the eu rohs directive. toshiba assumes no liability for damages or losse s occurring as a resul t of noncompliance w ith applicable laws and regulations.

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