p p ja 34 16ae july 14,2015 - rev.00 page 1 2 0 v n - c hannel enhancement mode mosfet C esd protected voltage 2 0 v current 6.5 a sot - 23 unit: inch(mm) f eatures ? rds(on) , vgs @ 4.5 v , id @ 6.5 a< 22 m ? ? r ds(on) , vgs@ 2 .5 v , i d @ 5 .5 a < 26 m ? ? rds(on) , vgs @ 1.8 v, id @ 5.0 a< 34 m ? ? advanced trench process technology ? specially designed for switch load, pwm application, etc. ? esd protected 2kv hbm ? lead free in compliance with eu rohs 2011/65/eu directive ? green molding compound as per iec61249 std . (halogen free) mechanical data ? case: sot - 2 3 package ? terminals : solderable per mil - std - 750, method 2026 ? approx. weight: 0.0003 ounces, 0.0084 grams ? marking: a 6e parameter symbol limit units drain - source voltage v ds 2 0 v gate - source voltage v gs + 8 v continuous drain current i d 6.5 a pulsed drain current (note 4 ) i dm 32 a power dissipation t a =25 o c p d 1.25 w derate above 25 o c 10 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j uncti on to ambient (note 3 ) r ja 10 0 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p ja 34 16ae july 14,2015 - rev.00 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - sou rce breakdown voltage bv dss v gs = 0 v, i d = 25 0ua 2 0 - - v gate threshold voltage v gs(th) v ds = v gs , i d = 250 ua 0. 4 0. 5 8 1. 0 v drain - source on - state resistance r ds(on) v gs = 4.5 v, i d = 6.5 a - 18.4 2 2 m gs = 2 .5 v, i d = 5 .5 a - 21.5 2 6 v gs = 1.8 v, i d = 5 .0 a - 26.4 34 zero gate voltage drain current i dss v ds = 2 0 v, v gs =0v - - 1 u a gate - source leakage current i gss v gs = + 8 v, v ds =0v - - + 10 u a dynamic total gate charge q g v ds = 10 v, i d = 6.5 a, v gs = 4.5v (note 1 , 2 ) - 8.6 - nc gate - source charge q gs - 1.06 - gate - drain charg e q gd - 1.04 - input capacitance ciss v ds = 10 v, v gs = 0 v, f=1.0mhz - 836 - pf output capacitance coss - 96 - reverse transfer capacitance crss - 80 - switching turn - on delay time t d (on) v dd = 10 v, i d = 1 a, v g s = 4.5v, r g = 3 (note 1 , 2 ) - 24 - ns turn - on rise time tr - 46 - turn - o ff delay time t d (off) - 0.22 - us turn - o ff fall time tf - 0.30 - drain - source diode maximum continuous drain - source diode forward current i s --- - - 1. 5 a diode forward voltage v sd i s = 1.0 a, v gs = 0 v - 0. 74 1. 0 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is d efined as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper . 4. the maximum current rating is package limited.
p p ja 34 16ae july 14,2015 - rev.00 page 3 t ypical characteristic curves fig.1 on - region characteristics fig. 2 transfer ch aracteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characteristics
p p ja 34 16ae july 14,2015 - rev.00 page 4 t ypical characteristic curves fig. 7 gate - charge charac teristics fig. 8 threshold voltage variation with temperature . fig. 9 capacitance vs. drain - source voltage.
p p ja 34 16ae july 14,2015 - rev.00 page 5 part no packing code version mounting pad layout p art n o packing code package type packing type marking ver sion PJA3416AE _r1_00001 sot - 23 3k pcs / 7
p p ja 34 16ae july 14,2015 - rev.00 page 6 disclaimer
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