? semiconductor components industries, llc, 2014 december, 2014 ? rev. 5 1 publication order number: nss1c201l/d nss1c201l, NSV1C201L 100 v, 3.0 a, low v ce(sat) npn transistor on semiconductor?s e 2 poweredge family of low v ce(sat) transistors are miniature surface mount devices featuring ultra low saturation voltage (v ce(sat) ) and high current gain capability. these are designed for use in low voltage, high speed switching applications where affordable efficient energy control is important. typical applications are dc?dc converters and power management in portable and battery powered products such as cellular and cordless phones, pdas, computers, printers, digital cameras and mp3 players. other applications are low voltage motor controls in mass storage products such as disc drives and tape drives. in the automotive industry they can be used in air bag deployment and in the instrument cluster. the high current gain allows e 2 poweredge devices to be driven directly from pmu?s control outputs, and the linear gain (beta) makes them ideal components in analog amplifiers. features ? nsv prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? these devices are pb?free, halogen free/bfr free and are rohs compliant maximum ratings (t a = 25 c) rating symbol max unit collector-emitter voltage v ceo 100 vdc collector-base voltage v cbo 140 vdc emitter-base voltage v ebo 7.0 vdc collector current ? continuous i c 2.0 a collector current ? peak i cm 3.0 a thermal characteristics characteristic symbol max unit total device dissipation t a = 25 c derate above 25 c p d (note 1) 490 3.7 mw mw/ c thermal resistance, junction?to?ambient r ja (note 1) 255 c/w total device dissipation t a = 25 c derate above 25 c p d (note 2) 710 4.3 mw mw/ c thermal resistance, junction?to?ambient r ja (note 2) 176 c/w junction and storage temperature range t j , t stg ?55 to +150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. fr? 4 @ 100 mm 2 , 1 oz. copper traces. 2. fr? 4 @ 500 mm 2 , 1 oz. copper traces. device package shipping ? ordering information nss1c201lt1g, NSV1C201Lt1g sot?23 (pb?free) 3000 / tape & ree l marking diagram collector 3 1 base 2 emitter sot?23 (to?236) case 318 style 6 3 2 1 www. onsemi.com 100 volts, 3.0 amps npn low v ce(sat) transistor ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. 1 vt m vt = specific device code m = date code* = pb?free package *date code orientation and/or overbar may vary depending upon manufacturing location. (note: microdot may be in either location)
nss1c201l, NSV1C201L www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics collector ?emitter breakdown voltage (i c = 10 madc, i b = 0) v (br)ceo 100 vdc collector ?base breakdown voltage (i c = 0.1 madc, i e = 0) v (br)cbo 140 vdc emitter ?base breakdown voltage (i e = 0.1 madc, i c = 0) v (br)ebo 7.0 vdc collector cutoff current (v cb = 140 vdc, i e = 0) i cbo 100 nadc emitter cutoff current (v eb = 6.0 vdc) i ebo 50 nadc on characteristics dc current gain (note 3) (i c = 10 ma, v ce = 2.0 v) (i c = 500 ma, v ce = 2.0 v) (i c = 1.0 a, v ce = 2.0 v) (i c = 2.0 a, v ce = 2.0 v) h fe 150 120 80 40 240 360 collector ?emitter saturation voltage (note 3) (i c = 0.1 a, i b = 0.01 a) (i c = 0.5 a, i b = 0.05 a) (i c = 1.0 a, i b = 0.100 a) (i c = 2.0 a, i b = 0.200 a) v ce(sat) 0.030 0.060 0.090 0.150 v base ?emitter saturation voltage (note 3) (i c = 1.0 a, i b = 0.100 a) v be(sat) 0.950 v base ?emitter turn?on voltage (note 3) (i c = 1.0 a, v ce = 2.0 v) v be(on) 0.850 v cutoff frequency (i c = 100 ma, v ce = 5.0 v, f = 100 mhz) f t 110 mhz input capacitance (v eb = 2.0 v, f = 1.0 mhz) cibo 230 pf output capacitance (v cb = 10 v, f = 1.0 mhz) cobo 14 pf product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. pulsed condition: pulse width = 300 msec, duty cycle 2%. typical characteristics figure 1. power derating t a , ambient temperature ( c) 140 120 100 80 60 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.8 p d , power derating (w) note 2 note 1 0.6 0.7
nss1c201l, NSV1C201L www. onsemi.com 3 typical characteristics figure 2. dc current gain i c , collector current (a) 10 1 0.1 0.01 0.001 0 50 100 150 200 300 350 400 h fe , dc current gain 250 v ce = 2 v 150 c ?55 c 25 c figure 3. dc current gain figure 4. collector?emitter saturation voltage i c , collector current (a) i c , collector current (a) 10 1 0.1 0.01 0.001 0.01 0.1 1 figure 5. collector?emitter saturation voltage figure 6. base?emitter saturation voltage i c , collector current (a) 10 1 0.1 0.01 0.001 0.2 0.4 0.6 0.8 1.0 1.2 figure 7. base?emitter saturation voltage v ce(sat) , collector?emitter saturation (v) v ce(sat) , collector?emitter saturation (v) v be(sat) , base?emitter saturation (v) 10 1 0.1 0.01 0.001 0 50 100 150 200 300 350 400 h fe , dc current gain 250 v ce = 4 v 150 c ?55 c 25 c i c /i b = 10 150 c ?55 c 25 c i c , collector current (a) 10 1 0.1 0.01 0.001 0.01 0.1 1 i c /i b = 20 150 c ?55 c 25 c i c /i b = 10 150 c ?55 c 25 c i c , collector current (a) 10 1 0.1 0.01 0.001 0.2 0.4 0.6 0.8 1.0 1.2 v be(sat) , base?emitter saturation (v) i c /i b = 50 150 c ?55 c 25 c
nss1c201l, NSV1C201L www. onsemi.com 4 typical characteristics figure 8. base emitter voltage i c , collector current (a) 10 1 0.1 0.01 0.001 0.2 0.4 0.6 0.8 1.0 1.2 v be(on) , base?emitter voltage (v) v ce = 2 v 150 c ?55 c 25 c figure 9. collector saturation region figure 10. input capacitance i b , base current (a) v eb , emitter base voltage (v) 1 0.1 0.01 0.001 0.0001 0.01 0.1 1 7 6 5 4 3 2 1 0 0 50 100 150 200 300 350 400 figure 11. output capacitance figure 12. current?gain bandwidth product v cb , collector base voltage (v) i c , collector current (a) 90 80 50 40 30 20 10 0 0 5 10 20 30 35 40 50 1 0.1 0.01 0.001 0 20 40 60 80 100 120 140 figure 13. safe operating area v ce , collector emitter voltage (v) 100 10 1 0.1 0.01 0.1 1 10 v ce(sat) , collector?emitter saturation voltage (v) c ib , input capacitance (pf) c ob , output capacitance (pf) f ta u , current gain bandwidth (mhz) i c , collector current (a) i c = 0.1 a 0.5 a 1 a 2 a 3 a 8 250 t j = 25 c f test = 1 mhz 60 70 100 15 25 45 t j = 25 c f test = 1 mhz t j = 25 c f test = 1 mhz v ce = 2 v 10 ms 1 ms 100 ms thermal limit
nss1c201l, NSV1C201L www. onsemi.com 5 t, pulse time (s) figure 14. transient thermal resistnce d = 0.5 d = 0.2 d = 0.1 d = 0.05 d = 0.02 d = 0.01 single pulse 1000 100 10 1 0.1 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000 r(t), ( c/w)
nss1c201l, NSV1C201L www. onsemi.com 6 package dimensions sot?23 (to?236) case 318?08 issue ap d a1 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs. mm inches scale 10:1 0.8 0.031 0.9 0.035 0.95 0.037 0.95 0.037 2.0 0.079 soldering footprint* view c l 0.25 l1 e e e b a see view c dim a min nom max min millimeters 0.89 1.00 1.11 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 d 2.80 2.90 3.04 0.110 e 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 l 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 nom max l1 h 2.10 2.40 2.64 0.083 0.094 0.104 h e 0.35 0.54 0.69 0.014 0.021 0.029 c 0 ??? 10 0 ??? 10 style 6: pin 1. base 2. emitter 3. collector *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 nss1c201l/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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