1 ps8822g 10/07/09 pin description pin name description buf_in input clk [0:3] outputs gnd ground v dd power oe output enable 1 2 3 4 clk1 v dd gnd clk3 8 7 6 5 buf_in clk0 oe clk2 pin con guration block diagram features ? high-speed, low-noise, non-inverting 1:4 buffer ? maximum frequency up to 180 mhz ? low output skew < 70ps (1.8v, 2.5v), <100ps (1.5v) ? low propagation delay < 3.0ns (1.8v, 2.5v), <3.5ns (1.5v) ? optimized duty cycle ? 1.5v - 2.5v supply voltage ? 3.3v tolerant input clock ? packages (pb-free & green available): ?8-pin soic (w) 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer PI6C10804 description the PI6C10804 is a 1.5v to 2.5v high-speed, low-noise 1:4 non-inverting clock buffer. the key goal in de sign ing the PI6C10804 is to target networking applications that re quire low- skew, low-jitter, and high-frequency clock distribution. providing output-to-output skew as low as 70ps, the PI6C10804 is an ideal clock distribution de vice for syn chro nous sys tems. de- sign ing syn chro nous net work ing sys tems re quires a tight level of skew from a large number of outputs. clk2 clk1 clk0 buf_in clk3 oe 09-0056
2 ps8822g 10/07/09 PI6C10804 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer storage temperature ...........................................................?65c to +150c v dd voltage ..........................................................................?0.5v to +3.6v output voltage ............................................................... ?0.5v to v dd +0.5v input voltage .......................................................................................... 3.6v 2.5v absolute maximum ratings (above which the useful life may be impaired. for user guidelines only, not tested.) note: stresses greater than those listed under maximum rat ings may cause permanent damage to the device. this is a stress rating only and functional op er a tion of the device at these or any other con di tions above those indicated in the operational sec tions of this spec i ca tion is not implied. ex po sure to absolute maximum rating con di - tions for extended periods may affect re li abil i ty. 2.5v ac characteristics (over operating range: v dd = 2.5v 0.2v, t a = -40 to 85c) parameters de scrip tion test conditions (1) min. typ max. units f in input frequency 0 250 mhz t r /t f clkn rise/fall time 20% to 80% 1 ns t plh, t phl (2) propagation delay buf_in to clkn c l = 5pf, 125 mhz outputs are measured @ v dd /2 1.0 1.5 2.0 ns t sk(o) (3) output to output skew between any two outputs of the same device @ same transition 70 ps t sk(p) (3) pulse skew between opposite transitions (t phl -t plh ) of the same output 100 200 t sk(t) (3) part to part skew between two identical out- puts of different parts on the same board (4) 300 t dc_in duty cycle in @ 1ns edge rate 45 55 % t dc_out duty cycle out 40 60 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. skew measured at worse cast temperature (max. temp). 4. identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. 2.5v dc characteristics (over operating range: v dd = 2.5v 0.2v, t a = -40 to 85c) parameters description test conditions (1) min. typ. (2) max. units v dd supply voltage 2.3 2.5 2.7 v v ih input high voltage logic high level 1.7 3.6 v v il input low voltage logic low level -0.3 0.7 i i input current v dd = max, v in = v dd or gnd i pin 15 a v oh output high voltage v dd = min., v in = v ih or v il i oh = -1ma 2.0 v i oh = -2ma 1.7 i oh = -8ma 1.5 v ol output low voltage v dd = min., v in - v ih or v il i ol = 1ma 0.4 i ol = 2ma 0.7 i ol = 8ma 0.7 v notes: 1. for max. or min. conditions, use appropriate operating range values. 2. typical values are at v dd = 2.5v, +25c ambient and maximum loading. 09-0056
3 ps8822g 10/07/09 PI6C10804 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer 1.8v ac characteristics (over operating range: v dd = 1.8v 0.15v, t a = -40 to 85c) parameters de scrip tion test conditions (1) min. typ max. units f in input frequency 0 180 mhz t r /t f clkn rise/fall time 20% to 80% 1 ns t plh, t phl (2) propagation delay buf_in to clkn c l = 5pf, 125 mhz outputs are measured @ v dd /2 1.0 2.0 3.0 t sk(o) (3) output to output skew between any two outputs of the same device @ same transition 70 ps t sk(p) (3) pulse skew between opposite transitions (t phl -t plh ) of the same output 200 275 t sk(t) (3) part to part skew between two identical out- puts of different parts on the same board (4) 300 t dc_in duty cycle in @ 1ns edge rate 45 55 % t dc_out duty cycle out 40 60 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. skew measured at worse cast temperature (max. temp). 4. identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. storage temperature ...........................................................?65c to +150c v dd voltage ..........................................................................?0.5v to +2.5v output voltage ............................................................... ?0.5v to v dd +0.5v input voltage .......................................................................................... 3.6v 1.8v absolute maximum ratings (above which the useful life may be impaired. for user guidelines only, not tested.) note: stresses greater than those listed under maximum rat ings may cause permanent damage to the device. this is a stress rating only and functional op er a tion of the device at these or any other con di tions above those indicated in the operational sec tions of this spec i ca tion is not implied. ex po sure to absolute maximum rating con di - tions for extended periods may affect re li abil i ty. 1.8v dc characteristics (over operating range: v dd = 1.8v 0.15v, t a = -40 to 85c) parameters description test conditions (1) min. typ. (2) max. units v dd supply voltage 1.65 1.8 1.95 v v ih input high voltage logic high level 0.65*v dd 3.6 v il input low voltage logic low level -0.3 0.35*v dd i i input current (3) v dd = max, v in = v dd or gnd i pin 15 a v oh output high voltage v dd = min., v in = v ih or v il i oh = -2ma 1.3 v i oh = -8ma 1.2 v ol output low voltage v dd = min., v in - v ih or v il i ol = 2ma 0.45 i ol = -8ma 0.45 notes: 1. for max. or min. conditions, use appropriate operating v dd and t a values. 2. typical values are at v dd = 1.8v, +25c ambient and maximum loading. 3. this parameter is determined by device characterization but is not production tested. 09-0056
4 ps8822g 10/07/09 PI6C10804 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer storage temperature ...........................................................?65c to +150c v dd voltage ..........................................................................?0.5v to +2.6v output voltage ............................................................... ?0.5v to v dd +0.5v input voltage .......................................................................................... 3.6v 1.5v absolute maximum ratings (above which the useful life may be impaired. for user guidelines only, not tested.) note: stresses greater than those listed under maximum rat ings may cause permanent damage to the device. this is a stress rating only and functional op er a tion of the device at these or any other con di tions above those indicated in the operational sec tions of this spec i ca tion is not implied. ex po sure to absolute maximum rating con di- tions for extended periods may affect re li abil i ty. 1.5v dc characteristics (over operating range: v dd = 1.5v 0.075v, t a = -40 to 85c) parameters description test conditions (1) min. typ. (2) max. units v dd supply voltage 1.4 1.5 1.6 v v ih input high voltage logic high level 1.17 3.6 v il input low voltage logic low level -0.3 0.63 i i input current v dd = max, v in = v dd or gnd i pins 15 a v oh output high voltage v dd = min., v in = v ih or v il i oh = -2ma 1.05 v i oh = -8ma 0.75 v ol output low voltage v dd = min., v in - v ih or v il i ol = 1ma 0.4 i ol = 2ma 0.35 i ol = 8ma 0.35 notes: 1. for max. or min. conditions, use appropriate operating range values. 2. typical values are at v dd = 1.5v, +25c ambient and maximum loading. 1.5v ac characteristics (over operating range: v dd = 1.5v 0.075v, t a = -40 to 85c) parameters de scrip tion test conditions (1) min. typ max. units f in input frequency 0 200 mhz t r /t f clkn rise/fall time 20% to 80% 1.5 ns t plh, t phl (2) propagation delay buf_in to clkn c l = 5pf, 125 mhz outputs are measured @ v dd /2 1.0 1.5 3.0 t sk(o) (3) output to output skew between any two out- puts of the same device @ same transition 100 ps t sk(t) (3) part to part skew between two identical out- puts of different parts on the same board (4) 300 t dc_in duty cycle in @ 1ns edge rate 45 55 % t dc_out duty cycle out 40 60 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. skew measured at worse cast temperature (max. temp). 4. identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade. switching characteristics (v dd = 2.5v 0.2v or 1.8v 0.15v, t a = 105c) parameters description test conditions min. typ. max. units t r ,t f clkn rise/fall time 20% to 80%, c l = 15pf, 125mhz 0.8 1.4 ns note: 1. all other ac and dc characteristics are identical to the 1.8v and 2.5v sections. 09-0056
5 ps8822g 10/07/09 PI6C10804 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer test circuits for all outputs de nitions: c l = load capacitance: includes jig and probe capacitance. capacitance (t a = 25c, f = 1 mhz) parameters (1) de scrip tion test conditions typ max. units c in input capacitance v in = 0v 2.0 4 pf c out output capacitance v out = 0v 1.7 6 note: 1. this parameter is determined by device characterization but is not production tested. pulse generator f = 125mhz d.u.t. 50 33-ohm c l 5pf v dd power supply characteristics parameters description test conditions (1) min. typ. (2) max. units i ddq quiescent power supply current v dd = 2.7v v in = gnd or v dd 10 a v dd = 1.95v 10 i dd_tot total power supply current v dd = 2.7v all outputs toggling, c l = 5pf, f in = 125mhz 20 ma v dd = 1.95v 15 ?i cc static supply current per inputs @ high level v dd = 2.7v v inx = v dd - 0.6v (3) 200 a v dd = 1.95v v inx = v dd - 0.6v (3) 200 notes: 1. for max. or min. conditions, use appropriate value speci t ed under electrical characteristics. 2. typical values are at v dd = 1.8v or 2.5v, and +25c ambient. 3. per ttl driven input (v in = v dd - 0.6v); all other inputs at v dd or gnd. power supply characteristics parameters description test conditions (1) min. typ. (2) max. units i ddq quiescent power supply current v dd = 1.5v v in = gnd or v dd 10 a i dd_tot total power supply current v dd = 1.5v all outputs toggling, c l = 5pf, f in = 125mhz 15 ma notes: 1. for max. or min. conditions, use appropriate value speci t ed under electrical characteristics. 2. typical values are at v dd = 1.2v or 1.5v, and +25c ambient. 09-0056
6 ps8822g 10/07/09 PI6C10804 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer switching waveforms propagation delay package skew ? t sk(t) pulse skew ? t sk(p) output skew ? t sk(o) input t plh v ih v dd /2 v il output v oh v dd /2 v ol t phl t r t f input t plh v dd v dd /2 0v output v oh v dd /2 v ol t phl t sk(p) = | t plh - t phl | input t plhx v dd v dd /2 0v clkx v oh v dd /2 v ol t phlx t sk(o) clky v oh v dd /2 v ol t sk(o) t plhy t phly t sk(o) = | t plhy - t plhx | or | t phly - t phlx | input t plh1 v dd v dd /2 0v part #1 output v oh v dd /2 v ol t phl1 t sk(t) part #2 output v oh v dd /2 v ol t sk(t) t plh2 t phl2 t sk(t) = | t plh2 - t plh1 | or | t phl2 - t phl1 | 09-0056
7 ps8822g 10/07/09 PI6C10804 1.5v/1.8v/2.5v, 180mhz, 1:4 networking clock buffer packaging mechanical: 8-pin soic (w) ordering information (1,2,3) ordering code package code package type PI6C10804we w pb-free & green, 8-pin 153-mil wide soic notes: 1. thermal characteristics can be found on the web at www.pericom.com/packaging/ 2. e = pb-free and green 3. x suf x = tape/reel pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com .0040 .0098 seating plane .013 .020 .050 bsc .016 .0075 .0098 1 8 .0099 .0196 0-8? .050 .149 .157 x.xx x.xx denotes dimensions in millimeters 3.78 3.99 .189 .196 4.80 5.00 1.27 .016 .026 1.35 1.75 .2284 .2440 5.80 6.20 0.406 0.660 0.330 0.508 0.10 0.25 0.40 1.27 0.19 0.25 0.25 0.50 x 45? .053 .068 ref description: 8-pin, 150-mil wide, soic package code: w document control no. pd - 1001 revision: f date: 03/09/05 notes: 1) controlling dimensions in millimeters. 2) ref: jedec ms-012d/aa pericom semiconductor corporation 3545 n. 1st street, san jose, ca 95134 1-800-435-2335 ? www.pericom.com note: ? for latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php 09-0056
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