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  www.irf.com 1 11/16/05 IRF6604 hexfet   power mosfet notes   through  are on page 11 description the IRF6604 combines the latest hexfet? power mosfet silicon technology with the advanced directfet tm packaging to achieve the lowest on-state resistance charge product in a package that has the footprint of an so-8 and only 0.7 mm profile. the directfet package is compatible with existing layout geometries used in power applications, pcb assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note an-1035 is followed regarding the manufacturing methods and process. the directfet package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. the IRF6604 balances both low resistance and low charge along with ultra low package inductance to reduce both conduc- tion and switching losses. the reduced total losses make this product ideal for high efficiency dc-dc converters that power the latest generation of processors operating at higher frequencies. the IRF6604 has been optimized for parameters that are critical in synchronous buck converters including rds(on) and gate charge to minimize losses in the control fet socket.  application specific mosfets  ideal for cpu core dc-dc converters  low conduction losses  low switching losses  low profile (<0.7 mm)  dual sided cooling compatible  compatible with existing surface mount techniques directfet  isometric  applicable directfet outline and substrate outline (see p.9,10 for details) absolute maximum ratin g s parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 7.0v i d @ t a = 25c continuous drain current, v gs @ 7.0v a i d @ t a = 70c continuous drain current, v gs @ 7.0v i dm pulsed drain current p d @t a = 25c power dissipation  p d @t a = 70c power dissipation  w p d @t c = 25c power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range thermal resistance parameter typ. max. units r ja junction-to-ambient  ??? 55 r ja junction-to-ambient  12.5 ??? r ja junction-to-ambient  20 ??? c/w r jc junction-to-case  ??? 3.0 r j-pcb junction-to-pcb mounted 1.0 ??? -40 to + 150 2.3 0.018 1.5 42 max. 12 9.2 92 12 30 49 v dss r ds ( on ) max qg 30v 11.5m ? @v gs = 7.0v 17nc 13m ? @v gs = 4.5v sq sx st mq mx mt 

 2 www.irf.com s d g static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 30 ?? ? ?? ? v ? v dss / ? t j breakdown voltage temp. coefficient ?? ? 27 ?? ? mv/c r ds(on) static drain-to-source on-resistance ?? ? 9.0 11.5 m ? ? v gs(th) / ? t j gate threshold voltage coefficient ?? ? -4.5 ?? ? mv/c i dss drain-to-source leakage current ?? ? ?? ? 30 a ?? ? ?? ? 50 a ?? ? ?? ? 100 i gss gate-to-source forward leakage ?? ? ?? ? 100 na gate-to-source reverse leakage ?? ? ?? ? -100 gfs forward transconductance 38 ?? ? ?? ? s q g total gate charge ?? ? 17 26 q gs1 pre-vth gate-to-source charge ?? ? 4.1 ?? ? q gs2 post-vth gate-to-source charge ?? ? 1.0 ?? ? nc q gd gate-to-drain charge ?? ? 6.3 ?? ? q godr gate charge overdrive ?? ? 5.6 ?? ? see fig. 16 q sw switch charge (q gs2 + q gd ) ?? ? 7.3 ?? ? q oss output charge ?? ? 9.5 ?? ? nc r g gate resistance ?? ? 1.1 2.0 ? t d(on) turn-on delay time ?? ? 11 ?? ? t r rise time ?? ? 4.3 ?? ? t d(off) turn-off delay time ?? ? 18 ?? ? ns t f fall time ?? ? 25 ?? ? c iss input capacitance ?? ? 2270 ?? ? c oss output capacitance ?? ? 420 ?? ? pf c rss reverse transfer capacitance ?? ? 190 ?? ? avalanche characteristics parameter units e as si ng l e p u l se a va l anc h e e nergy mj i ar a va l anc h e c urrent   a e ar r epet i t i ve a va l anc h e e nergy  mj diode characteristics parameter min. typ. max. units i s continuous source current ?? ? ?? ? 42 (body diode) a i sm pulsed source current ?? ? ?? ? 92 (bod y diode)  v sd diode forward voltage ?? ? 0.94 1.2 v t rr reverse recovery time ?? ? 31 47 ns q rr reverse recovery charge ?? ? 26 39 nc max. clamped inductive load 9.6 v ds = 15v, i d = 9.6a v ds = 30v, v gs = 0v v gs = 4.5v, i d = 9.6a  v ds = v gs , i d = 250a v ds = 24v, v gs = 0v v gs = 12v v gs = -12v v ds = 24v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 7.0v, i d = 12a  mosfet symbol conditions t j = 25c, i f = 9.6a v ds = 15v 0.23 ? = 1.0mhz v ds = 16v, v gs = 0v v dd = 15v, v gs = 4.5v  di/dt = 100a/s  t j = 25c, i s = 9.6a, v gs = 0v  showing the integral reverse p-n junction diode. ??? v gs = 4.5v typ. ??? ??? i d = 9.6a v gs = 0v v ds = 15v i d = 9.6a 32
 www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 7.0v 12a 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.7v 20s pulse width tj = 25c vgs top 10v 7.0v 4.5v 4.0v 3.5v 3.3v 3.0v bottom 2.7v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.7v 20s pulse width tj = 150c vgs top 10v 7.0v 4.5v 4.0v 3.5v 3.3v 3.0v bottom 2.7v 2.5 3.0 3.5 4.0 v gs , gate-to-source voltage (v) 1.00 10.00 100.00 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 150c v ds = 15v 20s pulse width
 4 www.irf.com fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage fig 8. maximum safe operating area 0.1 1 10 100 0.0 0.5 1.0 1.5 2.0 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec 0 5 10 15 20 25 q g total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 6.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 24v v ds = 15v i d = 9.6a
 www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-ambient fig 9. maximum drain current vs. ambient temperature fig 10. threshold voltage vs. temperature 25 50 75 100 125 150 0 3 6 9 12 i , drain current (a) d 0.1 1 10 100 0.00001 0.0001 0.001 0.01 0.1 1 10 10 0 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thja a p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thja 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a   
 
 
 6 www.irf.com d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13. gate charge test circuit fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 12c. maximum avalanche energy vs. drain current r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 0 20 40 60 80 starting tj, junction temperature ( c) e , single pulse avalanche energy (mj) as i d top bottom 4.3a 7.7a 9.6a fig 14a. switching time test circuit fig 14b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + -
 www.irf.com 7 fig 15.       for n-channel hexfet   power mosfets 
 
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  p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period       + - + + + - - -        ?      ? 
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 %% ? "#""&#    fig 16. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr
 8 www.irf.com control fet  

   

     
 
   
 
 
         
   
   
 
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    #' p loss = p conduction + p switching + p drive + p output this can be expanded and approximated by; p loss = i rms 2 r ds(on ) () + i q gd i g v in f ? ? ? ? ? ? + i q gs 2 i g v in f ? ? ? ? ? ? + q g v g f () + q oss 2 v in f ? ? ? ? "     (
  

          
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 synchronous fet the power loss equation for q2 is approximated by; p loss = p conduction + p drive + p output * p loss = i rms 2 r ds(on) () + q g v g f () + q oss 2 v in f ? ? ? ? ? + q rr v in f ( ) *dissipated primarily in q1. for the synchronous mosfet q2, r ds(on) is an im- portant characteristic; however, once again the im- portance of gate charge must not be overlooked since it impacts three critical areas. under light load the mosfet must still be turned on and off by the con- trol ic so the gate drive losses become much more significant. secondly, the output charge q oss and re- verse recovery charge q rr both generate losses that are transfered to q1 and increase the dissipation in that device. thirdly, gate charge will impact the mosfets? susceptibility to cdv/dt turn on. the drain of q2 is connected to the switching node of the converter and therefore sees transitions be- tween ground and v in . as q1 turns on and off there is a rate of change of drain voltage dv/dt which is ca- pacitively coupled to the gate of q2 and can induce a voltage spike on the gate that is sufficient to turn the mosfet on, resulting in shoot-through current . the ratio of q gd /q gs1 must be minimized to reduce the potential for cdv/dt turn on. power mosfet selection for non-isolated dc/dc converters figure a: q oss characteristic
 www.irf.com 9 directfet  outline dimension, mq outline (medium size can, q-designation). please see directfet application note an-1035 for all details regarding the assembly of directfet. this includes all recommendations for stencil and substrate designs. min 0.246 0.189 0.152 0.014 0.027 0.027 0.027 0.022 0.009 0.062 0.116 0.023 0.001 0.003 code a b c d e f g h j k l m n p max 6.35 5.05 3.95 0.45 0.72 0.72 0.73 0.61 0.27 1.70 3.12 0.70 0.08 0.17 min 6.25 4.80 3.85 0.35 0.68 0.68 0.69 0.57 0.23 1.57 2.95 0.59 0.03 0.08 metric dimensions max 0.250 0.199 0.156 0.018 0.028 0.028 0.029 0.024 0.011 0.067 0.123 0.028 0.003 0.007 imperial
 10 www.irf.com directfet  substrate and pcb layout, mq outline (mediumsize can, q-designation). please see directfet application note an-1035 for all details regarding the assembly of directfet. this includes all recommendations for stencil and substrate designs. g = gate d = drain s = source g s s d d d d
 www.irf.com 11 directfet  tape & reel dimension (showing component orientation). min 7.90 3.90 11.90 5.45 5.10 6.50 1.50 1.50 code a b c d e f g h max 8.10 4.10 12.30 5.55 5.30 6.70 n.c 1.60 min 0.311 0.154 0.469 0.215 0.201 0.256 0.059 0.059 max 0.319 0.161 0.484 0.219 0.209 0.264 n.c 0.063 dimensions metric imperial loaded tape feed direction reel dimensions note: controlling dimensions in mm std reel quantity is 4800 parts. (ordered as IRF6604). for 1000 parts on 7" reel, order IRF6604tr1 standard option (qty 4800) min 330.0 20.2 12.8 1.5 100.0 n.c 12.4 11.9 code a b c d e f g h max n.c n.c 13.2 n.c n.c 18.4 14.4 15.4 min 12.992 0.795 0.504 0.059 3.937 n.c 0.488 0.469 max n.c n.c 0.520 n.c n.c 0.724 0.567 0.606 metric imperial tr1 option (qty 1000) imperial min 6.9 0.75 0.53 0.059 2.31 n.c 0.47 0.47 max n.c n.c 12.8 n.c n.c 13.50 12.01 12.01 min 177.77 19.06 13.5 1.5 58.72 n.c 11.9 11.9 metric max n.c n.c 0.50 n.c n.c 0.53 n.c n.c
 12 www.irf.com   repetitive rating; pulse width limited by max. junction temperature.   starting t j = 25c, l = 0.70mh r g = 25 ? , i as = 9.6a.  pulse width 400s; duty cycle 2%. 
 surface mounted on 1 in. square cu board.  used double sided cooling , mounting pad.   mounted on minimum footprint full size board with metalized back and with small clip heatsink.  t c measured with thermal couple mounted to top (drain) of part.  r is measured at   
  data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 11/05 directfet  part marking
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/


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