maximum ratings: (t a =25c) symbol units drain-source voltage v ds 20 v gate-source voltage v gs 8.0 v continuous drain current (steady state) i d 430 ma maximum pulsed drain current (tp=10s) i dm 750 ma power dissipation (note 1) p d 350 mw power dissipation (note 2) p d 300 mw power dissipation (note 3) p d 150 mw operating and storage junction temperature t j , t stg -65 to +150 c thermal resistance (note 1) ja 357 c/w electrical characteristics per transistor: (t a =25c) symbol test conditions min max units i gssf , i gssr v gs =4.5v, v ds =0 2.0 a i dss v ds =16v, v gs =0 1.0 a bv dss v gs =0, i d =250a 20 v v gs(th) v ds =v gs , i d =250a 0.45 1.0 v v sd v gs =0, i s =350ma 1.2 v r ds(on) v gs =4.5v, i d =430ma 0.9 r ds(on) v gs =2.5v, i d =300ma 1.2 r ds(on) v gs =1.8v, i d =150ma 2.0 c rss v ds =16v, v gs =0, f=1.0mhz 20 pf c iss v ds =16v, v gs =0, f=1.0mhz 175 pf c oss v ds =16v, v gs =0, f=1.0mhz 30 pf CMLDM5757 surface mount silicon dual p-channel enhancement-mode mosfet description: the central semiconductor CMLDM5757 consists of dual p-channel enhancement-mode silicon mosfets designed for high speed pulsed amplifier and driver applications. these mosfets offer very low r ds(on) and low threshold voltage. marking code: 77c features: ? esd protection up to 1800v (human body model) ? 350mw power dissipation ? very low r ds(on) ? low threshold voltage ? logic level compatible ? small, sot-563 surface mount package ? complementary dual n-channel device: cmldm3737 notes: (1) ceramic or aluminum core pc board with copper mounting pad area of 4.0mm 2 (2) fr-4 epoxy pc board with copper mounting pad area of 4.0mm 2 (3) fr-4 epoxy pc board with copper mounting pad area of 1.4mm 2 applications: ? load switch/level shifting ? battery charging ? boost switch ? electro-luminescent backlighting sot-563 case r2 (5-june 2013) www.centralsemi.com
CMLDM5757 surface mount silicon dual p-channel enhancement-mode mosfet sot-563 case - mechanical outline pin configuration lead code: 1) source q1 2) gate q1 3) drain q2 4) source q2 5) gate q2 6) drain q1 marking code: 77c electrical characteristics per transistor - continued: (t a =25c) symbol test conditions typ max units q g(tot) v ds =10v, v gs =4.5v, i d =200ma 1.2 nc q gs v ds =10v, v gs =4.5v, i d =200ma 0.24 nc q gd v ds =10v, v gs =4.5v, i d =200ma 0.36 nc t on v dd =10v, v gs =4.5v, i d =215ma, r g =10 38 ns t off v dd =10v, v gs =4.5v, i d =215ma, r g =10 48 ns www.centralsemi.com r2 (5-june 2013)
CMLDM5757 surface mount silicon dual p-channel enhancement-mode mosfet typical electrical characteristics r2 (5-june 2013) www.centralsemi.com
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