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| !" #$ !% &'( ')(*+,-()'-. /"01 (.2 ,'1* .)342131.3. ! " ! "#$ ! !! " ! " !"#$ "% &"& & ' ( )) *+"#,*+ - )) *+!,*+ ) $ . /)) ) 01234) $ ##% ! &') 31) 5 ) 6 )7809:$ 7(09: /)/7309:6 $ ) / / ;/ $ / < / ) ) ) //2 =( / ) ) ) 5 7 : > $ / / 5 /) */ 0 =1 ) /5 ?$5 ) // ) ) $ ) 5 // 5$ $ ) ) ) ) / ! "# $% & > #% ) ) 5 ) / 8/ < @ 7*+%: ) " ) / 5 ) ) 5 / 5 $ / 5) / ) 5 ) a 5 ) ) ) / "%0?70 ?/ : / 7) /) ) : 8/ 5 ) / /) $ 5 ) 5 $ '(%' ( ) & $ 5 / // =$ ) / $ 001234 *4$ $ $ ) $ ) / / / )) $ /) ) / ) 7)/ / >):/ $ ) /) $ /) ) $ / $ $ /5) 5 / ) a 7 : b *4/ $ $ $ a < / c $ a > / ) ) $ *'*+, , - - - 8 $ / ) $ 2 / a 01234 $ ) ) ) / . / 2d=@d9) *+!7*91 : *+%=*+ 7 : e ) ) / / $ ) $ / / $ )) / / $. / $ ) / )$ / ) ) ) ;/ ) $)$ / ( ) / ) . 1$ /) / ! " # $ %& ! " # $ % & ''()* +! & , % - !!" # !!"$ % # &!'() *)+ !, . / 0 1 - . !!/0" .1 ( , % . !!/0 . 1 ($, 2304. &&+! ( 0 5) $61 5) 7 "6$0.1 ) $ 2 3 4 " % 5 +! 6 $ ! 7 8", 6 9: "; 6 $ 8", 6 !<0 8", 6 &57867! / ) % 6$7 / ) % 9$6/ 2 0$6* !"/:; !!86 2 &1 &1 & ' 2 '= & . & 0 / . & 5)0)$ " ' && ' &- 5) : # ' ' &5 &$$ !/ % ! " >?* ) &@ 5)#40 ) ) $ >6* ( . 8 -1 5)- )) ) $ > * ( . 88 - ( . >6> - >5* '= ( $ - >&* ' ( - 3 #$ ! %!&' (( 5)%+;$$<) 3/$ 5)2+;$$0 3/$ '&' (( 8 384 a -- 7 7 -- () % , -5 ! " ! * (+ # , * - ' . (+ $ % & ' ( # # (" < -@ +! 3''()4 -b . 3.c(')4 51 ' 5 ! "##$ ! % &'()# *+ #,--. #, ( &/#$ * % !$$0%. "$'1 ** $0%. "$'1 * %2*3 %2 ( 0 5? * /)#4#% * )#()#$#,!# 4#% ') ' 5b * "$ & &$$ 0 (! 1 + / #0 ' '0 1 * 00 1 0 ( 1-@d-@< ( 6 & . ! ' 0 1 . f g 22 3 4 ! ! "! #$% ! ! "! $% ! v cc v ss bank 1 address bank 2 address a20?a0 reset# we# ce# byte# dq0?dq15 wp#/acc state control & command register ry/by# bank 1 x-decoder oe# byte# dq15?dq0 status control a20?a0 a20?a0 a20?a0 a20?a0 dq15?dq0 dq15?dq0 dq15?dq0 dq15?dq0 mux mux mux bank 2 x-decoder y-gate bank 3 x-decoder bank 4 x-decoder y-gate bank 3 address bank 4 address ( v cc v ss upper bank address a20?a0 reset# we# ce# byte# dq15?dq0 wp#/acc state control & command register ry/by# upper bank x-decoder y-decoder latches and control logic oe# byte# dq15?dq0 lower bank y-decoder x-decoder latches and control logic lower bank address oe# byte# status control a20?a0 a20?a0 a20?a0 a20?a0 dq15?dq0 dq15?dq0 1 16 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 48 33 47 46 45 44 43 42 41 40 39 38 37 36 35 34 25 32 31 30 29 28 27 26 a15 a18 a14 a13 a12 a11 a10 a9 a8 a19 a20 we# reset# nc wp#/acc ry/by# a1 a17 a7 a6 a5 a4 a3 a2 a16 dq2 byte# v ss dq15/a-1 dq7 dq14 dq6 dq13 dq9 dq1 dq8 dq0 oe# v ss ce# a0 dq5 dq12 dq4 v cc dq11 dq3 dq10 5 6 e ,e & "e *+"&,*+ & "#*<)/=3/)/7>"% : *+"#=e" & *+"#7*<)/=3/)/$ :e"7 @ e <)/ : 809 & 8 )0 309 & 3/)/0 (09 & ( 0 (19=e88 & $ ( 1 = e 1 2009 & $ 21 e $ @d09 & ' "% 2d=@d9 & 2 =@/3/)/ . & )$ /)) 71 / h/ ) ) /)) : . & * h / ?8 & 1 ?8 < " "% ' *+"#,*+ 7e": e ,e 809 309 (09 2009 @d09 2d=@d9 (19=e88 / 7. 8 : $ ' ! " " " # # " " $$ % 7 + . . 8 / ) /)) / 8// ) ) 5$ ! " ! # ! " # ! # ! " # ! $ $ ! " $ $ ! % % & '( ) *#+ ), - . / 0!1 ." 2& 0 3 '.20, . 0 & ++ ++ $ $ 4 4 !" "# $% &' ( #) ! ' "*+ "'% ! ,' +## +) !" # ;/ / /) $ / /) / $ > / )/ /)/ / " /) )/ ;/ / /)/ $ / ) / !"#$% & ' ( ! ! "# $ % &'()*+ , $ - ./ % &'()*+ , ! ! "##$ % & ' !" # $ !" #$ ! "#! $ $ ! "#! % $ &'(' ) * % $ +) $ $ $ % $ ,-, . ! % / " $ $ ,0 (, . ! / " $ $ 12( ,0 (, $ $ $ ! @d09) $ <=3) ) $ / < @d09) i"j $ / *+"#,*+ 809 309 < @d09) i j / <=3) *+!,*+ 809 309 <= 3) *+"&,*+' *+"#) / )/ @7e": / /)// 809 309 ) . 809 )$ 309 /)/ /)/) (09/ . @d09) $ /)/ $ /) )$ /) $ / )/ / / / )$ ? ) )/) / /)/0 5 / 2 e8 2 33) ) a / " < *88 ) / ) $ ;/ 7$ / ) :/ (09 809. 309. a ) ) @d09) $ ) ) $ 2 k( =@8 / l / ) 3 5 b 5@) $$ ;/ ) $ / k@=( 1 8 ;/ l ) / b 5@) ;/ e ) / ) & ) /) k l ;/ / ;/ k8 * l ) /) = / ) ) / 5ek5 l ;/ / ;/ 5 < *88 ) / ) $ e88 ) $ ) ( ) ) /e88 / $ / ) (19=e88) / ) $ / / /)/ < . ) / b 5@) ) /) ) / ) / ;/ ) ) $/ /$ ) ;/ ;/ b 5@) 2 . (19=e88) / ) " # $ % &'' ( ) ( $ % &'' * + k( 1 7(19:l < $ / ;/ / / 7$ ) :*+"#,*+ )) 2 e/ 4 e/ 8 ;/ ) *+ , - ) 5 $ ) 5 e ) /) ) $ 57> ) : a / $$ $ //) $ < < *8 8 ) / ) $ ) $ ) ( $ ) < / /) / /)/ ) ) ) 309 )/ 843 $809 2009) . m .7? . :< 809 2009 . /$ . m . $ / / $ ;/ 7 : $ < / / ) $ / / ) ) < *88 ) / ) / ) a /) / $ n / ) ) 809(09 309 ) $ $ ( ) /)/ $ < *88 ) / ) / ) !"# $% & 2009) ) $ (2009) $ ) ) ) /)/ ) =$ / 2009)/ ) $ /) / ) ;/ / 8/ / / 2009)/(2009 . m . $843 / 7 < :< 2009 . /$ . m . / $ 2009) / e $/ / a /) $ a < 2009 / ) ) 2d=@d9) k l7/:/ ) )$ ;/ 7 / 0 e : / 2d= @d9 $ ) )< 2009 $) ) > / 72d=@d9) k"l: ) ) $ 7 / 0 e : 2009) / . 2 e88 2009) a / "& ' (309 )/ . /)/ /)/) ) ) *$ 234 567 # ! 8 9: 8 9 8 9 8 9 ; ; ; ; !( ! ) * $+ , o *-. ) o / 0 ) o *-. o / ( * / -123 ) o *-. o / ( * / -123 ) o *-. o / ) * $+ ) o *-. o / 8 9: 8 9 ; ; ( ) * $+ , o *-.) o / 0 ) o *-. o / , * 42-1 ) o *-. o / ( , * $+ , o *-.) o / 22 ) o *-. o / ) * 4 -1+ ) o *-. o / )( ) ( * $+ , o *-.) o / + -1 ) o *-. o / ( * + -1/ ) o *-. o / *$ 234 5 # 8* 6 . *$ 234 5 # 8* 6 . ! *$ ( 234 5 # 866 . *$ ( 234 5 # 866 . ! / ) / / ) / /)/*+!,*+ ) ) ;/ )/ ) $ ) ) $ / / (/ ) ;/ )/ ;/ ) ee ) /$ # < $ ) /)) )) ) # $ j ( ;/ ) ;/ ) ) *+!,*+ $ / / $ ) $ / e) ;/ / " " & , &- &.(&/0 &/1 2 ( (2 3 / // $ " ;/ 2 e/ 8 ;/ . !"#$% / 0 1 2 3 description ce# oe# we# a20 to a12 a11 to a10 a9 a8 to a7 a6 a5 to a4 a3 a2 a1 a0 dq15 to dq8 dq7 to dq0 byte# = v ih byte# = v il manufacturer id : spansion products l l h ba x v id x l x l l l l x x 01h device id (models 01, 02) read cycle 1 l l h ba x v id x l x l l l h 22h x 7eh read cycle 2 l h h h l 22h 0ah read cycle 3 l h h h h 22h 00h (bottom boot) 01h (top boot) device id (models 21, 22) l l h ba x v id x l x x x l h 22h x 56h (bottom boot) 55h (top boot) device id (models 31, 32) l l h ba x v id x l x x x l h 22h x 53h (bottom boot) 50h (top boot) device id (models 41, 42) l l h ba x v id x l x x x l h 22h x 5fh (bottom boot) 5ch (top boot) sector protection verification l l h sa x v id x l x l l h l x x 01h (protected), 00h (unprotected) secsi indicator bit (dq6, dq7) l l h ba x v id x l x l l h h x x 82h (factory locked), 42h (customer locked), 02h (not factory/customer locked) & ? a $ / k l)) 5e 5 $ p ) /) 7 % : $ ) / ) ) $ /) / ) ) ) /) ) = /) ) $ *$ 234 56 9 67# 0 9: * 6 . sector a20Ca12 sector/ sector block size sa0 000000xxx 64 kbytes sa1-sa3 000001xxx, 000010xxx 000011xxx 192 (3x64) kbytes sa4-sa7 0001xxxxx 256 (4x64) kbytes sa8-sa11 0010xxxxx 256 (4x64) kbytes sa12-sa15 0011xxxxx 256 (4x64) kbytes sa16-sa19 0100xxxxx 256 (4x64) kbytes sa20-sa23 0101xxxxx 256 (4x64) kbytes sa24-sa27 0110xxxxx 256 (4x64) kbytes sa28-sa31 0111xxxxx 256 (4x64) kbytes sa32-sa35 1000xxxxx 256 (4x64) kbytes sa36-sa39 1001xxxxx 256 (4x64) kbytes sa40-sa43 1010xxxxx 256 (4x64) kbytes sa44-sa47 1011xxxxx 256 (4x64) kbytes sa48-sa51 1100xxxxx 256 (4x64) kbytes sa52-sa55 1101xxxxx 256 (4x64) kbytes sa56-sa59 1110xxxxx 256 (4x64) kbytes sa60-sa62 111100xxx, 111101xxx, 111110xxx 192 (3x64) kbytes sa63 11111 1000 8 kbytes sa64 11111 1001 8 kbytes sa65 11111 1010 8 kbytes sa66 111111011 8 kbytes sa67 111111100 8 kbytes sa68 111111101 8 kbytes sa69 111111110 8 kbytes sa70 111111111 8 kbytes *$ + 234 5 9 67# 0 9: 66 . ) = b) ;/ . 2009) ) ) ;/ ) a / $ a / # $ a /) /) / ) ) /) $ " * & * ) ) /) / k) b) l )) $ /) 3) ) ) ) ) ) )) 8 / < ) $ ) /) e/ 4 sector a20Ca12 sector/sector block size sa70 111111xxx 64 kbytes sa69-sa67 111110xxx, 111101xxx, 111100xxx 192 (3x64) kbytes sa66-sa63 1110xxxxx 256 (4x64) kbytes sa62-sa59 1101xxxxx 256 (4x64) kbytes sa58-sa55 1100xxxxx 256 (4x64) kbytes sa54-sa51 1011xxxxx 256 (4x64) kbytes sa50-sa47 1010xxxxx 256 (4x64) kbytes sa46-sa43 1001xxxxx 256 (4x64) kbytes sa42-sa39 1000xxxxx 256 (4x64) kbytes sa38-sa35 0111xxxxx 256 (4x64) kbytes sa34-sa31 0110xxxxx 256 (4x64) kbytes sa30-sa27 0101xxxxx 256 (4x64) kbytes sa26-sa23 0100xxxxx 256 (4x64) kbytes sa22Csa19 0011xxxxx 256 (4x64) kbytes sa18-sa15 0010xxxxx 256 (4x64) kbytes sa14-sa11 0001xxxxx 256 (4x64) kbytes sa10-sa8 000011xxx, 000010xxx, 000001xxx 192 (3x64) kbytes sa7 000000111 8 kbytes sa6 000000110 8 kbytes sa5 000000101 8 kbytes sa4 000000100 8 kbytes sa3 000000011 8 kbytes sa2 000000010 8 kbytes sa1 000000001 8 kbytes sa0 000000000 8 kbytes & (&") ( 1 / ) $ ) $ // . / $) (19=e88 ) < . (19=e88) ) / $/ ' ) $ $ ) /) / k = @ 51 b) l $/ ' $ $ / $ ) / < . (19=e88) $ $/ ' @ $ ) /) ) /) $ ) $ $ ) /) / k = @ 51 b) l ?(19=e88) / / - / *$ " 0;9# ! 7? a $ / k l)) 5e 5 $ p ) /) 7 % ! :: / $ ) /) ) /) ) b) 2009) */ ) ) 3 2009) ) /) ) a / " $ a / & $ / < (19=e88) . $/ $ ) / ) b) ! " # '! 1 * : ! ! " # $ '! 8 0 9: #' sector protect: write 60h to sector address with a6 = 0, a1 = 1, a0 = 0 set up sector address wait 150 s verify sector protect: write 40h to sector address with a6 = 0, a1 = 1, a0 = 0 read from sector address with a6 = 0, a1 = 1, a0 = 0 start plscnt = 1 reset# = v id wait 1 ms first write cycle = 60h? data = 01h? remove v id from reset# write reset command sector protect complete yes yes no plscnt = 25? yes device failed increment plscnt temporary sector unprotect mode no sector unprotect: write 60h to sector address with a6 = 1, a1 = 1, a0 = 0 set up first sector address wait 15 ms verify sector unprotect: write 40h to sector address with a6 = 1, a1 = 1, a0 = 0 read from sector address with a6 = 1, a1 = 1, a0 = 0 start plscnt = 1 reset# = v id wait 1 ms data = 00h? last sector verified? remove v id from reset# write reset command sector unprotect complete yes no plscnt = 1000? yes device failed increment plscnt temporary sector unprotect mode no all sectors protected? yes protect all sectors: the indicated portion of the sector protect algorithm must be performed for all unprotected sectors prior to issuing the first sector unprotect address set up next sector address no yes no yes no no yes no sector protect algorithm sector unprotect algorithm first write cycle = 60h? protect another sector? reset plscnt = 1 * ( ) + , 7 / : / ) a ) ) /0 ?/ 70?: #% / < @ 7*+!: $ 5 $ )) ) $ ) 5 ) / / 0? ) / )) ) / $ 5 / 5 5 $) $ )) < @ ) k"l / 5 )) $ /) $ / / / 5 < @ ) k l/ < @ ) / 5 / ) 5 8/ < @ 7*+%: ) " ) / 5 ) ) 5 / 5 / / ;/ 7 k0 q =0> 8 ;/ l :e $ 0 ;/ / /) ) // /0> ;/ / )$ 3)$ /) $ $ #% " &'' * 2 # 4 < 5 ) $ )) $ ) ) $ / / 0?' $ / , ! $ 7 , a : / 0? ) >' $ ', a7 " , "a : ) ) $ $ " e / 0? 8/ /) ) @ / 0? / /) ) 8 / / ) ) # 4 5( < / / ;/ a ) / / ) 5 " * ,&''- 2 ) / $ ) / " ( 0 2 ;/ $ ) $ a / > ) 455% # # $ ) 2 $ / ) ? )) ( 0 2 ;/ / ) k = @ 51 b) l 3 5 /$ 0> 2 ;/ / $ 5// $ / 5 ) / / 5 ) $ $% & ;/ ;/ / 5 ) ) ) $ 7 " :< $ $ ) / ) / ) $ $ / )/ / / . )$ /) )$ $ # 1 6 (. . )$ ) / . )$ /) )$ $ ) = / /;/$ / . . /) ) ) ) ) / $ $. . 78 9 ? )/ #7) :309809 (09 $ # 6 ( 309 $ . 809 $ . (09 $ . $ 809 (09/ $ 309 :; 6 < (09 $ 809 $ . 309 $ . / )$ /) ) (09 / )$ /) ) *+ ,) - 8a< 78a<:) / $ 5$ $) ) $ / $ /)) ) 0*08<* ) $ 5 $ ) ) a > ) 8a<+/ $$ 8a<+/ ' ## $ 7 ee : 8a< , " 8a< /$ 8a<+/ $ > / 0 1 0 $ 8a<;/ $ / 8a<;/ 8a< , " /$ a / ) 8a<) 8a<1/ " 8 / ) / *$ 2 % #$ %% $ %& $ & #$ && $ & %$ ##& % $ ##& & $ ##&'$ () ' *) ++ ,( ( -. % /$ % %$ & 0$ & 1$ ### & $ ####$ ! " 2 % &$ % 0$ & $ & $ ##%#$ ####$ ) ! 3 * 4 % 5$ % 1$ & $ /#$ ####$ ####$ " 2 ##$ g 3 % '$ % $ / & $ /%$ ####$ ####$ ) " 2 3 * 4 ##$ g 3 < < 8 % 6$ /0$ ## & 5$ 2 7 8 9 :5;:% f < = :/;:# f % ## < % $ /1$ ##/0$ 2 37 8 9 :5;:% f < = :/;:# f % ## < % :$ / $ ####$ 2 7 < ##$ g % $ / $ ####$ 2 37 < ##$ g % >$ / $ ###/$ * ) 4 98 8 & r & #$ %#$ ####$ * ) ) 2 7 ? 4) )) 8 & r ##$ g ) &% $ % & $ ###'$ * ) < ) 4 @ & && $ %%$ ####$ * ) ) ) ) $ & ##$ g ) & /$ %0$ ###&$ 2 37 ) ) 4 98 8 & & %$ %1$ ####$ 2 37 ) ) 4) )) 8 & & &$ % $ ###%$ 2 37 ) < ) 4 @ & & 0$ % $ ####$ 2 37 ) ) ) ) $ & ##$ g ) *$ 11 . = *$ 1 0 > 8 /% & 5$ % $ ## % 0$ : < ? g & 4 & 1$ & '$ &#$ & & $ ### & $ ####$ > $ : < + ) ) >+ )4 % ## & $ & 6$ &%$ &0$ ####$ ####$ 2 37 ) 4 ) 4 ) a4 8 g & ##$ g ) & $ &1$ ### & $ + ) 4 ) 6 @ ( 8 $ < & :$ & $ & >$ /#$ & $ & $ & $ 0#$ ###5$ ####$ ## & #$ ####$ 6 @ ( % + ) ) $ >+ ) >+ )4 % ## / % $ / & $ //$ /%$ 0 & $ 0%$ 00$ 01$ ##/ $ ####$ ####$ ### % $ 6 @ ( & + ) ) $ >+ ) >+ )4 % ## /&$ /0$ /5$ /1$ 0 $ 0 $ 0 $ 5#$ ####$ ####$ ####$ ####$ 6 @ ( / + ) ) $ >+ ) >+ )4 % ## /'$ / $ /6$ / $ 5 & $ 5%$ 50$ 51$ ####$ ####$ ####$ ####$ 6 @ ( % + ) ) $ >+ ) >+ )4 % ## < < 8 %#$ % % $ % & $ 1#$ 1 & $ 1%$ ##&#$ ##& & $ ##%'$ () a) *) ++ , !( +. %/$ 10$ ##/ % $ 2 b < ) 4 = ++ ) ) $ %%$ 11$ ##//$ 2 < ) 4 = ++ ) ) $ >+ 4 %&$ 1 $ ### $ < ' @ 6 % a# # g ( *) = % g + ( *) ( < + ) 4 6 5a & %0$ 1 $ ### & $ ) # g + ) = % g * ( " = & g * ( s c %5$ 1 $ ### % $ ! # g + ) = tg + ) 4 ) ) %1$ '#$ ### % $ * ' ## g + ) = # % g ) %'$ ' & $ ###%$ ! 9 ' $ # % g & '>#%# = # & g & '># % 0 = #/ g & '>%##= #% g & 'd 1## % $ '%$ ## tt $ + ) 4 ) 3 ) 6 @ % ttg /1 # % = # & = &% = && ttg /# / % = / & ttg & # % % = % & %6$ '0$ ####$ 6) 2 * ## g + ) = # % g ) % $ '1$ ####$ ! 2 * ## g + ) = # % g % c ! = # & g 1 c ! %:$ ' $ ##1&$ ) 2 ) ##$ g + ) = :5a:% f = :/a:# f % ## % $ ' $ ##'&$ ) 2 3 ) ##$ g + ) = :5a:% f = :/a:# f % ## %>$ ' $ ### t $ * 96 6 > # & $ g 6 6 : < = #/$ g * 6 : < &#$ #$ ### % $ ! ) # g + ) = % g ) &5$ $ ### t $ 6 @ " ? ## g : % $ ? tg % % 4 @ = # % = # & tg & & 4 @ = $ &1$ 6#$ ## tt $ 6 @ % ( + ) a + ) 4 ) 6 @ % ttg #> # % = # & = &% = && ttg % 5 / % = / & ttg & 5 % % = % & &'$ 6 & $ ## tt $ 6 @ & ( + ) a + ) 4 ) 6 @ & ttg % 1 # % = # & ttg /1 &% = && ttg /# / % = / & ttg & # % % = % & & $ 6%$ ## tt $ 6 @ / ( + ) a + ) 4 ) 6 @ / ttg % 1 # % = # & ttg ## $ &6$ 60$ ## tt $ 6 @ % ( + ) a + ) 4 ) 6 @ % ttg #1 # % = # & ttg ## $ < < 8 ( ) ;/ ) " ;/ $ 2 * 2 & e (09 809$ )) e (09 809$ )) 2 e88 / )$ /)? ;/ 0 5 ) 0 1 0 0 e )0 /) ) 5 /) $ /) $ 5 / > ) $ /) /)// e ) ) ) 0 /) $ > ) 0 /) =0 2 /8 / / 5 7 /) : *+# / ) ) 5 / > 2 8 2;/ 2 e * * @/3) 2 33) ) ) a / " $ ( 5 /) e j $ $;/ ;/ 5$ $$ 3 / $ / ) ) $ $;/ ) ;/ ) 5$ $$ < ) ;/ $ 5 0 /) $ / 5 /) 3 ) $ / ) ) $ $;/ / ;/ 3 / / $ / < 5 / $ 0 /) $ / 5 /) < *+# / ) ) $ / 5 7 /) 5 $ 0 /) : / ;/ $ / / $ ) / ;/ $ $ 5 /) / $ $ ) 5 / ;/ $ $/ 5 $ $ 5 / 5 / / / $ / ;/ " $ ;/ ) /$ )) ) 5 7@e: 7e: & $ 5/ $ /$ / 7 /) 5$) / 0 /) : * - ) / > / 70?: / 0 ;/ / / / / 0> ;/ 0> ;/ / ) $ > / 0 1 0 " $ ;/ ;/ k q 7 / : a 4 2 l / " &'' * 2 & ) $ ) @d09) 1 / / ) ) ;/ $ $/ 5$ $ ) /) ) $ >$ / 0 1 ;/ ) / / ) ) )/ ) " $ ;/ ) ;/ (0 1 )5 / / ) ) / *+!*+% 2d=@d92 ( 3) / / e $ / 0 1 e ? ) ) ) ;/ / 5 / / " * ( ( '6) 2 1 $ ;/ / . . ) = >. = ! > e) /5*+# $ " /*+! *+%/ ) $/ / $ / $ $ k l3 ) k lk"l ? " @ / 5) / $) $ 5 / ) ;/ / 5) ;/ $ $/ 5 $ $ / 5) 5 / 5) e$ / 5)) ;/ ;/ ) ;/ / 5)) e - ) e ) )$ $/ 5 ;/ ) ;/ / ) " $ ;/ ;/ */ / 5) b 5@)1 b 5@ )2 > / 5 ) / /$ / 5) ;/ 7 " : ) ) /(19=e88 ) ( . (19=e88) / b 5@) $ $ b 5 @)) ;/ / (19=e88) ) " $ % &'' # ( * ) ( $ % &'' + a / / ) ) 2 0 1 3) e88 ) a / "! % ( < = 8 ) >/ ) ) ;/ $ $/ 5 $ /) $ / 5$ $ ) $ / 50 0 ;/ ) ) ) 0 0 / ) ) ) ) ;/ ) / ) " $ ;/ ) ;/ (0 0 )5 / / ) / *+!*+%*+ 2d=@d92 ( 3) / / e $ / ) ) $ ) < / ) ;/ / 5 / / " ( ( '6) 2 start write program command sequence data poll from system verify data? no yes last address? no yes programming completed increment address embedded program algorithm in progress a / & / ) 2 0 1 3) e88 ) a / " >/ ) ;/ $ $/ 5 $ /) $ / 5 $ $ " $ ;/ ;/ ;/ ) ) ) 0 0 / ) ) ) ;/ ) / ) e ;/ $ / ' e / */ /) $ / ;/ / $ /' e $ / e $ > / ) < ) /) / / ) /) 0 $ . . / / $ ;/ *+ / 7 *+ " 0 : / (09 809 )/ 7 : ;/ (0 0 )5 / ?$ 0 0 ) ) 5 / ) *+!*+%*+ 2d=@d9 52 ( 3) / / 3 ) /0 /) e $ ) < / ;/ / 5 / / " ( ( '6) 2 a / & / ) 2 0 1 3) e88 ) a / " > ( * ) 0 /) @ $ /) ) ) / 5 ;/ $$ / ) / ' e / ) / ;/ 0 /) $ / ) ) 0 1 5 / / (0 /) $ / ) ;/ > / e /) ) $ $0 /) $ / / /) /) ) e ) /) 5 / ) ) / 7 k /) l / :2 $ /) ) / / *+!,*+ /*+! *+% *+ /) 2 ( 3) / / start write erase command sequence (notes 1, 2) data poll to erasing bank from system data = ffh? no yes erasure completed embedded erase algorithm in progress e /) ) ) )5 / /) / ) ) / *+! *+%/ p/ @1 ) 2 ( 3) / < /) // ;/ $ / $ ( > / 0 /) ) 2 e/ 4 e/ 8 ;/ / ) /$ 0 2/ 5 /) 5 ;/ $$ a/ $ 2/ e 0 /) $ ) / *$ 1 234 5 !" # !" $ !" % # $ & ' () ) " * & + ) # ,- ' (( #. ,- & -/ & & 0" * 122 ' 0" * 122 & -/ & & 0" * 122 ,2 ' %3 1 #2 ( #2 ( ' #2 21 #2 ,2/ ' %$ 4 ( ! " ! " # " $ % &'( )&* + , - . ! &'( )/* . ) # 0 ) & " 1 + 1 1 * ! , 2)3(2/ * 1 3 4 ! &'( )) . # * 5 6. * ! . 7 0 * $ 8 8 " # % ! . 23 $! . " % / 0 * 0 " . 9 " 9 # ## 2)3(2/ . " # # * : ; ') '& " 9 1 )' 0 /& . ,& . '& < . )) 0 '' < . ') < . )& 0 4.- * 4. - )+ 0 4.- * ! . . ), 0 8 ! # 0 # " * . )3 0 " # * . )5 " ! " ! " . ) / ) ) " *+*+ *+#*+% *+! "& $ / / *+! *+% $ ) ) ) ) ) $ /)/ 2d=@d9 $ 0 1 0 ) ) ) 01# " & *91 *+! $ 0 1 0 ) ) $ 5 0 /) *91 (09)/ ;/ */ 0 1 /)/*+! ) /) *+! *+!/)) ) / 0 /) (0 1 ) /)/ /) *+!/ ) ) / *+!< ) $ ) *91 *+! )) > " e 5 / */ 0 0 *91 ) / k l*+! (0 0 ) 5 0 /) *91 ) / k"l*+!/) $ / / *+! e ;/ $ ) *91 *+! )) > " e 5 / < ) 0 0 /) ) $ *+! $ ) / ( *+! ) / *+"#,*+ 7 *+!,*+ >' : * 2 /) ) 0 1 0 ) *+! /$ *+"#,*+'7*+!,*+ >' :$ 3/)/07309: $ ) / *+! *) $)*+!/)/ / 0 ) ) ) *+! /)/ *+"#,*+ . *+"#,*+ 7 *+!,*+ >' :$ )) / "& $/)/ *91 *+! a / # $*9 1 a / " e8 8 $*9 1 . & ? dq7 = data? yes no no dq5 = 1? no yes yes fail pass read dq7?dq0 addr = va read dq7?dq0 addr = va dq7 = data? start ! "# $ " 22"# " 2d=@d9 ) /)/) $ $ 0 e ) )2d=@d9/ (09)/ ;/ 2d=@d9 ) /)/ 2d=@d9) ) $ )//) . < /)/ $7@/: ) 7 / ) 0 /) :< /)/ 72 : 5 /) "& $/)/ 2d=@d9 03# ! 4 @ <*+% $ 0 1 0 ) ) $ 0 /) @ < (09)/ ;/ 7) ) ) : / / */ 0 1 0 ) / /*+%/ 309 809 () )*+%) e ;/ $ ) *+% )) > " e / < ) 0 0 /) ) /*+% *+ $ /) ( 7 0 0 ) :*+%( 0 /) *+%) $ / /*+ $ /) e /*+!7/ *+! " *91 : < ) $ ) *+% )) > " e ) ;/ $ / *+% / /) ) ) 0 1 ) @ ' a ' k@ < ! " # *+$ $ / 7/ 309 809 :@/*+ / $ /) *+% ) $ 0 /) / / $ / // ;/ 2 "& ) /)/ *+ *+% a / % $ $ k*+ " @ < ! 0305 2 a / % $ / ( / / *+"#,*+ 7 *+!,*+ >' :$ $ $ ) $/ / e $/ ) $/ $ < ) ) ) *+"#,*+ 7 *+!,*+ >' : $ $ $ / $ / *+# 7 *+#: < / $ )) p/*+#$ < / / ) ) ) < ) ) / / /$ / *+# / *+# // / ) /) )e ) 5< / $ / / ) 7) a / % : 06# - ! 7 *+# $ ) > ) )/ / b *+#) / k"l ) $/ / ) /)/k"l*+# ) k"l $) /) k l 89: 8;/: b ) $ > *+#) / k"l b /$ / 7 /) 5$) / /) ) : 0<# ! e $ ;/ *+ $ / /7 )) ) :< / /)) ( /) )*+ $ k lk"l< $ / # e *+ 0 8 ;/ e $ / / *+!7*91 : *+%7@ <:/ ) ;/ *+ < *+ k"l0 0 /- / 7> )0 /) : / ) )< *+ k l $ ) / ) $ / 5/ *+ ) $ / ;/ < *+ / 5 ) "& $/ *+ / *$ 1( ! ! " # $ % & & " ' ( ) " & & *&' a4 a3 a2 : a a b 8bc 2 ! ! / +0 1 ! " # $ " %&'"(" ) *+, #+ +, %&!' "!" - ,. "" %&' "" " * %&/' ! ! "# $% " # $& '()*+)#),* -.*' '()*-.* ' +)#),* # $% ! '(" / 0 " 1 ! -.*' "(/ 0 " 2 3 4 00 4 0 # 4 5'4 !+ 6 0 0, 7 0 0 0 4 0 0 )! 0 4 ! 0 ! 0 0 4 1 6 063 & e ) / 7 : ,& u8n'#u8 1 1 . !. %. b 2 c 5 ( d 2 c ( " , " , # , $% & ' , $( & " , '"$ , & " , " , & #"$ , & & # , $( & " , "$ , & * ' ! " # $ $ % & & ' $ $ ( ") * )) + , -)). d ) ) * + g , g 7 r ) -, . ) * + g , . g / - . g & 7& 0 & r ) . *1 + g , g , . g 7 r ) *1 + g / g & 7& 0 & r ) ! 2 + 3 , & 4 + g , . , 56 & 78 9 78 & : + g , . g , ; & 78 9 78 & : ) ! 2 ; + 3 & , 0 4 + g , . g , ; g & 0 ) 4 6 + 3 & 4 + , g 7 0 7 & & r ) + 3 & 4 g 7 0 7 & & r ) ! 3 & , : 4 g 7 0 / g 7 0 7 & & r ) ! 2 ; $ ! + 3 , & 4 + g , . g 56 & : & ; & : & ) ! 2 ; $ + 3 , & 4 + g , . g 56 & : & ; & : & ) ! 2 ! ; $ + 3 & , & 4 + g , . g 0 & ) *< ; 7& 71 ) 7 $ 7 = f 7 0 > ; ! ++ ! ! ! ? ! ! !! g 0 7 @ v 17& - 7& v id > ! 6 ! ? ! g 0 7 v 17& & 7& . *< ) g : 7 , g 7 : & . 7 $ ) g ; & 7 , g 71& = ) g ; r , g ; 7 : *< *!1 . 3 & 4 & 7 0 & 7 : & 7& * = &% + , '! 2 ! . * -'#. #! ! 25 20 15 10 5 0 0 500 1000 1500 2000 2500 3000 3500 4000 supply current in ma time in ns 10 8 2 0 1 2345 frequency in mhz supply current in ma '! 1 * . ?! 2.7 v 3.6 v 4 6 12 2 3 * . . * * . * + ! !, + 3 ! a ! ! !4 0 b ) b & ) ! *2 7 !! ) > ! 2 7& !! . > ! 2 7& !! " 7 - . ? / 7 " . ? 5 0 '! 11 * ! < !"#$ e $ 6 + $ > 7 * + $ > * 7 c +, 6 + $ ! + $ , ? 1 < 6 + * 7 $ ) ! 37 $ w 4 vcc 0.0 v 0.5 vcc 0.5 vcc output measurement level input '! 1 ! . ! 4 . /* ' ' 6 // / ! " ' $ %" ' " & 22 3 ' 4 ' (' +6! 3 4 && 9 - . 6 + , . g = && 9 - + $ 4 . 6 . g = && 9 - . 4 . 6 = & & 0 0 & + $ 4 . 7 $ w 3 , 0 4 = 9 . 4 . 7 $ w 3 , 0 4 = 9 . 7 b , + . , ; $ ! $ 2 .!! b . 4 7 3 4 ! & t oh t ce outputs we# addresses ce# oe# high z output valid high z addresses stable t rc t acc t oeh t rh t oe t rh 0 v ry/by# reset# t df '! 1 & *' /* $% ( !") > ! *< 3 4 $ 4 3 4 = & r ! *< 3. 4 $ 4 3 4 = & ! ; $ & 7 $ 5> 3 4 & *< 4 6 & r d5d !26 reset# ry/by# ry/by# t rp t ready reset timings not during embedded algorithms t ready ce#, oe# t rh ce#, oe# reset timings during embedded algorithms reset# t rp t rb '! 1( & *' /* (2! ") > ? + 5d < ! $ *< 7 $ = & 5d < ! $ *< . 7)e7 w = 9 5d < ! $ 7 $ . ! 2 && 9 - 5 1 ! ( !"#! $ %&' & & () '& !"#! $ %&' () & & '& '! 1) 6@*/;*' & '! 1 6@*/;*' * # %++! $ $ &% # + * !$ + /* & ' & ' > ? ; +6! 3 , 4 - && . / - . < 4 - 0 1 - 2 2 & : : & 1 3 + . $ $ 4 - - 2 2 & : : & 1 - . 4 1 $ 4 - 0 4 4 ! 5 6 5> ; 3. 1 $ ; 6 <4 - + - + 1 - ; 7 ; $ - 0 & 0 & 2 2 & ; 7 ; $ 1 $ - 0 & 0 & 2 2 6 !6 5 < 4 ; . - 7 . 3 , 0 4 56 6 : r ; 6 . !! 7 . 8 56 ; 3 , 0 4 6 : r ! . 3 , 0 4 6 9 : ! : 3 , 4 - & r ; 4 ! 5 6 > 4 d5d - 7 : 4 d5d 6 - ; / /* oe# we# ce# v cc data addresses t ds t ah t dh t wp pd t whwh1 t wc t as t wph t vcs 555h pa pa read status data (last two cycles) a0h t cs status d out program command sequence (last two cycles) ry/by# t rb t busy t ch pa '! 1+ 0 ' *' w p#/acc t vhh v hh v il or v ih v il or v ih t vhh '! 1" # 0 ' *'' /* oe# ce# addresses v cc we# data 2aah sa t ah t wp t wc t as t wph 555h for chip erase 10 for chip erase 30h t ds t vcs t cs t dh 55h t ch in progress complete t whwh2 va va erase command sequence (last two cycles) read status data ry/by# t rb t busy 2 2 '! 12 9 / *' /* oe# ce# we# a ddresses t oh data valid in valid in valid pa valid ra t wc t wph t ah t wp t ds t dh t rc t ce valid out t oe t acc t oeh t ghwl t df valid in ce# or ce2# controlled write cycles we# controlled write cycle valid pa valid pa t cp t cph t wc t wc read cycle t sr/w '! 6788$7& 9 *' we# ce# oe high z t oe high z dq7 dq0?dq6 ry/by# t busy compleme tru addresses va t oeh t ce t ch t oh va va status complement status tru valid data valid data t acc '! 1 ;0'*' ! '/$ #' /* oe# ce# we# a ddresses t oeh t dh t aht t aso t oeph t oe valid data (first read) (second read) (stops toggling) t ceph t aht t as dq6/dq2 valid dat a valid status valid status valid status ry/by# '! *'' 6*' ! '/$ #' '! <. < enter erase erase erase enter erase suspend program erase suspend read erase suspend read erase we# dq6 dq2 erase complete erase suspend suspend program resume embedded erasing /* ! > : 4 3 3 , 4 - & : 4 3 3 , 4 - 0 & 4 > 6 ! < ! - : r 4 1 > 4 d5d 1 $ > 6 ! < ! - : r r eset# t vidr v id v ss , v il , or v ih v id v ss , v il , or v ih ce# we# ry/by# t vidr t rsp program or erase command sequence t rrb '! ( * : *'' /* sector group protect: 150 s sector group unprot ect: 15 ms 1 s r eset# sa, a6, a1, a0 data ce# we# oe# 60h 60h 40h valid* valid* valid* status sector group protect/unprotect verify v id v ih '! ) 9 670 : *'' /* " & ' & ' > ? ; +6! 3 , 4 - && && / - 1 - 2 2 & : : & - 2 2 & : : & 1 - 4 4 ! 5 6 5> ; 3. 1 $ ; 6 <4 - ; - ; 1 - + 7 ; $ - 0 & 0 & 2 2 & + 7 ; $ 1 $ - 0 & 0 & 2 2 7 . 3 , 0 4 56 6 : r ; 6 . !! 7 . 8 56 ; 3 , 0 4 6 : r ! . 3 , 0 4 6 9 : ! /* t ghel t ws oe# ce# we# reset# t ds data t ah addresses t dh t cp dq7# d out t wc t as t cph pa data# polling a0 for program 55 for erase t rh t whwh1 or 2 ry/by# t wh pd for program 30 for sector erase 10 for chip erase 555 for program 2aa for erase pa for program sa for sector erase 555 for chip erase t busy &7 (&7 ( 87 9 8:;% 2 8 2 '! # /; / 90 ' *' 4 / !""! " " #"$" !""! " " !" "#"$" !" " % & '!""! (" ( !" !"" $ ) * "' + + " ,$ # $ ' $'$ ' ,$ !" "" * $ " "" - + ""$" ! $ ! " " # $ % & ! ' ($ ) ! * + &% %* $+ &% '+ & * , - . / % )# 0 / - . / # & 0 - . / )# 1 0 * ' 5' 6 6 2 3 4 5 7 8 9 ts/tsr 048 mo-142 (d) dd 48 min 0.05 0.95 0.17 0.17 0.10 0.10 18.30 19.80 0.50 0? 0.08 11.90 0.50 basic max 0.15 1.20 0.27 0.16 0.21 8? 0.20 18.50 12.10 0.70 20.20 0.23 1.05 0.20 1.00 0.22 18.40 20.00 0.60 12.00 nom symbol jedec package b1 a2 a1 a d l e e d1 b c1 c 0 r n 1 notes: controlling dimensions are in millimeters (mm). (dimensioning and tolerancing conforms to ansi y14.5m-1982) pin 1 identifier for reverse pin out (die up). pin 1 identifier for reverse pin out (die down), ink or laser mark. to be determined at the seating plane -c- . the seating plane is defined as the plane of contact that is made when the package leads are allowed to rest freely on a flat horizontal surface. dimensions d1 and e do not include mold protrusion. allowable mold protusion is 0.15mm (.0059") per side. dimension b does not include dambar protusion. allowable dambar protusion shall be 0.08 (0.0031") total in excess of b dimension at max. material condition. minimum space between protrusion and an adjacent lead to be 0.07 (0.0028"). these dimensions apply to the flat section of the lead between 0.10mm (.0039") and 0.25mm (0.0098") from the lead tip. lead coplanarity shall be within 0.10mm (0.004") as measured from the seating plane. dimension "e" is measured at the centerline of the leads. n + 1 2 n 1 2 n 3 reverse pin out (top view) c e a1 a2 2x (n/2 tips) 0.10 9 seating plane a see detail a b b ab e d1 d 2x 2x (n/2 tips) 0.25 2x 0.10 0.10 n 5 +1 n 2 4 5 1 n 2 2 standard pin out (top view) see detail b detail a (c) ? l 0.25mm (0.0098") bsc c r gauge plane parallel to seating plane b b1 (c) 7 6 c1 with plating base metal 7 0.08mm (0.0031") m c a - b s section b-b detail b x e/2 x = a or b 3355 \ 16-038.10 c 1 1 ( 7( ' < 2 2$ $ ) 2 1 . $ 2( b) 3/)/ $. b) ( @4 8 )1 ! " ## $ % & # ' ( ) ( *+ ,!) $ - # . & ! ! **/ ! **/ # # ! **/ / 0 112! **/ $ ! ! 3 4 ) ( !# **/ 5 # |
Price & Availability of S29JL032H55TAI412
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