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LT6558 1 6558f 550mhz, 2200v/? gain of 1, single supply triple video ampli er with input bias control the lt ? 6558 is a high speed triple video ampli? er with an internal ? xed gain of 1 and a programmable dc input bias voltage. this ampli? er features a 400mhz 2v p-p signal bandwidth, 2200v/s slew rate and a unique ability to drive heavy output loads to 0.8v of the supply rails, making the LT6558 ideal for a single 5v supply, wideband video applica- tion. with just one resistor, the inputs of all three ampli? ers can be programmed to a common voltage level, simplifying and reducing the need for external circuitry in ac-coupled applications. without the programming resistor, the input bias circuit becomes inactive, allowing the use of an external clamp circuit or direct coupled input. the LT6558 has separate power supply and ground pins for each ampli? er to improve channel separation and to ease power supply bypassing. the LT6558 provides uncom- promised performance in many high speed applications where a low voltage, single supply is required. the LT6558 is available in 16-lead ssop and 5mm 3mm dfn packages. lcd video projectors rgb hd video ampli? ers coaxial cable drivers low supply adc drivers C3db small-signal bandwidth: 550mhz C3db 2v p-p large-signal bandwidth: 400mhz slew rate: 2200v/s fixed gain of 1, no external resistors required ac coupling with programmable dc input bias output swings to 0.8v of supply rails full video swing with 5v single supply differential gain: 0.02% differential phase: 0.02 enable/shutdown pin high output current: 90ma supply range: 3v to 7.5v operating temperature range: C40c to 85c available in 16-lead ssop and 5mm 3mm dfn packages ac-coupled triple video driver + ? in r gnd en in r out r v + v + r v + g v + b bcv LT6558 r l * 158 ? *50 ? or greater for r l 5v 5v 5v 5v 6558 ta01a 22 f 220 f + ? in g in g out g r l * 22 f 220 f + ? in b in b out b r l * 22 f 220 f gnd r gnd g gnd b fast large-signal transient response , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. time (ns) ?10 output (v) 3 4 5 6558 ta01b 2 1 0 ?8?6?4?20246810 v s = 5v v in = 2v p-p r l = 150 ? typical application features applications description
LT6558 2 6558f electrical characteristics total supply voltage (v s + to gnd) ...........................7.5v input current ........................................................10ma output current (note 2) .......................................90ma output short-circuit duration (note 2) ............ inde? nite operating temperature range (note 3) ... C40c to 85c speci? ed temperature range (note 4) .... C40c to 85c the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v s = 5v, r l = 150 to v s /2, v en = 0.4v, r bcv = open, unless otherwise noted. gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 en gnd in r gnd r in g gnd g in b gnd b bcv v + out r v + r out g v + g out b v + b g = +1 g = +1 g = +1 t jmax = 150c, ja = 110c/w 16 15 14 13 12 11 10 9 17 1 2 3 4 5 6 7 8 bcv v + out r v + r out g v + g out b v + b en gnd in r gnd r in g gnd g in b gnd b top view dhc package 16-lead (5mm 3mm) plastic dfn g = +1 g = +1 g = +1 t jmax = 125c, ja = 40c/w exposed pad (pin 17) is gnd, must be soldered to pcb order part number gn part marking order part number dhc part marking* LT6558cgn LT6558ign 6558 6558i LT6558cdhc LT6558idhc 6558 6558 order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. junction temperature ssop ................................................................ 150c dfn ................................................................... 125c storage temperature range ssop ................................................. C65c to 150c dfn .................................................... C65c to 125c lead temperature (soldering, 10 sec) ssop ................................................................ 300c symbol parameter conditions min typ max units v os input offset voltage v in = 2.5v 12 15 45 55 mv mv i in input current v in = 2.5v 35 45 70 100 a a r in input resistance v in = 2v to 3v, bcv (pin 16) open 200 150 450 400 k k c in input capacitance f = 1mhz 1.4 pf absolute maximum ratings (note 1) package/order information
LT6558 3 6558f the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v s = 5v, r l = 150 to v s /2, v en = 0.4v, r bcv = open, unless otherwise noted. symbol parameter conditions min typ max units a v err gain error v in = 1.5v to 3.5v 0.7 0.9 2.0 2.5 % % a v match gain match between channels v in = 1.5v to 3.5v 0.02 0.05 1.5 2.5 % % v in(dc) input voltage bias r bcv = 158 2.0 1.5 2.5 2.8 3 3.5 v v psrr power supply rejection ratio v s = 4v to 6v, v in = 1.25v 42 38 50 47 db db v ol output voltage swing low 0.8 0.9 0.9 1.0 v v v oh output voltage swing high 4.1 4.0 4.2 4.1 v v i s supply current per ampli? er v en = 0.4v, r l = , includes i s of v + (pin 15) 22.5 25.0 24 28 ma ma total supply current (disabled) v en = open, r l = 10 10 450 1000 a a i en enable pin current v en = 0.4v C250 C300 C125 C150 a a i sc short-circuit current 60 40 90 80 ma ma sr slew rate v out = 1.25v to 3.75v (note 5) 1200 2200 v/s C3db bw C3db bandwidth v out = 2v p-p 400 mhz v out = 0.2v p-p 550 mhz 0.1db bw gain flatness 0.1db bandwidth v out = 2v p-p 100 mhz fpbw full power bandwidth v out = 2v p-p (note 6) 190 350 mhz xtalk all hostile crosstalk f = 10mhz, v out = 2v p-p f = 100mhz, v out = 2v p-p C80 C55 db db t s settling time to 1%, v out = 1.5v to 3.5v to 0.1% 4 7 ns ns t r , t f rise time, fall time 10% to 90%, v out = 1.5v to 3.5v 875 ps g differential gain ntsc signal 0.02 % ? differential phase ntsc signal 0.02 deg hd2 2nd harmonic distortion f = 10mhz, v out = 2v p-p C75 dbc hd3 3rd harmonic distortion f = 10mhz, v out = 2v p-p C79 dbc note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below the absolute maximum rating. note 3: the LT6558c is guaranteed functional over the temperature range of C40c and 85c. note 4: the LT6558c is guaranteed to meet speci? ed performance from 0c to 70c. the LT6558c is designed, characterized and expected to meet speci? ed performance from C40c to 85c but is not tested or qa sampled at these temperatures.the LT6558i is guaranteed to meet speci? ed performance from C40c to 85c. note 5: slew rate is 100% production tested on the r channel and measured on the rising edge of the output signal. the slew rate of the falling edge and of the g and b channels is guaranteed through design and characterization. note 6: large-signal bandwidth is calculated from slew rate: fpbw = sr/( ? v p-p ) electrical characteristics
LT6558 4 6558f supply voltage (v) 0 supply current (ma) 30 40 6558 g04 20 10 25 35 15 5 0 2 14 367 5 v out = v s /2 temperature ( c) ?50 supply current (ma) 25 30 35 125 6558 g05 15 0 ?25 0 25 50 75 100 40 20 10 5 v s = 5v v out = v s /2 v en = 0v enable pin voltage (v) 0 supply current (ma) 40 30 20 10 0 4 6558 g06 123 5 v s = 5v v out = v s /2 t a = ?55 c t a = 125 c t a = 25 c temperature ( c) ?50 0 offset votlage (mv) 5 10 50 40 6558 g08 0 ?25 75 100 25 125 20 15 25 30 35 v s = 5v v in = 2.5v enable pin voltage (v) 0 enable pin current ( a) 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 ?160 4 6558 g07 123 5 v s = 5v t a = 125 c t a = ?55 c t a = 25 c input voltage (v) 0 input bias current ( a) 100 300 400 4 6558 g09 ?100 ?300 0 200 ?200 ?400 123 5 v s = 5v t a = 125 c t a = 25 c t a = ?55 c gain error, individual channel (%) ?1.0 60 50 40 30 20 10 0 ?0.9 ?0.8 ?0.7 ?0.6 6558 g01 ?0.5 percent of units (%) v s = 5v ? v out = 2v r l = 150 ? gain error, between channels (%) ?0.3 percent of units (%) 30 0.3 6558 g02 20 0 0 0.1 ?0.2 0.2 ?0.1 10 v s = 5v ? v out = 2v r l = 150 ? 40 50 60 70 temperature ( c) ?50 gain (v) 1.02 25 6558 g03 0.99 0.97 ?25 0 50 0.96 0.95 1.03 1.01 1.00 0.98 75 100 125 v s = 5v v out = 2v p-p r load = 150 ? gain error distribution gain error matching distribution voltage gain vs temperature supply current per ampli? er vs supply voltage supply current per ampli? er vs en voltage en pin current vs en pin voltage offset voltage vs temperature input bias current vs input voltage supply current per ampli? er vs temperature typical performance characteristics
LT6558 5 6558f frequency (mhz) 1 gain (db) 10 100 1000 6558 g16 ?1 ?2 ?3 ?4 ?5 5 3 4 2 1 0 v s = 5v r l = 150 ? v out = 200mv p-p v out = 2v p-p frequency (mhz) 1 gain (db) 10 100 1000 6558 g17 ?1 ?2 ?3 ?4 ?5 5 3 4 2 1 0 v s = 5v v out = 2v p-p r l = 150 ? in-r in-g in-b frequency (mhz) 1 ?0.1 gain (db) 0 0.1 0.2 0.3 10 100 1000 6558 g18 ?0.2 ?0.3 ?0.4 ?0.5 0.4 0.5 v s = 5v v out = 2v p-p r l = 150 ? in-r in-g in-b temperature ( c) ?50 bias control voltage (mv) 60 70 80 25 75 6558 g15 50 40 ?25 0 50 100 125 30 20 v s = 5v r bcv = 158 ? temperature ( c) ?50 2.0 2.5 3.0 3.5 4.0 4.5 5.0 25 75 6558 g14 1.5 1.0 ?25 0 50 100 125 0.5 0 input voltage (v) v s = 5v r bcv = 158 ? bvc-resistance ( ? ) input voltage (v) 1.5 3.0 3.5 2.0 2.5 6558 g13 1.0 160 120 140 240 260 180 200 220 v s = 5v input voltage (v) output voltage (v) 3 4 5 6558 g10 2 1 0 v s = 5v r load = 150 ? to v s /2 t a = 125 c 04 123 5 t a = 25 c t a = ?55 c load current (ma) 0 output voltage swing (v) 4.0 4.5 5.0 80 6558 g11 3.5 3.0 2.5 10 20 30 40 50 60 70 90 100 v s = 5v v in = 4.5v t a = 125 c t a = ?55 c t a = 25 c load current (ma) 0 output voltage swing (v) 1.5 2.0 2.5 80 6558 g12 1.0 0.5 0 10 20 30 40 50 60 70 90 100 v s = 5v v in = 0v t a = 125 c t a = ?55 c t a = 25 c output voltage vs input voltage output voltage swing vs load current (output high) input bias voltage vs resistance at bcv pin input bias voltage vs temperature bias control voltage vs temperature frequency response of three ampli? ers gain flatness vs frequency output voltage swing vs load current (output low) frequency response typical performance characteristics
LT6558 6 6558f frequency (mhz) 100 distortion (dbc) 80 60 40 20 0.01 1 10 100 6558 g25 120 0.1 0 110 90 70 50 30 10 v s = 5v v out = 2v p-p r l = 150 ? hd2 hd3 crosstalk between ampli? ers vs frequency output impedance vs frequency input impedance vs frequency power supply rejection ratio vs frequency distortion vs frequency distortion vs frequency frequency (mhz) 1 ?70 amplitude (db) ?50 ?30 10 100 1000 6558 g21 ?90 ?80 ?60 ?40 ?100 ?110 v s = 5v v out = 2v p-p r l = 150 ? r to g b to g worst case channel to channel typical channel to channel frequency (mhz) 0.01 0.1 0.1 output impedance ( ? ) 10 1000000 100000 10000 1 10 100 1000 6558 g22 1 100 1000 v s = 5v disable enable frequency (mhz) 0.01 0.1 100 input impedance ( ? ) 1000 1000000 1 10 100 1000 6558 g23 10000 100000 v s = 5v r bcv = 158 ? r bcv = open frequency (mhz) 20 rejection ratio (db) 40 60 10 30 50 0.001 0.1 1 10 100 6558 g24 0 0.01 v s = 5v 6558 g26 frequency (mhz) 100 distortion (dbc) 80 60 40 20 0.01 1 10 100 120 0.1 0 110 90 70 50 30 10 v s = 5v v out = 1v p-p r l = 150 ? hd2 hd3 typical performance characteristics frequency response with capacitive loads frequency (mhz) 1 gain (db) 10 100 1000 6558 g19 c l = 0pf c l = 8.2pf v s = 5v v out = 200mv p-p r l = 150 ? ?1 ?2 ?3 ?4 ?5 5 3 4 2 1 0 c l = 4.7pf large-signal group delay frequency (mhz) 1 0 delay (ns) 1.50 1.75 2.00 10 100 1000 6558 g20 1.25 1.00 0.50 0.75 0.25 v s = 5v v out = 2v p-p r l = 150 ? r bcv = 158 ?
LT6558 7 6558f enable/disable response large-signal transient response time (ns) 0 output (v) 3 4 5 6558 g29 2 1 0 2 4 6 8 10 12 14 16 18 20 v s = 5v v in = 2v p-p r l = 150 ? ? e ? n (pin 1): enable control pin. the part is enabled when this pin is pulled low. an internal pull-up resistor of 40k will turn the part off if this pin is unconnected. gnd (pin 2): ground reference for enable pin (pin 1) and bias control voltage pin (pin 16). this pin must be connected externally to ground. in r (pin 3): red channel input. this pin has a nominal impedance of 450k with input bias circuit inactive, pin 16 open. gnd r (pin 4): ground of red channel ampli? er. this pin is not internally connected to other ground pins and must be connected externally to ground. in g (pin 5): green channel input. this pin has a nomi- nal impedance of 450k with input bias circuit inactive, pin 16 open. gnd g (pin 6): ground of green channel ampli? er. this pin is not internally connected to other ground pins and must be connected externally to ground. in b (pin 7): blue channel input. this pin has a nominal impedance of 450k with input bias circuit inactive, pin 16 open. gnd b (pin 8): ground of blue channel ampli? er. this pin is not internally connected to other ground pins and must be connected externally to ground. typical performance characteristics input noise spectral density time ( s) 0 ?1 voltage (v) 1 3 4 5 6558 g28 2 6 1.2 2.6 0.8 0.4 0 1.6 2.0 2.4 v en(disable) v en(enable) v out v s = 5v v out = 2v p-p r l = 150 ? small-signal transient response time (ns) output (v) 2.60 6558 g30 2.45 2.65 v s = 5v v in = 100mv p-p r l = 150 ? 2.55 2.50 0 2 4 6 8 10 12 14 16 18 20 pin functions frequency (khz) 0.01 1 100 1000 0.1 1 100 10 6558 g27 10 0 100 1000 10 input voltage noise (nv/ hz) input current noise (pa/ hz) +i n e n v s = 5v v in = 2.5v
LT6558 8 6558f v + b (pin 9): positive supply voltage of blue channel ampli? er. this pin is not internally connected to other supply voltage pins and must be externally connected to the supply voltage bus with proper bypassing. for best performance, see power supply considerations. out b (pin 10): blue channel output. v + g (pin 11): positive supply voltage of green channel ampli? er. this pin is not internally connected to other supply voltage pins and must be externally connected to the supply voltage bus with proper bypassing. for best performance, see power supply considerations. out g (pin 12): green channel output. v + r (pin 13): positive supply voltage of red channel ampli? er. this pin is not internally connected to other supply voltage pins and must be externally connected to power supply considerations the LT6558 is optimized to provide full video signal swing output when operated from a standard 5v single supply. due to the supply current involved in ultrahigh slew rate ampli? ers like the LT6558, selection of the lowest workable supply voltage is recommended to minimize heat genera- tion and simplify thermal management. temperature rise at the internal devices (t j ) must be kept below 150c (ssop package) or 125c (dfn package), and can be estimated from the ambient temperature (t a ) and power dissipation (p d ) as follows: t j = t a + p d ? 40c/w for dfn package or t j = t a + p d ? 110c/w for ssop package where p d = (i s + 0.5 ? i o ) ? v s(total) the latter equation assumes (conservatively) that the output swing is small relative to the supply and rms load current (i o ) is bidirectional (as with ac coupling). the supply voltage bus with proper bypassing. for best performance, see power supply considerations. out r (pin 14): red channel output. v + (pin 15): positive supply voltage of control circuitry. this pin is not internally connected to other supply voltage pins and must be externally connected to supply voltage bus with proper bypassing. for best performance, see power supply considerations. bcv (pin 16): bias control voltage. a resistor connected between pin 16 and pin 2 (gnd) will generate a dc voltage bias at the inputs of the three ampli? ers for ac coupling application, see programmable input bias. exposed pad (pin 17, dfn package): ground. this pad must be soldered to pcb and is internally connected to gnd (pin 2). the grounds are separately pinned for each ampli? er to minimize crosstalk. operation from split supplies can be accomplished by connecting the LT6558 ground pins to the negative rail. with dual supplies, recommended voltages range from nominal 2.5v to 3.3v. the ultrahigh frequency (uhf) operating range of the LT6558 requires that careful printed circuit layout prac- tices be followed to obtain maximum performance. trace lengths between power pins and bypass capacitors should be minimized (<0.1 inch) and one or more dedicated ground planes should be employed to minimize parasitic inductance. poor layout or breadboarding methods can seriously impact ampli? er stability, frequency response and crosstalk performance. a 2.2f and a 10f bypass capacitor is recommended for the LT6558 supply bus, plus a 10nf high frequency bypass capacitor at each individual power pin. pin functions applications information
LT6558 9 6558f v + in 2.5k 9.1k 6558 f01 i = v pin16 r set figure 1. simpli? ed programmable input bias circuit diagram no-signal ampli? er input bias condition according to the following relationship: v vk r bias in pin set () . = 16 91 where v pin16 = 0.044v typical. for single 5v supply operation, a 158 programming resistor is generally optimal. in applications that demand maximum ampli? er linearity, or if external biasing is preferred (in dc-coupled applications, for example), the internal biasing circuitry may be disabled by leaving pin 16 open. with bcv (pin 16) open, input loading is ap- proximately 450k . shutdown control the LT6558 may be placed into a shutdown mode, where all three ampli? er sections are deactivated and power sup- ply draw is reduced to approximately 10a. when the en pin is left open, an internal 40k pull-up resistor brings the pin to v + and the part enters the shutdown mode. pulling the pin more than approximately 1.5v below v + will en- able the LT6558 (see figure 2 for equivalent circuit). the pull-down current required to activate the part is typically 125a. in most applications, the en pin is simply con- nected to ground (for continuous operation) or driven directly by a cmos-level logic gate (see figure 3 for examples). response time is typically 50ns for enabling, and 1s for shutdown. in shutdown mode, the feedback resistors remain connected between the output pins and the individual ground (or v C connected) pins. v + 40k bias circuitry en 6558 f02 figure 2. simpli? ed shutdown circuit diagram LT6558 v + v + 2 (3a) open drain or open collector 1 en disable LT6558 2 6558 f03 (3b) cmos gate with shared supply 1 en disable figure 3. suitable shutdown pin drive circuits programmable input bias the LT6558 contains circuitry that provides a user-pro- grammed bias voltage to the inputs of all three ampli? er sections. the internal biasing feature is designed to mini- mize external component count in ac-coupled applica- tions, but may be defeated if external biasing is desired. figure 1 shows the simpli? ed equivalent circuit feeding the noninverting input of each ampli? er. a programming resistor from pin 16 to gnd (pin 2) establishes the nominal applications information
LT6558 10 6558f gn package 16-lead plastic ssop (narrow .150 inch) (reference ltc dwg # 05-08-1641) gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 ? .244 (5.817 ? 6.198) .150 ? .157** (3.810 ? 3.988) 16 15 14 13 .189 ? .196* (4.801 ? 4.978) 12 11 10 9 .016 ? .050 (0.406 ? 1.270) .015 .004 (0.38 0.10) 45 0 ? 8 typ .007 ? .0098 (0.178 ? 0.249) .0532 ? .0688 (1.35 ? 1.75) .008 ? .012 (0.203 ? 0.305) typ .004 ? .0098 (0.102 ? 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 ? .165 .0250 bsc .0165 .0015 .045 .005 *dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side **dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale bias v + v + en in v + v + out 6558 ss simplified schematic package description (single ampli? er section)
LT6558 11 6558f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16) dfn 1103 0.25 0.05 pin 1 notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 3.50 0.05 package outline 0.25 0.05 package description
LT6558 12 6558f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 0906 ? printed in usa dc-coupled split supply operation gnd en in y v + v + v + v + bcv LT6558 75 ? out_y out_pb out_pr 2.5v 6558 ta02 75 ? in pb 75 ? 75 ? ?2.5v in pr 3 2 1 4 5 6 7 8 14 15 16 13 12 11 10 9 75 ? 75 ? + ? + ? + ? typical application related parts part number description comments lt1399 300mhz triple current feedback ampli? er 0.1db gain flatness to 150mhz, shutdown lt1675 250mhz triple rgb multiplexer 100mhz pixel switching, 1100v/s slew rate, 16-lead ssop lt6550/lt6551 3.3v triple and quad video buffers 110mhz gain of 2 buffers in ms package lt6553 650mhz gain of 2 triple video ampli? er optimized for driving 75 cables lt6554 650mhz gain of 1 triple video ampli? er performance similar to the lt6553 with a v = 1, 16-lead ssop lt6555 650mhz gain of 2 triple video multiplexer optimized for driving 75 cables lt6556 750mhz gain of 1 triple video multiplexer high slew rate 2100v/s lt6557 500mhz, gain of 2 triple video ampli? er optimized for single 5v supply driving 75 cables, high slew rate 2200v/s lt6559 low cost, 300mhz, triple video ampli? er 3mm 3mm qfn package

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