june 2010 ?2010 fairchild semiconductor corporation FDMC510P rev.c5 www.fairchildsemi.com 1 FDMC510P p-channel powertrench ? mosfet FDMC510P p-channel powertrench ? mosfet -20 v, -18 a, 8.0 m ? features ? max r ds(on) = 8.0 m ? at v gs = - 4.5 v, i d = - 12 a ? max r ds(on) = 9.8 m ? at v gs = - 2.5 v, i d = - 10 a ? max r ds(on) = 1 3 m ? at v gs = - 1.8 v, i d = - 9.3 a ? max r ds(on) = 1 7 m ? at v gs = - 1. 5 v, i d = -8 .3 a ? high performance trench tech nology for extremely low r ds(on) ? high power and current handling capability in a widely used surface mount package ? 100% uil tested ? termination is lead-free and rohs compliant ? hbm esd capability level >2 kv typical (note 4) general description this p-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process that has been optimized for r ds(on) , switching performance and ruggedness. applications ? battery management ? load switch bottom d d d d s s s g top pin 1 mlp 3.3x3.3 mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage -20 v v gs gate to source voltage 8 v i d drain current -continuous (package limited) t c = 25 c -18 a -continuous (silicon limited) t c = 25 c -54 -continuous t a = 25 c (note 1a) -12 -pulsed -50 e as single pulse avalanche energy 37 mj p d power dissipation t c = 25 c 41 w power dissipation t a = 25 c (note 1a) 2.3 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 3 c/w r ja thermal resistance, junction to ambient (note 1a) 53 device marking device package reel size tape width quantity FDMC510P FDMC510P mlp 3.3x3.3 13 ?? 12 mm 3000 units
www.fairchildsemi.com 2 FDMC510P rev.c5 FDMC510P p-channel powertrench ? mosfet electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = -250 a, v gs = 0 v -20 v ? bv dss ? t j breakdown voltage temperature coefficient i d = -250 a, referenced to 25 c -12 mv / c i dss zero gate voltage drain current v ds = -16 v, v gs = 0 v -1 a i gss gate to source leakage current v gs = 8 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = -250 a -0.4 -0.5 -1.0 v ? v gs(th) ? t j gate to source threshold voltage temperature coefficient i d = -250 a, referenced to 25 c 3 mv/c r ds(on) static drain to source on resistance v gs = -4.5 v, i d = -12 a 6.4 8.0 m ? v gs = -2.5 v, i d = -10 a 7.6 9.8 v gs = -1.8 v, i d = -9.3 a 9.2 13 v gs = -1.5 v, i d = -8.3 a 11 17 v gs = -4.5 v, i d = -12 a, t j = 125 c 8.5 12 g fs forward transconductance v ds = -5 v, i d = -12 a 75 s c iss input capacitance v ds = -10 v, v gs = 0 v, f = 1 mhz 5910 7860 pf c oss output capacitance 840 1120 pf c rss reverse transfer capacitance 738 1110 pf t d(on) turn-on delay time v dd = -10 v, i d = -12 a, v gs = -4.5 v, r gen = 6 ? 15 27 ns t r rise time 34 55 ns t d(off) turn-off delay time 338 540 ns t f fall time 170 272 ns q g(tot) total gate charge v gs = 0 v to -4.5 v v dd = -10 v, i d = -12 a 83 116 nc q g(tot) total gate charge v gs = 0 v to -2.5 v 50 70 nc q gs gate to source charge 6.3 nc q gd gate to drain ?miller? charge 20.4 nc v sd source to drain diode forward voltage v gs = 0 v, i s = -12 a (note 2) -0.70 -1.3 v v gs = 0 v, i s = -2 a (note 2) -0.53 -1.2 t rr reverse recovery time i f = -12 a, di/dt = 100 a/ s 35 57 ns q rr reverse recovery charge 20 32 nc notes : 1: r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ja is determined by the user?s board design. 2: pulse test: pulse width < 300 s, duty cycle < 2.0%. 3: starting t j = 25 o c; p-ch: l = 3 mh, i as = -5 a, v dd = -20 v, v gs = -4.5 v. 4: no gate overvoltage rating is implied. a. 53 c/w when mounted on a 1 i n 2 p a d o f 2 o z c o p p e r b. 125 c/w when mounted on a minimum pad of 2 oz copper
www.fairchildsemi.com 3 FDMC510P rev.c5 FDMC510P p-channel powertrench ? mosfet typical characteristics t j = 25 c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 v gs = -4.5 v v gs = -1.8 v pulse duration = 80 p s duty cycle = 0.5%max v gs = - 1.5 v v gs = -1.2 v v gs = -2.5 v -i d , drain current (a) -v ds , drain to source voltage (v) on region characteristics figure 2. 0 1020304050 0 1 2 3 4 5 v gs = -1.8 v pulse duration = 80 p s duty cycle = 0.5%max normalized drain to source on-resistance -i d , drain current (a) v gs = -2.5 v v gs = -1.5 v v gs = -1.2 v v gs = -4.5 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 i d = -12 a v gs = -4.5 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 5 10 15 20 25 pulse duration = 80 p s duty cycle = 0.5%max t j = 125 o c t j = 25 o c i d = -12 a r ds(on) , drain to source on-resistance ( m : ) -v gs , gate to source voltage ( v ) o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 v ds = -5 v pulse duration = 80 p s duty cycle = 0.5%max t j = -55 o c t j = 25 o c t j = 150 o c -i d , drain current (a) -v gs , gate to source voltage (v) figure 6. 0.00.20.40.60.81.01.2 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v -i s , reverse drain current (a) -v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 FDMC510P rev.c5 FDMC510P p-channel powertrench ? mosfet figure 7. 020406080100 0.0 1.5 3.0 4.5 i d = -12 a v dd = -12 v v dd = -8 v -v gs , gate to source voltage (v) q g , gate charge (nc) v dd = -10 v gate charge characteristics figure 8. 0.1 1 10 20 400 1000 10000 20000 f = 1 mhz v gs = 0 v capacitance (pf) -v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.1 1 10 100 1000 1 10 t j = 100 o c 20 t j = 25 o c t j = 125 o c t av , time in avalanche (ms) -i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 10 20 30 40 50 60 v gs = -4.5 v limited by package r t jc = 3 o c/w v gs = -2.5 v - i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e operating area 0.01 0.1 1 10 80 0.01 0.1 1 10 100 dc 10 s 1 s 100 ms 10 ms 1 ms 100 us -i d , drain current (a) -v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c figure 12. single pulse maximum power dissipation 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 1000 single pulse r t ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 5 FDMC510P rev.c5 FDMC510P p-channel powertrench ? mosfet figure 13. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 6 FDMC510P rev.c5 FDMC510P p-channel powertrench ? mosfet dimensional outlin e and pad layout
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