1 ? preliminary fn6429.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2007. all rights reserved all other trademarks mentioned are the property of their respective owners. isl9201 li-ion battery charger the isl9201 is an integrated sing le-cell li-ion or li-polymer charger capable of operating at an input voltage as low as 2.5v. the low operating voltage allows the charger to work with a variety of ac adapters. the isl9201 operates as a linear charger when the ac adapter is a voltage source. the battery is charged in a standard li-ion charge profile, i.e. a constant current phase followed be a constant voltage phase (cc/cv). the charge current during the constant curr ent phase is determined by the external resistor connected to the iref pin. when the adapter output is a current-lim ited voltage source and the current limit is smaller than the programmed constant current of the ic, the isl9201 operates as a pulse charger where the charge current is determined by the cu rrent limit of the ac adapter during the constant current phas e. the isl9201 operates in a linear mode during the constant voltage phase in both adapter cases. the isl9201 incorporates thermaguard tm , which protects the ic against over-temperature. if the die temperature rises above a typical value of +110 c, the thermal foldback function reduces the charge current to prevent further temperature rise. the isl9201 also includes a timer to set the time reference for the delay time of the end-of-charge (eoc) and recharge indications. the timer is programmable with an external capacitor. a logic input and an open-drain logic output are available for controlling the charger and indicating the charger status. the en pin enables the charger. the status pin is an open-drain output which turns on when the charger is delivering current. the charger uses a 10 ld 3x3 dfn package to maximize thermal conductivity. features ? complete charger for single-cell li-ion/polymer batteries ? integrated pass elemen t and current sensor ? no external blocking diode required ? low component count and cost ? 25mv voltage accuracy over-temperature and input voltage range ? 20mv voltage accuracy at room temperature ? programmable charge current ? charge current thermal foldback for thermal protection (thermaguard tm ) ? trickle charge for fully discharged batteries ? power presence and charge/eoc indications ? less than 4a leakage current off the battery when no input power attached or charger disabled ? ambient temperature range: -40c to +85c ? dfn package ? pb-free plus anneal available (rohs compliant) applications ? mobile phones ? blue-tooth devices ? pdas ? mp3 players ? stand-alone cradle or travel chargers ? other handheld devices pinout isl9201 (10 ld dfn) top view ordering information part number part marking temp. range (c) package (pb-free) pkg dwg. # isl9201irz dlga -40 to +85 10 ld 3x3 dfn l10.3x3 ISL9201IRZ-T dlga -40 to +85 10 ld 3x3 dfn tape & reel l10.3x3 note: intersil pb-free plus anneal products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish , which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classi fied at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 1 2 3 4 5 10 9 8 7 6 vbat vsen iref v2p8 en vin gnd status time gnd data sheet february 22, 2007
2 fn6429.1 february 22, 2007 typical applications pin description vin (pin 1) vin is the input power source. connect to a wall adapter. gnd (pin 2) gnd is the connection to system ground. status (pin 3) status is an open-drain output indicating charging and inhibit states. the status pin is pulled low when the charger is charging a battery. it will be turned into high impedance when the charge current drops to imin. this high impedance state will be latched until a recharge cycle or a new charge cycle starts. when the charger is disabled, the status pin outputs high impedance. time (pin 4) the time pin determines t he oscillation period by connecting a timing capacitor between this pin and gnd. the oscillator also provides a time reference for the charger. gnd (pin 5) gnd is the connection to system ground. en (pin 6) en is the enable logic input. connect the en pin to high to disable the charger. connect the en pin to low or leave it floating to enable the charger. there is an internal 400k pull-down resistor at this pin. v2p8 (pin 7) this is a 2.8v reference voltage output. this pin provides a 2.8v voltage source when the input voltage is above the por threshold and outputs 0v otherwise. the v2p8 pin can be used as an indication for adapter presence. iref (pin 8) this is the charge current programming and monitoring pin. connect a resistor between this pin and gnd to set the charge current during the constant current phase, as given by equation 1: where r iref is in k . vsen (pin 9) vsen is the remote voltage sens e pin. connect this pin as close to the battery positive terminal as possible. if the vsen pin is left floating, its voltage drops to 0v and the charger operates in trickle mode. vbat (pin 10) vbat is the connection to the battery. typically a 10f tantalum capacitor is needed for stability when there is no battery attached. when a batt ery is attached, only a 0.1f ceramic capacitor is required. v2p8 en gnd vbat iref vin 5v wall adapter pack time c 1 1f 1k r 1 c 2 1f 4.7f c 3 r iref 100k c time 15nf d 1 vsen r 1 r battery isl9201irz r 1 1 status i ref 80 r iref ----------------- = (eq. 1) (a) isl9201
3 fn6429.1 february 22, 2007 absolute maximum rati ngs thermal information voltage ratings for all pins . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v charge current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0a esd rating human body model (per eia jesd22 method a114-b) . . . . .2kv machine model (per eia jed-4701 method c-111) . . . . . . . 200v recommended operating conditions ambient temperature range . . . . . . . . . . . . . . . . . . .-40c to +85c operating supply voltage (vin pin). . . . . . . . . . . . . . . 4.25v to 6.5v programmed charge current . . . . . . . . . . . . . . . . . 50ma to 900ma thermal resistance ja (c/w) jc (c/w) 3x3 dfn package (note 1) . . . . . . . . . 48 6 maximum junction temperature (plastic package). . . . . . . . +150c maximum storage temperature range . . . . . . . . .-65c to +150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . +300c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. + 150c max junction temperature is for information purposes only. in reality, the current foldback feature will prevent the junc tion from rising above the typical temperature of +110c. 1. ja is measured in free air with the component mounted on a high ef fective thermal conductivity te st board with "direct attach" fe atures. see tech brief tb379. 2. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications typical values are tested at v in = 5v and t a = +25c. all maximum and minimum values are guaranteed under the recommended operating supply voltage range and ambient temperature range, unless otherwise noted. parameter symbol test conditions min typ max units power-on reset rising por threshold v por v bat = 3.0v, use v2p8 pin to indicate the comparator output. 3.2 3.6 3.9 v falling por threshold v por 2.25 2.5 2.7 v vin-bat offset voltage rising edge v os v bat = 4.2v, i bat = 20ma, use status pin to indicate the comparator output (note 3) 45 80 100 mv standby current bat pin sink current i standby charger disabled or the input is floating - - 3.3 a vin pin supply current i vin charger disabled - 150 250 a vin pin supply current i vin charger enabled - 1.0 - ma voltage regulation output voltage v ch tested at 50ma load, 5v input and +25c 4.180 4.20 4.220 v output voltage v ch -40c < t a < +85c, 4.3v < v in < 6.5v 4.175 4.20 4.225 v pmos on resistance r ds(on) v bat = 4.0v, charge current = 0.35a - 500 - m charge current (note 4) constant charge current i cc v in = 5v, r iref = 887k , v bat = 3.0v to 4.0v 60 90 120 ma v in = 5v, r iref = 100k , v bat = 3.0v to 4.0v 725 800 840 ma trickle charge current i trk v in = 5v, r iref = 800k , v bat = 0v to 2.5v 6 10 14 ma v in = 5v, r iref = 100k , v bat = 0v to 2.5v 64 80 96 ma end-of-charge current i min r iref = 100k 60 80 105 ma v2p8 pin output v2p8 pin output voltage v v2p8 load current less than 1ma 2.8 2.9 3.0 v charge thresholds preconditioning charge threshold voltage v min 2.7 2.8 2.9 v preconditioning voltage hysteresis v minhys 50 100 150 mv isl9201
4 fn6429.1 february 22, 2007 recharge threshold v rch referenced to the charger output voltage v ch -225 -150 -70 mv recharge threshold hysteresis v rchhys -50-mv internal temperature monitoring charge current foldback threshold t fold 110 c oscillator oscillation period t osc c time = 15nf 2.7 3.0 3.3 ms logic input and outputs en pin logic input high 1.3 - - v en pin logic input low --0.5v en pin internal pull down resistance 200 400 600 k status output voltage when on 10ma current - - 0.8 v status leakage current v status = 6.5v - - 1 a note: 3. the 4.2v v bat is selected so that the status output can be used as the indication for the offset comparator output indication. if the v bat is lower than the por threshold, no output pin can be used for indication. 4. the charge current can be affected by the thermal foldback func tion if the ic under the test setup cannot dissipate the heat. electrical specifications typical values are tested at v in = 5v and t a = +25c. all maximum and minimum values are guaranteed under the recommended operating supply voltage range and ambient temperature range, unless otherwise noted. (continued) parameter symbol test conditions min typ max units isl9201
5 fn6429.1 february 22, 2007 functional block diagram (16 ld option) logic status i sen vin vbat 100000:1 current mirror counter + - + - v min + - + - v ch iref + - recharge minbat v rechrg ca va min_i i r i sen i min chrg status + - + - input_ok v por trickle/fast references v2p8 temperature monitoring current references i t time osc gnd vin v ch v min v por v rechrg q main q sen r iref c 1 = i r /10 vsen + 80mv - en input_ok esd diode gnd c time isl9201
6 fn6429.1 february 22, 2007 theory of operation the isl9201 is an integrated charger for single-cell li-ion or li-polymer batteries. the isl92 01 is capable of operating in two operation modes; linear charge mode and pulse charge mode. the isl9201 functions as a traditional linear charger when powered with a voltage source adapter. when powered with a current-limited ada pter, the charger functions as a pulse charger by fully turning on the pass element and the power dissipation is hence drastically reduced. constant current phase the isl9201 starts the charge at a constant current (cc) phase. the charge current is regulated to fast charge the battery before the final voltage has been reached. the charge current is programmable with the iref pin and has two operation modes: trickle mode and constant current mode, depending on the battery voltage. when the battery voltage is lower than 2.8v, the charger operates in trickle mode where the charge current is set at 10% of the constant current mode current. the trickle mode is for preconditioning a deeply discharged battery. once the battery voltage is above the typical 2.8v threshold, the constant current (cc) mode starts. the constant current is programmable between 50ma to 1a. constant voltage phase when the battery reaches the final voltage, the isl9201 switches the operation to a co nstant voltage (cv) phase. the output voltage is regulated at the final voltage value. during the constant voltage phase, the charge current reduces gradually as the cell voltage rises. charge termination and recharge as the charge current reaches the eoc (end of charge) current threshold during the constant voltage phase, the status pin open-drain fet is turned off to indicate an eoc condition. the eoc current is fixed at 10% of the programmed constant charge current. when the eoc condition is reached, the status pin is latched at logic high, the charger, however, will continue to charge the battery until the en pin is pulled to logic high or the input power has been removed. when the battery voltage falls to 150mv below the constant voltage value, the status latch will be reset and open-drain fet is turned on to indicate a charging condition again. an in ternal delay is implemented at the status pin for both eoc and recharge conditions to prevent nuisance trips due to noise and fast load current transitions. the delay time is approximately one clock cycle (varies between 0.5 and 1.5 clock) of the internal oscillator, which is programmed by the timer capacitor. the typical charge waveforms in figure 1 show the complete cycle operation. thermal foldback in the event where the die temperature reaches the thermal foldback threshold (+110c typical), the charge current is reduced accordingly to prevent further temperature rise. por the power-on reset (por) func tion monitors the supply voltage. the por has a rising edge threshold of 3.6v typical and 2.5v typical for falling edge. the charger is expected to operate when the input voltage is above the por threshold. after por the charger will continue to operate for supply voltage down to 2.5v typical. it is also required that the supply voltage be higher than the vbat pin voltage by a typical 80mv for the charger to function. oscillator the isl9201 incorporates with an oscillation circuit using an external timing capacitor connected to the time pin. the oscillator sets the delay time for the status indication for eoc and recharge conditions to prevent nuisance trip due to in-rush currents. indications the isl9201 has an open-drain status indication pin. the status pin requires an external pull-up resistor to function properly. the v2p8 pin can be used as the presence of ac adapter. charger disable the en pin allows the user to disable the charger. when the charger is disabled, all internal circuits are shut down and the quiescent current at the input pin is less than 150a typical. remote battery voltage sensing a kelvin sense pin is provided for battery terminal voltage monitoring. thus, the ir drop due to the connection leads and pcb traces can be eliminated, resulting in a more accurate battery voltage monitoring, especially when the battery is located at a signifi cant distance away from the isl9201. if remote sensing is not needed, the vsen pin can be connected to vbat at the ic. i ref trickle cc cv i min 4.2v time 2.8v chg charge current charge voltage status indication v rec 10% i ref figure 1. typical charge cycle with timeout isl9201
7 fn6429.1 february 22, 2007 applications information pcb layout guidance the isl9201 uses a thermally-enhanced dfn package that has an exposed thermal pad at the bottom side of the package. the layout should connect as much as possible to copper on the exposed pad. ty pically, the component layer is more effective in dissipating heat. the thermal impedance can be further reduced by usi ng other layers of copper connecting to the exposed pad through a thermal via array. a minimum of four (4) such thermal vias are recommended. each thermal via is recommended to have 0.3mm diameter and 0.7mm distance from other thermal vias. stability consideration the isl9201 should behave like a current and thermal limited linear regulator. the c harger operation is stable with an output ceramic decoupling capacitor in the range of 1f to 200f, with or without a battery connected. input bypass capacitor due to the inductance of the power leads of the wall adapter or usb source, the input capacitor type must be properly selected to prevent high voltage transient during a hot-plug event. a tantalum capacitor is a good choice for its high esr, providing damping to the voltage transient. multi-layer ceramic capacitors, however, have a very low esr and hence when chosen as input capacitor, a 1- series resistor must be used, as shown in the ?typical applications? on page 2, to provide adequate damping. state machine diagram the state machine diagram is shown in figure 2. the diagram starts with the power-off state. when the input voltage rises above the por threshold, the charger resets itself. then, if the charger is disabled, the charger stays in the charger disabled state. if the charger is enabled, the trickle charge starts. anytime when v bat is above the preconditioning charge threshold voltage, the charger enters the fast charge state. when v bat reaches 4.2v, the charger enters a constant voltage state where v bat is regulated at 4.2v. when the charge current decays to the i min threshold, the status indicates an eoc condition. this condition is latched until either the en pin is toggled or a por condition has occurred at v in . trickle charge charger: on status : on fault: off fast charge charger: on status: on fault: off charge complete charger: on status : off fault: off v in > v por and i chg < i min v bat drops below v min charger disabled charger : off status: off fault: off enabled anytime changes to disable pwr off charger: off status : off fault: off not enabled por charger: off status : off fault: off en pin v bat > v min v bat < v rch v bat > v rch figure 2. state machine diagram isl9201
8 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6429.1 february 22, 2007 isl9201 dual flat no-lead plastic package (dfn) d e a b 0.10 mc e 0.415 c section "c-c" nx (b) (a1) 2x c 0.15 0.15 2x b nx l ref. (nd-1)xe 5 a c (datum b) d2 d2/2 e2 e2/2 top view 7 bottom view 5 6 index area 8 ab nx k 6 index area (datum a) 12 n-1 n nx b 8 nx b nx l 0.200 c a seating plane 0.08 c a3 side view 0.10 c l10.3x3 10 lead dual flat no-lead plastic package symbol millimeters notes min nominal max a 0.80 0.90 1.00 - a1 - - 0.05 - a3 0.20 ref - b 0.18 0.23 0.28 5,8 d 3.00 bsc - d2 1.95 2.00 2.05 7,8 e 3.00 bsc - e2 1.55 1.60 1.65 7,8 e 0.50 bsc - k0.25 - - - l0.30 0.35 0.40 8 n102 nd 5 3 rev. 3 6/04 notes: 1. dimensioning and tolerancing conform to asme y14.5-1994. 2. n is the number of terminals. 3. nd refers to the number of terminals on d. 4. all dimensions are in millimeters. angles are in degrees. 5. dimension b applies to the meta llized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or mark feature. 7. dimensions d2 and e2 are fo r the exposed pads which provide improved electrical and thermal performance. 8. nominal dimensions are prov ided to assist with pcb land pattern design efforts, see intersil technical brief tb389. for odd terminal/side c l e terminal tip l c c
|
