AON6290 100v n-channel mosfet general description product summary v ds i d (at v gs =10v) 85a r ds(on) (at v gs =10v) < 4.6m w r ds(on) (at v gs =6v) < 6.2m w 100% uis tested 100% r g tested symbol the AON6290 uses trench mosfet technology that is uniquely optimized to provide the most efficient hi gh frequency switching performance. both conduction an d switching power losses are minimized due to an extremely low combination of r ds(on) , ciss and coss. this device is ideal for boost converters and synch ronous rectifiers for consumer, telecom, industrial power supplies and led backlighting. maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v g ds top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view symbol v ds v gs i dm i as e as t j , t stg symbol t 10s steady-state steady-state r q jc maximum junction-to-ambient a c/w r q ja 14 40 17 v 20 gate-source voltage drain-source voltage 100 units junction and storage temperature range -55 to 150 c thermal characteristics parameter typ max v maximum units parameter mj avalanche current c 23 continuous drain current 180 28 a 60 avalanche energy l=0.1mh c a t a =25c i dsm a t a =70c i d 85 67 t c =25c t c =100c 260 pulsed drain current c continuous drain current g w power dissipation a p dsm w t a =70c 208 4.7 t a =25c t c =25c 7.3 83 t c =100c power dissipation b p d maximum junction-to-case c/w c/w maximum junction-to-ambient a d 0.3 55 0.6 rev 0: july 2012 www.aosmd.com page 1 of 6
AON6290 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 2.2 2.8 3.4 v i d(on) 260 a 3.8 4.6 t j =125c 6.5 7.9 4.7 6.2 m w g fs 70 s v sd 0.7 1 v i s 85 a c iss 4600 pf c oss 415 pf c rss 27 pf r g 0.3 0.75 1.2 w q g (10v) 63 90 nc q g (4.5v) 28.5 40 nc q gs 17 nc q gd 10 nc t d(on) 14.5 ns t 5.5 ns turn-on rise time v =10v, v =50v, r =2.5 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge gate source charge gate drain charge total gate charge switching parameters turn-on delaytime v gs =10v, v ds =50v, i d =20a electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a zero gate voltage drain current drain-source breakdown voltage reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz v ds =v gs, i d =250 m a v ds =0v, v gs =20v maximum body-diode continuous current g input capacitance output capacitance forward transconductance i s =1a,v gs =0v v ds =5v, i d =20a dynamic parameters v gs =6v, i d =20a r ds(on) static drain-source on-resistance diode forward voltage m w on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a gate-body leakage current t r 5.5 ns t d(off) 37 ns t f 7.5 ns t rr 40 ns q rr 230 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. turn-on rise time turn-off delaytime v gs =10v, v ds =50v, r l =2.5 w , r gen =3 w turn-off fall time i f =20a, di/dt=500a/ m s body diode reverse recovery charge body diode reverse recovery time i f =20a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja t 10s and the maximum allowed junction temperature o f 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 0: july 2012 www.aosmd.com page 2 of 6
AON6290 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 8 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =6v i d =20a v gs =10v i d =20a 25 c 125 c v ds =5v v gs =6v v gs =10v 0 20 40 60 80 100 120 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =4.0v 5v 6v 10v 4.5v 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 0 2 4 6 8 10 12 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =20a 25 c 125 c rev 0: july 2012 www.aosmd.com page 3 of 6
AON6290 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 10 20 30 40 50 60 70 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 1000 2000 3000 4000 5000 6000 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 200 400 600 800 1000 0.0001 0.001 0.01 0.1 1 10 100 power (w) pulse width (s) figure 10: single pulse power rating junction-to-ca se c oss c rss v ds =50v i d =20a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) figure 9: maximum forward biased 10 m s 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 40 (note f) 0.01 0.1 1 10 1e-06 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse safe operating area (note f) r q jc =0.6 c/w rev 0: july 2012 www.aosmd.com page 4 of 6
AON6290 typical electrical and thermal characteristics 17 52 10 0 18 0 50 100 150 200 250 300 0 25 50 75 100 125 150 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 20 40 60 80 100 0 25 50 75 100 125 150 current rating i d (a) t case (c) figure 14: current de - rating (note f) 1 10 100 1000 10000 0.0001 0.001 0.01 0.1 1 10 100 1000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c 1 10 100 1000 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note h) r q ja =55 c/w rev 0: july 2012 www.aosmd.com page 5 of 6
AON6290 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev 0: july 2012 www.aosmd.com page 6 of 6
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