AON6232 40v n-channel mosfet general description product summary v ds i d (at v gs =10v) 8 5 a r ds(on) (at v gs =10v) < 2.5 m w r ds(on) (at v gs = 4.5v) < 3.6 m w 100% uis tested 100% r g tested symbol v ds the AON6232 uses trench mosfet technology that is uniquely optimized to provide the most efficient hi gh frequency switching performance.power losses are minimized due to an extremely low combination of r ds(on) and crss.in addition,switching behavior is well controlled with a "schottky style" soft recovery bo dy diode. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 40v drain-source voltage 40 g ds top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jc maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1.1 55 1.5 w power dissipation a p dsm w t a =70c 83 1.4 t a =25c t c =25c 2.3 33 t c =100c power dissipation b p d a t a =25c i dsm a t a =70c i d 85 67 t c =25c t c =100c 260 pulsed drain current c continuous drain current g mj avalanche current c 17 continuous drain current 180 22 a 60 avalanche energy l=0.1mh c v units junction and storage temperature range -55 to 150 c thermal characteristics parameter typ max v 20 gate-source voltage drain-source voltage 40 maximum junction-to-ambient a c/w r q ja 14 40 17 g ds top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view rev 0: august 2011 www.aosmd.com page 1 of 6
AON6232 symbol min typ max units bv dss 40 v v ds =40v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.3 1.8 2.3 v i d(on) 260 a 2.05 2.5 t j =125c 3.2 3.9 2.8 3.6 m w g fs 100 s v sd 0.68 1 v i s 85 a c iss 2530 3165 3800 pf c oss 630 905 1180 pf c rss 15 52.5 90 pf r g 0.4 0.85 1.3 w q g (10v) 33 42 51 nc q g (4.5v) 12 18.2 24 nc q gs 9.6 nc q gd 2.8 nc t d(on) 8.7 ns t 4.5 ns on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a gate-body leakage current reverse transfer capacitance v gs =0v, v ds =20v, f=1mhz v ds =v gs, i d =250 m a v ds =0v, v gs =20v maximum body-diode continuous current g input capacitance output capacitance forward transconductance i s =1a,v gs =0v v ds =5v, i d =20a dynamic parameters v gs =4.5v, i d =20a r ds(on) static drain-source on-resistance diode forward voltage m w electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a zero gate voltage drain current drain-source breakdown voltage turn-on rise time v =10v, v =20v, r =1 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge gate source charge gate drain charge total gate charge switching parameters turn-on delaytime v gs =10v, v ds =20v, i d =20a t r 4.5 ns t d(off) 33.5 ns t f 6.2 ns t rr 15 22.5 30 ns q rr 41 59 77 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. i f =20a, di/dt=500a/ m s body diode reverse recovery charge body diode reverse recovery time i f =20a, di/dt=500a/ m s turn-on rise time turn-off delaytime v gs =10v, v ds =20v, r l =1 w , r gen =3 w turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 0: august 2011 www.aosmd.com page 2 of 6
AON6232 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =20a v gs =10v i d =20a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 100 120 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 6v 10v 3.5v 40 0 20 40 60 80 100 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =20a v gs =10v i d =20a 0 2 4 6 8 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =20a 25 c 125 c 0 20 40 60 80 100 120 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 6v 10v 3.5v rev 0: august 2011 www.aosmd.com page 3 of 6
AON6232 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 5 10 15 20 25 30 35 40 45 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 3000 3500 4000 0 10 20 30 40 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to-ca se (note f) c oss c rss v ds =20v i d =20a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) t j(max) =150 c t c =25 c 100 m s 40 0 2 4 6 8 10 0 5 10 15 20 25 30 35 40 45 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 3000 3500 4000 0 10 20 30 40 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to-ca se (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) c oss c rss v ds =20v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) t j(max) =150 c t c =25 c 100 m s r q jc =1.5 c/w rev 0: august 2011 www.aosmd.com page 4 of 6
AON6232 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 100 0 25 50 75 100 125 150 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 20 40 60 80 100 0 25 50 75 100 125 150 current rating i d (a) t case (c) figure 14: current de-rating (note f) 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c 1 10 100 1000 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 20 40 60 80 100 0 25 50 75 100 125 150 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 20 40 60 80 100 0 25 50 75 100 125 150 current rating i d (a) t case (c) figure 14: current de-rating (note f) 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c r q ja =55 c/w 1 10 100 1000 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c rev 0: august 2011 www.aosmd.com page 5 of 6
AON6232 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vgs vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0: august 2011 www.aosmd.com page 6 of 6
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