orderin g numbe r : ena1512 bi-cmos lsi 3-channel switching regulator controller LV5652T overview the LV5652T is a 3-channel switching regulator controller. features ? low-voltage (3v) operation ? switching regulator controller : 3-channel ? reference voltage precision : 1% ch1 : supports synchronous rectification ? independent standby functions for each of three channels. ch2 : supports inverting step-up operation ? is capable of driving mos transistors. ch3 : supports step-up operation specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage 1 v cc max v cc pin -0.3 to 16 v maximum supply voltage 2 vbias max vbias pin -0.3 to 18 v maximum clock input voltage vc lkin max clkin pin 5.5 v allowable power dissipation pd max mounted on a specified board* 1 w operating temperature topr -30 to +85 c storage temperature tstg -55 to +125 c * specified board: 114.3mm 76.1mm 1.6mm, glass epoxy board. recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage 1 v cc v cc pin 3 to 15 v supply voltage 2 vbias vbias pin 3 to 15 v clock input voltage vc lkin clkin pin 5 v timing resistor rt 7 to 30 k ? timing capacitor ct 100 to 1000 pf triangle wave frequency f osc 0.1 to 1.3 mhz specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 80509 sy 20080922-s00001 no.a1512-1/9
LV5652T no.a1512-2/9 electrical characteristics at ta = 25c, v cc = vbias = 3.6v, scp = 0v ratings parameter symbol conditions min typ max unit error amplifier 1 in + pin internal bias voltage vb value added to the error amplifier offset at the error amplifier + side voltage 0.504 0.51 0.516 v output low voltage ch1 to ch3 v low fb in - = 2.0v, ifb = 20 a 0.2 v output high voltage ch1 to ch3 v hi fb in - = 0v, ifb1 = -20 a 2.0 v error amplifier 2 in2 - re pin offset voltage voff2 -6 6 v output low voltage v low fb2re in2 - re = 2.0v, ifb = 20 a 0.2 v output high voltage v hi fb2re in2 - re = -10v, ifb1 = -500 a 2.0 v protection circuit threshold voltage v scp 1.1 1.25 1.4 v scp pin current i scp 4 a short circuit detection signal pin vscpout open collector, iscpout = 100 a 0.2 v software start block soft start current ch1 to ch3 i sf csoft = 0v 3.2 4 4.8 a soft start resistance ch1 to ch3 r sf 160 200 240 k fixed duty maximum on duty 1 ch1 duty max 1 out monitor , in - = 0v 100 % maximum on duty 2 ch2 duty max 2 out monitor , in - = 0v 80 85 90 % maximum on duty 3 ch3 duty max 3 out monitor , in - = 0v 80 85 90 % output block out pin high side on resistance r out sour i o = 10ma 28 50 out pin low side on resistance r out sink i o = 10ma 18 35 triangle wave oscillator block current setting pin voltage vt rt rt = 10k 0.57 v output current ioh ct 190 a output current ratio ? io ct ct pin, rise/fall 2 2.5 3 - oscillation frequency f osc rt = 10k , ct = 270pf 390 510 620 khz reference voltage block reference voltage vref 1.240 v line regulation v ln ref v cc = 3v to 15v 10 mv control circuit on state voltage v on ctl 2.0 v off state voltage v off ctl 0.6 v pin input current i in ctl 60 a standby circuit on voltage v on stby 2.0 v off voltage v off stby 0.6 v pin input current i in stby 60 a all circuits v cc current consumption i cc in1 - to in3 - = 1v 4 5 ma standby mode current consumption i off vstby = vctl = 0v, i off = i cc + i bias 1 a
LV5652T package dimensions unit : mm (typ) 3253b no.a1512-3/9 sanyo : tssop36(275mil) 7.6 5.6 (0.5) (1.0) 9.75 0.5 0.15 1 18 36 19 0.18 (0.63) 0.08 1.2max -30 0 20 40 60 80 100 0 1.0 0.8 0.6 0.4 0.2 pd max -- ta -20 allowable power dissipation, pd max --w ambient temperature, ta -- c specified board: 114.3 76.11.6mm 3 glass epoxy board. pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 30 29 28 27 26 25 24 ( nc ) ( nc ) gnd_p(vs) out1 out1n ( nc ) top view csoft2 csoft3 vcc in1- fb1 ( nc ) vbias out2 out3 scpout clkin stby3 stby2 ( nc ) stby1 scp ctl in3- LV5652T 13 14 15 16 17 18 csoft1 31 23 22 21 20 19 ( nc ) in2+re fb3 in2-re fb2re fb2 in2- vref ct rt gnd_s
LV5652T block diagram and sample application circuit v cc vbias fb1a out1 out1n + - - fb1a in1 - fb1 csoft1 ctl rt scp fb2a out2 + - - fb2a in2 - fb2 csoft2 fb3a gnd_p(vs) gnd_s in3 - fb3 csoft3 fb3a out3 + - - + + - + + - + + - vref scp vref scp_out on/off setting clkin ct + - fb2re in2-re in2+re stby1 stby2 stby3 step-down (down) step-up (up) inversion (invert) osc (oscillation circuit) stby (stand by) signal system power supply pre-output stage power supply vo1 3.3v/100ma vo2 -4v/100ma vo3 6v/100ma the clkin pin must be connected to gnd,when the exte rnal clock synchronization (clkin) is not used. no.a1512-4/9
LV5652T no.a1512-5/9 pin function block pin no. pin name functions 9 stby1 standby input. h/ch1 ; on, l/ch1 ; off. 26 in1 - error amplifier inverting input. 25 fb1 error amplifier output. 31 csoft1 soft start setting capacitor con nection. connect to gnd through a capacitor. 33 out1 output. external transistor p-channel gate connection. ch1 (step-down) 32 out1n output. external transistor n-channel gate connection. 7 stby2 standby input. h/ch2 ; on, l/ch2 ; off. 14 in2 + re inversion amplifier, +(noninverting) input. 15 in2 - re inversion amplifier, -(inverting) input. 16 fb2re inversion amplifier output. 18 in2 - error amplifier, - (inverting) input. 17 fb2 error amplifier output. 29 csoft2 soft start setting capacitor con nection. connect to gnd through a capacitor. ch2 (inversion) 2 out2 output. external transistor p-channel gate connect. 6 stby3 standby input. h/ch3 ; on, l/ch3 ; off. 12 in3 - error amplifier, - (inverting) input. 13 fb3 error amplifier output. 28 csoft3 soft start setting capacitor con nection. connect to gnd through a capacitor. ch3 (step-up) 3 out3 output. external transistor n-channel gate connect. 27 v cc power supply input (signal system). 1 vbias power supply input (pre-output stage). 19 gnd_s ground (signal system). 34 gnd_p (vs) ground (pre-output stage). power 22 vref reference voltage output. 11 ctl output control. 10 scp connection pin for the delay time setting capacitor of short circuit detection circuit. control 4 scpout scp_out pin (scp output). 21 ct triangle wave oscillation fr equency setting capacitor connection. 20 rt triangle wave oscillation frequency setting resistor connection. osc 5 clkin external clock input. 8 ( nc ) not use. 23 ( nc ) not use. 24 ( nc ) not use. 30 ( nc ) not use. 35 ( nc ) not use. other 36 ( nc ) not use.
LV5652T equivalent circuits pin no. pin name description equivalent circuit 11 9 7 6 ctl stby1 stby2 stby3 ctl : controls operation of all circuits. stby* : independently controls operation of the corresponding channel. operation is high active. high : on low : off ctl/stby* gnd_s 26 18 12 in1 - in2 - in3 - error amplifier inverting input. the regulator output is divided by a resistor and connected to in* - vreg (internal constant voltage) in* - 500 5k 5k gnd_s 25 17 13 fb1 fb2 fb3 error amplifier output. these pins, in combination with in* - , configure the error amplifier filters vreg (internal constant voltage) fb* 500 20 gnd_s 14 15 in2 + re in2 - re inversion step-up (channel2) error amplifier input. these pins, in combination with fb2re,configure the operational amplifier (independent) in2-re gnd_s in2+re vreg (internal constant voltage) 16 fb2re inversion step-up (channel2) error amplifier output. this pin, in combination with in2 + re and in2 - re, configures the operational amplifier (independent) fr2re gnd_s vreg (internal constant voltage) continued on next page. no.a1512-6/9
LV5652T continued from preceding page. pin no. pin name description equivalent circuit 31 29 28 csoft1 csoft2 csoft3 soft start. connect to gnd via a capacitor to set the soft start time. vreg (internal constant voltage) gnd_s 500 10k 200k csoft* 33 2 3 out1 out2 out3 output. connect external pchfet. out* gnd_p (vs) vbias 32 out1n output. connect external nchfet. vout1n gnd_p (vs) vbias 20 rt connect to gnd through a resistor. this pin, together eith ct, sets the oscillation frequency. rt gnd_s vreg (internal constant voltage) 21 ct connect to gnd through a capacitor. this pin, together eith rt, sets the oscillation frequency. ct gnd_s vreg (internal constant voltage) 4 scp_out short circuit detection circuit output. when scp exceeds the threshold voltage, the open collector goes off and this pin goes high. scp_out gnd_s vreg (internal constant voltage) continued on next page. no.a1512-7/9
LV5652T continued from preceding page. pin no. pin name description equivalent circuit 10 scp connect to gnd via a capacitor to set the short circuit detection circuit delay time. vreg (internal constant voltage) scp gnd_s 13k 1.5k 22 vref internal constant voltage circuit output. connect a stabilizing capacitor. vreg (internal constant voltage) vref gnd_s 14.8k 5 clkin external clock input. apply an external clock of the internal oscillation frequency or higher. clkin gnd_s vreg (internal constant voltage) 27 v cc signal system power supply v cc 1 vbias power system power supply (output stage) vbias 19 gnd_s signal system gnd gnd_s 34 gnd_p (vs1) output stage gnd (pre-stage) gnd_p (vs) 8 23 24 30 35 36 ( nc ) ( nc ) ( nc ) ( nc ) ( nc ) ( nc ) use prohibited. (not connect pins.) ( nc ) no.a1512-8/9
LV5652T notes (1) soft start time setting method the soft start time is set with the capac itor connected between csoft* and gnd_s. this ic has an independent soft start function for each chan nel, so a capacitor must be connected for each csoft to set the soft start time. (description of soft start operation) (outline of soft start pin) vreg (internal constant voltage) vb (0.515[v]) 200k (r sf ) csoft* 4a (i sf ) gnd_s vb r sf i sf t soft = c soft r sf in ( ) = 0.206 10 6 c soft [s] csoft* [v] csoft* voltage t [s] vb (=0.515 [v] (typ)) csoft pin charging starts the output voltage reaches the set voltage (output voltage constant) soft start time (tsoft [s]) (2) setting the oscillation frequency the internal oscillation frequency is set by the resistor conn ected to the rt pin and the capacitor connected to the ct pin. the waveform generated on ct is a triangular wave with the charging/discharging waveform determined by rt and ct. f osc = 1.32 1 ct rt [hz] the actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set. (3) external input clk function (clk_in) switching operation can be synchronized with external clock input (clk_in) by using the clk_in pin. ? external clock (clk_in) frequency and input level when using external clock (clk_in) input, input a frequency equal to the internal oscillation frequency +20% or more to clk_in. in addition, the clk_in configuration is shown in the figure ?clk_in (input) equivalent circuit (outline)? below. the 0.8v reference voltage and clk_in are compared to determine the edges, so input a signal of 0.8v or more (v cc voltage or less) as the external clock (clk_in). ? external/internal clock switching set the ctl pin low before switching between the external clock and the internal clock. switching clocks when running may give rise to output voltage fluctuations. ? maximum on duty the maximum on duty (duty_max*) of channel 2 to channel 3 is the 85% (typ.) setting. when using the external clock (clk_in), the maximum on duty (duty_max*) becomes smaller, so care must be taken for the set output voltage. (clk_in (input) equivalent circuit (outline)) clk_in 0.8v no.a1512-9/9
LV5652T (4) scp (short circuit protection) function ? description of operation when any one of fb1 to fb4 goes high due to the load being shorted or other reason, charging to the scp pin starts. if output does not recover during the set time tscp and scp pin voltage exceeds the threshold voltage, the protective circuit (scp) operates and all channel outputs are turned o ff. all outputs are latched off by the protection circuit (scp). this latched state (output off) is canceled by setting the ctl pin low or by turning the power supply off. when not using the protection function (scp), the scp pin must be shorted to gnd_s with a line that is as short as possible. the scp operation time is set by the capacitor connected to the scp pin. (scp charging operation) (scp function) scp [v] scp ctl ? when stby* is regarded as high (the output is turned on by setting ctl low to high). scp_out t [s] tscp scp operation charging with iscp = 4 [a] threshold voltage 1.25v (typ) capacitor charging starts with the load being shorted ps no.a1512-10/10 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. 1.25 [v] (typ) output short circuit this catalog provides information as of august, 2009. specifications and information herein are subject to change without notice.
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