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Datasheet File OCR Text: |
irfz14s/l hexfet ? power mosfet pd - 9.890a l advanced process technology l surface mount (irfz14s) l low-profile through-hole (IRFZ14L) l 175c operating temperature l fast switching parameter typ. max. units r q jc junction-to-case CCC 3.5 r q ja junction-to-ambient ( pcb mounted,steady-state)** CCC 40 thermal resistance c/w parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v ? 10 i d @ t c = 100c continuous drain current, v gs @ 10v ? 7.2 a i dm pulsed drain current ?? 40 p d @t a = 25c power dissipation 3.7 w p d @t c = 25c power dissipation 43 w linear derating factor 0.29 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy ?? 47 mj dv/dt peak diode recovery dv/dt ?? 4.5 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c absolute maximum ratings v dss = 60v r ds(on) = 0.20 w i d = 10a 2 d pak to-262 s d g 8/25/97 description third generation hexfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the d 2 pak is a surface mount power package capable of accommodating die sizes up to hex-4. it provides the highest power capability and the lowest possible on- resistance in any existing surface mount package. the d 2 pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0w in a typical surface mount application. the through-hole version (IRFZ14L) is available for low- profile applications. c
irfz14s/l ? v dd = 25v , starting t j = 25c, l = 548h r g = 25 w , i as = 10a. (see figure 12) ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) notes: ** when mounted on 1" square pcb (fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. ? i sd 10a, di/dt 90a/s, v dd v (br)dss , t j 175c ? pulse width 300s; duty cycle 2%. ? uses irfz14 data and test conditions parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC 1.6 v t j = 25c, i s = 10a, v gs = 0v ? t rr reverse recovery time CCC 70 140 ns t j = 25c, i f = 10a q rr reverse recovery charge CCC 200 400 nc di/dt = 100a/s ?? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics a parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 60 CCC CCC v v gs = 0v, i d = 250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC 0.063 CCC v/c reference to 25c, i d =1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 0.20 w v gs =10v, i d = 6.0a ? v gs(th) gate threshold voltage 2.0 CCC 4.0 v v ds = v gs , i d = 250a g fs forward transconductance 2.4 CCC CCC s v ds = 25v, i d = 6.0a ? CCC CCC 25 a v ds = 60v, v gs = 0v CCC CCC 250 v ds = 48v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 20v gate-to-source reverse leakage CCC CCC -100 na v gs = -20v q g total gate charge CCC CCC 11 i d = 10a q gs gate-to-source charge CCC CCC 3.1 nc v ds = 48v q gd gate-to-drain ("miller") charge CCC CCC 5.8 v gs = 10v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 10 CCC v dd = 30v t r rise time CCC 50 CCC i d = 10a t d(off) turn-off delay time CCC 13 CCC r g = 24 w t f fall time CCC 19 CCC r d = 2.7 w, see fig. 10 ? between lead, CCC CCC and center of die contact c iss input capacitance CCC 300 CCC v gs = 0v c oss output capacitance CCC 160 CCC pf v ds = 25v c rss reverse transfer capacitance CCC 29 CCC ? = 1.0mhz, see fig. 5 ? electrical characteristics @ t j = 25c (unless otherwise specified) i gss ns i dss drain-to-source leakage current nh 7.5 l s internal source inductance 10 40 s d g irfz14s/l t j t j fig 2. typical output characteristics fig 1. typical output characteristics fig 4. normalized on-resistance vs. temperature fig 3. typical transfer characteristics irfz14s/l fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 8. maximum safe operating area fig 7. typical source-drain diode forward voltage irfz14s/l fig 9. maximum drain current vs. case temperature fig 11. maximum effective transient thermal impedance, junction-to-case + - v ds 10v pulse width 1 s duty factor 0.1 % r d v gs v dd r g d.u.t. v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms fig 10a. switching time test circuit irfz14s/l v ds l d.u.t. v dd i as t p 0.01 w r g + - t p v ds i as v dd v (br)dss 10 v q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - 10 v fig 12c. maximum avalanche energy vs. drain current fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit irfz14s/l p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - * v gs = 5v for logic level devices peak diode recovery dv/dt test circuit ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * fig 14. for n-channel hexfets irfz14s/l d 2 pak package outline d 2 pak part marking information 10.16 (.400) r e f . 6.47 (.255) 6.18 (.243) 2.61 (.103) 2.32 (.091) 8.89 (.350) r e f. - b - 1.32 (.052) 1.22 (.048) 2.79 (.110) 2.29 (.090) 1.39 (.055) 1.14 (.045) 5.28 (.208) 4.78 (.188) 4.69 (.185) 4.20 (.165) 10.54 (.415) 10.29 (.405) - a - 2 1 3 15.49 (.610) 14.73 (.580) 3x 0.93 (.037) 0.69 (.027) 5.08 (.200) 3x 1.40 (.055) 1.14 (.045) 1.78 (.070) 1.27 (.050) 1.40 (.055) max. notes: 1 dimensions after solder dip. 2 dimensioning & tolerancing per ansi y14.5m, 1982. 3 controlling dimension : inch. 4 heatsink & lead dimensions do not include burrs. 0.55 (.022) 0.46 (.018) 0.25 (.010) m b a m minimum recommended footprint 11.43 (.450) 8.89 (.350) 17.78 (.700) 3.81 (.150) 2.08 (.082) 2x lead assignm ents 1 - g at e 2 - d r a in 3 - s ou rc e 2.54 (.100) 2x part number in ter nation al rectifier logo date code (yyww ) yy = year ww = week assembly lot code f530s 9b 1m 9246 a irfz14s/l package outline to-262 outline to-262 part marking information irfz14s/l tape & reel information d 2 pak world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 european headquarters: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 7321 victoria park ave., suite 201, markham, ontario l3r 2z8, tel: (905) 475 1897 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 315 outram road, #10-02 tan boon liat building, singapore 0316 tel: 65 221 8371 http://www.irf.com/ data and specifications subject to change without notice. 8/97 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.0 69 ) 1.25 (.0 49 ) 11 .6 0 (.45 7 ) 11 .4 0 (.44 9 ) 15 .4 2 (.60 9 ) 15 .2 2 (.60 1 ) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 1 3.5 0 (.532 ) 1 2.8 0 (.504 ) 33 0.0 0 (14.17 3) m ax . 2 7.4 0 (1 .079 ) 2 3.9 0 (.9 41) 6 0.0 0 (2 .36 2) m in . 3 0.4 0 (1 .19 7) m a x . 26 .40 (1.03 9) 24.40 (.961) not es : 1. co mfo r ms to eia -418 . 2. co ntro llin g dim en sion : m illim eter . 3. dim ensio n m easured @ hub. 4. includes flange distortion @ outer edge. |
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