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au5783 j1850/vpw transceiver with supply control function preliminary specification supersedes data of 2000 nov 29 2001 feb 15 integrated circuits philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2 2001 feb 15 features ? supports sae/j1850 vpw standard for in-vehicle class b multiplexing ? bus speed 10.4 kbit/s nominal ? 4x transmission mode (41.6 kbit/s) ? drive capability 32 bus nodes ? low rfi due to output waveshape function ? direct battery operation with protection against +40 v load dump and 8 kv esd ? bus terminals proof against automotive transients up to +100 v/150 v and 8 kv esd ? power supply enable function ? very low sleep mode power consumption ? diagnostic loop-back mode ? thermal overload protection ? 14-pin soic description the au5783 is a line transceiver being primarily intended for in-vehicle multiplex applications. it provides interfacing between a j1850 link controller and the physical bus wire. the device supports the sae/j1850 vpwm standard with a nominal bus speed of 10.4 kbit/s. for data upload and download purposes the 4x transmission mode is supported with a nominal bus speed of 41.6 kbit/s. the au5783 provides protection against loss of ground conditions, thus ensuring the network will be operational in case of an electronic control unit loosing connection to ground potential. low power operation is supported through provision of a sleep mode with very low power consumption. in addition an external voltage regulator can be turned off via the au5783 transceiver to further reduce the overall power consumption. the voltage regulator will be activated again upon detection of bus activity or upon a local wake-up event. ordering information type number package temperature type number name description version range AU5783D so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 40 to +125 c quick reference data symbol parameter conditions min. typ. max. unit v bat.op operating supply voltage, including low battery operation 5.5 12 16 v t amb operating ambient temperature range 40 +125 c v bat.ld battery voltage load dump, 1s +40 v v boh bus output voltage 250 w < r l < 1.6 k w 6.7 8.0 v v bi bus input threshold 3.4 4.2 v i bat.lp sleep mode supply current 90 m a t p propagation delay tx to rx 25 m s t r bus output rise time 14 m s philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 3 block diagram bus gnd tx tx buffer nstb load bat temp. protection output buffer voltage reference rld voltage reference mode control battery (+12v) au5783 rx load switch wake-up control inh lwake r/f vcc (+5v) 4x/loop rs rd 1.6v vbat sl01224 figure 1. block diagram philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 4 pinning pin configuration 1 2 3 4 14 13 12 so14 11 au5783 5 6 7 10 9 8 inh rx gnd bus lwake bat tx nstb gnd r/f n.c. load n.c. 4x/loop sl01225 figure 2. pin configuration pin description symbol pin description r/f 1 rise/fall time control input; connect to ground potential via a resistor gnd 2 ground 4x/loop 3 tx mode control input; low: normal mode; high: 4x mode; float: loopback nstb 4 network standby power control input; low: transmit function disabled (low power modes); high: transmit function enabled tx 5 transmit data input; low: transmitter passive; high: transmitter active rx 6 receive data output; low: active bus condition detected; high: otherwise n.c. 7 not connected bat 8 battery supply input, 12v nominal lwake 9 local wake-up input, edge sensitive inh 10 activity indication flag (inhibit) output high side driver; e.g., to control a voltage regulator. active high enables the regulator load 11 bus load in/output bus 12 bus line transmit/receive input/output, active high side driver n.c. 13 not connected gnd 14 ground functional description the au5783 is an integrated line transceiver ic that interfaces an sae/j1850 protocol controller ic to the vehicle's multiplex bus line. it is primarily intended for automotive aclass bo multiplexing applications in passenger cars using vpw (variable pulse width) modulated signals with a nominal transmission speed of 10.4 kbit/s. the device provides transmit and receive capability as well as protection to a j1850 electronic module. a j1850 link controller feeds the transmit data stream to the transceiver's tx input. the au5783 transceiver waveshapes the tx data input signal so as to minimize electromagnetic emission. the bus output signal features controlled rise & fall characteristic including rounded shape. a resistance being connected to the r/f control input sets the bus output slew rate. the load output is connected to the physical bus line via an external load resistor r ld . the load resistor pulls the bus line to ground potential being the default state, e.g., when no transmitter outputs an active state. this output ensures the j1850 network will not be affected by a potential loss of ground condition at an individual electronic control unit. the au5783 includes a bus receiver with filter function to minimize susceptibility against interference. the logic state of the j1850 bus signal is indicated at the rx output being connected to the j1850 link controller. the au5783 also provides advanced low-power modes to help minimize ignition-off power consumption of an electronic control unit. the bus receiver function is kept alive in the low-power modes. if an active state is being detected on the bus line this will be indicated via the rx output. by default the au5783 enters the low-power standby mode when the mode control inputs nstb and 4x/loop are not driven. a 100 k w pull down resistor is required on nstb. ignition-off current draw can be reduced further by turning off the voltage regulator being typically provided in an electronic control unit. this is supported by the activity indication function of the au5783. in this application the activity indication flag inh will control external devices such as a voltage regulator. to turn-off the inh flag and thus the voltage regulator, the go to sleep command needs to be applied to the network standby power control input, e.g., nstb = 0. the inh output is turned off after the sleep time-out period thereby, reducing the power consumption of an electronic control unit to an extremely low level. the activity indication flag inh will be turned on again upon detection of a remote wake-up condition (i.e. bus activity) or upon detection of a local wake-up condition or a respective command from the microcontroller. a local wake-up condition is detected when an edge occurs at the wake-up input lwake. the inh flag will also be turned on upon detection of a high input level at the mode control input nstb. activation of the inh output enables external devices, e.g., a voltage regulator. this condition will power-up logic devices, e.g., a microcontroller in order to perform appropriate action, e.g., activation of the au5783 and the j1850 network. the au5783 contain a power on reset (por) circuit, which is active at low voltages. this circuit insures that if the control input nstb is at 0 v or floating during power up, the device will be forced into the standby mode by the time the battery voltage rises to 4.4 v. this will also insure that the inh pin is in the high state to turn on the local voltage regulator. if there is a dip going below 4.4 v in battery voltage while in the sleep mode, the device may return to the philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 5 standby mode if the por is tripped. even if the device is not in sleep mode the inh output will turn off at some battery voltages below 4.4 v when the internal por circuit is active. at still lower voltages where the por circuit does not operate, the inh may again pull up toward the battery level, typically with battery voltages below approximately 3.6 v. the operation of the por circuit can be verified by placing the device in the sleep mode while the battery voltage is above 4.4 v. the inh output, which is a high side driver, should turn off when the sleep mode is entered. next ramp the battery voltage down to 2.0v and finally return the battery voltage to 4.4 v. when the battery supply is returned to 4.4v, the inh output will pull high since the device enters standby mode. the actual voltages at which the por engages and releases will vary from part to part. the lowest voltage at which the por will be active is 2.6 v and it will always release below 4.4 v. the au5783 provides a high-speed data transmission mode where the bus output waveshape function is disabled. in this mode transmit signals are output as fast as possible thus allowing higher data rates, e.g., the so-called 4x mode with 41.6 kbit/s nominal speed. the au5783 also provides a loop-back mode for diagnostic purpose, e.g., self-test of an electronic control unit. in loop-back mode the bus transmit and receive functions are disabled thus essentially disconnecting an electronic control unit from the j1850 bus line. the tx signal is internally looped back to the rx output. the au5783 only requires one power supply v bat . bus transmissions can continue with battery voltage down to 5.5 v. the bus output voltage will track 1.3v bellow the battery voltage. the bus input voltage threshold will also follow the battery voltage going down as shown in figure 3. this ratio metric behavior of the input threshold partially compensates for the reduced dominant level transmitted during low battery operation. the au5783 features special robustness at its bat and bus pins hence the device is well protected for applications in the automotive environment. specifically the bat input is protected against 40 v load dump and jump start condition. the bus output is protected against wiring fault conditions, e.g., short circuit to ground and battery voltage as well as typical automotive transients and electrostatic discharge. in addition, an over-temperature shutdown function with hysteresis is incorporated which protects the device under network fault conditions. in case of the die temperature reaching the trip point, the au5783 will latch-off the transceiver function. the device is reset on the first rising edge on the tx input after a decrease in the junction temperature. sl01254 battery voltage (v) bus voltage (v) bus output bus input 5.5 5.8 7 8 16 8 6.7 5.5 4.2 3.9 3.4 1.9 ~ ~ ~ ~ ~ ~ ~ ~ figure 3. bus voltage vs battery voltage philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 6 table 1. control input summary z = input connected to high impedance permitting it to float. typically accomplished by turning off the output of a microcontrol ler. x = don't care; the input may be at either logic level. nstb 4x/loop tx mode bus transmitter bus rx (out) inh 1 0 1 normal operation active high low high 1 0 0 normal operation passive float bus state, note 2 high 1 1 1 4x transmit active high low high 1 1 0 4x transmit passive float bus state, note 2 high 1 z 1 loop-back passive float low high 1 z 0 loop-back passive float high high 0 or z x x standby (default state after power on), note 1, note 6 off float bus state, note 5 high 1 > 0 x 0 go to sleep command, note 4, note 6 off float bus state, note 5 float, note 3 0 or z x x sleep, note 4, note 6 off float bus state, note 5 float notes: 1. after power-on, the au5783 enters standby mode since the input pins nstb and 4x/loop are assumed to be floating. in standby m ode the voltage regulator is enabled via the inh output, and therefore power is supplied to the microcontroller. when the microcontroll er begins operation it will normally set the control inputs nstb high and 4x/loop to low state in order to start normal operation of the au5783. 2. rx outputs the bus state. if the bus level is below the receiver threshold (i.e., all transmitters passive), then rx will be high. otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active), then rx will be low. 3. inh is turned off after a time-out period. 4. for entering the sleep mode (e.g., to deactivate inh), the ago to sleepo command needs to be applied. the ago to sleepo comma nd is a high-to-low transition on the nstb input. when the ago to sleepo command is present, the inh flag is deactivated. this signal c an be used to turn-off the voltage regulator of an electronic module. after the voltage regulator is turned off the microcontroller is no longer supplied and the nstb input will be floating. the inh output will be set again upon detection of bus activity or occurrence of a local wake- up event. 5. in standby and sleep mode, the detection of a wake-up condition (e.g., high level on bus) will be signalled on the output rx. 6. the nstb pin contains a weak pull down which is active in the normal, loop-back and high-speed modes but is disabled in the s leep mode. to insure a logic 0 input if the microcontroller's outputs are tri-stated or the microcontroller is not powered, a 100 k w resistor between nstb and ground is suggested. philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 7 absolute maximum ratings according to the iec 134 absolute maximum system. unless otherwise specified, operation is not guaranteed under these conditions: all voltages are referenced to pin gnd; positiv e currents flow into the ic. symbol parameter conditions min. max. unit v bat voltage on pin bat 0.3 +34 v v bat.ld short-term supply voltage load dump, t < 1s +40 v v bat.tr transient voltage on pin bat and pin lwake sae j1113 test pulses 3a and 3b, rwake > 9 k w 150 +100 v v b0 bus voltage v bat < 2 v, r ld > 1.4 k w 16 +18 v v b1 bus voltage v bat > 2 v, r ld > 1.4 k w 10 +18 v v b.tr transient bus voltage sae j1113, test pulses 3a and 3b, coupled via c = 1 nf; r ld > 1.4 k w 150 +100 v v wke voltage on pin lwake 0.3 v bat v v wkr voltage on pin lwake via series resistor of rwake > 9 k w 16 +34 v v inh dc voltage on pin inh 0.3 v bat v v i dc voltage on pins tx, rx, nstb and 4x/loop 0.3 7.0 v v i,rf dc voltage on pin r/f 0.3 5.0 v esd hbm1 esd capability of pins bat, bus, load and lwake human body model, direct contact discharge, r = 1.5 k w , c = 100 pf, r ld > 1.4 k w ; rwake > 9 k w 8 +8 kv esd hbm2 esd capability of all pins human body model, direct contact discharge, r = 1.5 k w , c = 100 pf 2 +2 kv p tot maximum power dissipation @ t amb = +125 c 205 mw q ja thermal impedance with standard test pcb 120 c/w t amb operating ambient temperature 40 +125 c t vj operating junction temperature 40 +150 c t stg storage temperature 40 +150 c philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 8 dc electrical characteristics 7v < v bat < 16 v; 40 c < t amb < +125 c; 250 w < r l < 1.6 k w ; 1.4 k w < r ld < 12 k w ; 2v < v bus < +9 v; nstb = 5 v; 4x/loop = 5 v; r s = 56 k w 1%; rx connected to +5 v via r d = 3.9 k w ; inh loaded with 100 k w to gnd; lwake connected to bat via 10 k w resistor; all voltages are referenced to pin 14 (gnd); positive currents flow into the ic; typical values reflect the approximate average value at v bat = 13 v and t amb = 25 c; unless otherwise specified. symbol parameter conditions min. typ. max. unit pin bat & thermal shutdown i bat.sl sleep mode supply current note 1 90 m a i bat.sb standby mode supply current note 1 500 m a i bat.p.nl supply current; passive state, in normal or loopback modes tx = 5 v; lwake = 0 v, 4x/loop = 0 or z 3 ma i bat.p.h supply current; passive state, in high speed mode tx = 5 v; lwake = 0 v, 4x/loop = 5 v 10 ma i bat.wl supply current; weak load tx = 5 v, r l = 1.38 k w , note 2 25 ma i bat.fl supply current; full load tx = 5 v, r l = 250 w 45 ma t sd thermal shutdown temperature note 2 155 190 c t hys thermal shutdown hysteresis note 2 5 15 c pins tx, nstb v ih high level input voltage 2.7 v v il low level input voltage 0.9 v i ihtx tx high level input current v tx = 5 v 50 200 m a i ih.nstb,nlh nstb high level input current in normal, loop back and high speed modes v nstb = 5 v 10 50 m a i il low level input current v i = 0 v 2 +2 m a pin 4x/loop v ih high level input voltage (high speed mode) nstb = 5 v 2.7 v m o d e ) nstb = 5 v, bare die 2.9 v i ih-5 high level input current with 5 v logic 4x/loop = 5 v, nstb = 5 v 50 300 m a i ih-3 high level input current with 3 v logic 4x/loop = 3 v, nstb = 3 v 30 250 m a v ilb mid level input voltage (loop back operation) nstb = 5 v 1.25 1.65 v i ilb loopback mode input current nstb = 5 v; note 4 2 2 m a v il low level input voltage (normal mode) nstb = 5 v +0.7 v i il low level input current v 4x = 0 v, nstb = 5 v 50 200 m a i ils low level input current in standby and sleep mode v 4x = 0 v, nstb = 0 v 5 +5 m a pin lwake v i_wh local wake-up high nstb = 0 v 3.9 v v i_wl local wake-up low nstb = 0 v 2.5 v i i_w low level input current v lwake = 0 v 2 25 m a pin inh i oh_inh inh high level output current v inh = v bat 1 v; 4.9 v < v bat < 16 v 120 500 m a i ol_inh inh off-state output leakage v inh = 0 v; nstb = 0 v 5 +5 m a v bat_por power-on reset release voltage; battery voltage threshold for setting inh output high nstb = 0 v, bus = 0 v, v bat = 4.4 v, verify inh = 1 4.4 v pin rx v ol_rx low level output voltage i rx = 1.6 ma, bus = 7 v, all modes 0 0.45 v i ol_rx low level output current v rx = 5 v, bus = 7 v 2 20 ma i oh_rx high level output leakage v rx = 5 v, bus = 0 v, all modes 10 +10 m a philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 9 symbol unit max. typ. min. conditions parameter pin bus v boh_n bus output high voltage in normal mode tx = 5 v, 4x/loop = 0 v; 8 v < v bat < 16 v 250 w < r l < 1.6 k w ; note 3 6.7 8.0 v v boh_h bus output high voltage in high speed mode tx = 5 v, 4x/loop = 5 v; 8 v < v bat < 16 v 250 w < r l < 1.6 k w ; note 3 6.7 9.0 v v bohl bus voltage; low battery tx = 5 v; note 3 5.5 v philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 11 test circuits au5783 gnd bus load bat rx 4x/loop nstb tx 1uf 1.5k 10.7k 3.9k i_log v_bat 5.1v + s1 s2 s3 r/f 56k lwake 10k 100k inh sl01226 note: 1. check i_log with the following switch positions: 1. s1 = open = s2 2. s1 = open, s2 = closed 3. s1 = closed, s2 = open 4. s1 = closed = s2 figure 4. test circuit for loss of ground condition philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 12 application information sae/j1850/vpw bus line vpwo vpwi tx rx bat gnd au5783 transceiver nstb load 4x/loop bus +12v rld 470 pf 47 uh port port lwake inh 5v reg. 10 k rb r/f 3.9 k 56 k +5v rs 10.7 k 1 k 1% 1% ra 100 nf m c with j1850 link controller v cc sl01227 100 k w notes: 1. value of r ld depends, e.g., on type of bus node. example: secondary node r ld =10.7 k, primary node r ld =1.5 k. 2. for connection of the nstb and 4x/loop pins there are different options, e.g., connect to a port pin or to v cc or to active low reset. figure 5. application of the au5783 transceiver philips semiconductors preliminary specification au5783 j1850/vpw transceiver with supply control function 2001 feb 15 13 so14: plastic small outline package; 14 leads; body width 3.9 mm sot108-1 |
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