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lnk454/456-458/460 linkswitch-pl family www.powerint.com june 2010 led driver ic with triac dimming, single-stage pfc and constant current control for non-isolated applications ? this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary output power table product 2 85-265 vac minimum output power 1 maximum output power 1 lnk454d 1.5 w 3 w lnk456d 3 w 6 w lnk457d/v 4 w 8 w lnk458v 6 w 11.5 w LNK460v 8 w 16 w table 1. output power table. notes: 1. maximum practical continuous power in an open frame design with adequate heat sinking, measured at +50 c ambient (see key applications considerations for more information). 2. packages: d: so-8c, v: edip-12. output current number of serial leds 350 ma 500 ma 700 ma 1000 ma 1 lnk454 lnk454 lnk454 lnk456 2 lnk454 lnk456 lnk456 lnk457 3 lnk456 lnk456 lnk457 lnk458 4 lnk456 lnk457 lnk458 LNK460 5 lnk457 lnk458 LNK460 6 lnk457 lnk458 LNK460 7 lnk458 LNK460 8 lnk458 LNK460 9 lnk458 LNK460 10 LNK460 11 LNK460 12 LNK460 product highlights dramatically simplifes off-line led drivers ? single stage power factor correction and accurate constant current (cc) output ? flicker-free phase-controlled triac dimming ? very low component count with small non-electrolytic bulk capacitor, for compact replacement lamp designs ? compact so8 package ? completely eliminates control loop compensation advanced performance features ? optimized for non-isolated fyback designs ? frequency jitter greatly reduces emi flter size and costs ? low dissipation direct sensing of led current advanced protection and safety features ? 725 v integrated mosfet allows small bulk capacitance and maximizes power capability ? latching shutdown protection for short-circuit / open feedback and output overvoltage ? auto-restart for overload condition ? hysteretic thermal shutdown ? meets high-voltage creepage between drain and all other pins both on pcb and at package ecosmart ? - energy effcient ? high power factor optimizes system lumen per watt by reducing input va ? control algorithm balances switching and conduction losses over line and load to maintain optimum effciency ? cycle skipping regulation for abnormally low output power to clamp peak output current delivered description the linkswitch-pl family enables a very small and low cost single-stage power factor corrected constant current driver for solid state lighting. optimized for direct led current sensing, the linkswitch-pl operates over a wide input voltage range delivering an output power of up to 16 w. the linkswitch-pl control algorithm provides ficker-free triac dimming with minimal external components. each device incorporates a 725 v rated power mosfet, a novel discontinuous mode variable frequency variable on-time controller, frequency jitter, cycle by cycle current limit and hysteretic thermal shutdown in a monolithic 4-pin ic, available in so-8c and edip-12 packages. figure 1. basic application schematic. figure 2. device selection based on length of output led series string and current. a typical voltage drop of 3.5 v per led is assumed. d s bp control fb pi-5835-060710 linkswitch-pl ac in
rev. a 06/10 2 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary figure 3. pin confguration (top view). figure 2. functional block diagram. pin functional description drain (d) pin: high-voltage power mosfet drain connection. the internal start-up bias current is drawn from this pin through a switched high-voltage current source. drain current sensing and associated controller functions are also performed using this pin. source (s) pin: power mosfet source connection. ground reference for bypass and feedback pins. bypass (bp) pin: connection point for the external bypass capacitor for the internally generated 5.85 v supply. feedback (fb) pin: led current sensing pin. during normal operation the 290 mv threshold determines the average value of the current fowing through the load sense resistor. a second higher threshold clamps excessive output current ripple. an additional higher threshold is used to protect against output short-circuit and overvoltage conditions. pi-5893-060210 drain (d) source (s) bypass (bp) feedback (fb) v fb(lo) v fb(sk) zero crossing v_i lim i fb v_z lim 4.9 v i lim i lim uv soa uv update clk s q r q s q r q on-time extension auto-restart variable frequency/ duty controller digital integrator inc/dec filter phase measurement regulator 5.85 v v ref dac set clr set clr + + + + + current limit soa state machine 1 a pi-5836a-0526C10 exposed pad internally connected to source pin 1 nc 2 fb 3 bp 4 nc 5 nc 6 d s 12 s 11 s 10 s 9 s 8 s 7 v package (edip-12) d package (so-8c) fb bp d 1 2 4 8 7 6 5 s s s s
rev. a 06/10 3 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary functional description the linkswitch-pl combines a high-voltage power mosfet switch with a power supply controller in one device. the ic provides a single stage power factor correction plus led current control. the linkswitch-pl controller consists of an oscillator, feedback (sense and logic) circuit, 5.85 v regulator, hysteretic over-temperature protection, frequency jittering, cycle-by-cycle current limit, loop compensation circuitry, auto- restart, switching on-time extension, power factor and constant current control. in a direct led current sensing confguration, the average feedback pin voltage is a replica of the led current, scaled by the sense resistor (r sense in figure 4). a small low-pass flter (r f and c f in figure 4) reduces high frequency noise at the feedback pin. figure 5 illustrates the operating regions of the feedback pin voltage. the linkswitch-pl sets its operating point such that the average feedback pin voltage in steady-state operation is 290 mv. this threshold is low to minimize the sensing resistor dissipation. the internal mosfet switching frequency and on-time are updated once every input ac half-cycle to regulate the output current and maintain high power factor. if the feedback pin peak voltage exceeds 520 mv, cycle skipping mode is triggered and the power processed by the integrated mosfet is clamped on a cycle-by-cycle basis. switching frequency may vary during an input voltage half-cycle to reduce thermal stress on the output leds. figure 4. typical application schematic. figure 5. feedback pin operation voltage thresholds. latching shutdown protection is triggered by a feedback pin voltage in excess of 2 v. this feature can be used to provide output overvoltage protection (via dz ov and r ov , in figure 4), which triggers the ic to latch off. this condition is reset when the bypass pin voltage drops below 4.9 v, after removal of the ac input. pi-5838-041910 latch off 2 v 520 mv cycle skipping mode normal operation 290 mv d s bp control fb pi-5837-060710 linkswitch-pl ac in c f r sense r f r ov dz ov r es d es
rev. a 06/10 4 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary triac (phase-controlled) dimming the linkswitch-pl integrates several features to improve dimming range and reduce external circuit complexity when using a phase-controlled triac dimmer. the output led current is controlled by the feedback pin voltage which changes proportionally to the triac dimmer conduction angle. the conduction angle decreases, the voltage at the feedback pin decreases causing the average led current to decrease. the feedback pin voltage adjustment is initiated at approxi- mately 20% of the main half-cycle duration. when this ( j os) threshold is exceeded, v fb and the output led current are reduced until a second phase angle threshold is reached. when this happens, with the triac conduction angle being very limited, the ic runs open loop ( j ol region) and the integrated mosfet processes as much power as the heavily chopped input voltage will allow creating a light output that is deeply dimmed. the 520 mv clamping feedback threshold is also linearly reduced during dimming to control led current ripple. to help maintain the holding current of the triac in the dimmer, linkswitch-pl extends the mosfet on-time towards the zero crossings of the ac input voltage providing an active bleed or holding current function. this on-time extension is carefully limited to avoid deterioration of input current harmonic content and limit total harmonic distortion (thd). figure 6. feedback voltage vs. phase angle dimming characteristics. v fb( ? ) v fb( ? ) v fb ? ol ? ? 180 0 v line phase angle phase angle triac conduction triac conduction leading edge triac dimmers trailing edge triac dimmers v triac 180 0 0 0 pi-5894a-052610 ? os ? ol ? os phase angle phase angle phase angle phase angle
rev. a 06/10 5 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary ic supply and bypass pin the internal 5.85 v regulator charges the bypass capacitor connected to the bypass pin to 5.85 v by drawing current from the voltage on the drain pin whenever the power mosfet is off. the bypass pin is the internal supply voltage node. when the power mosfet is on, the device operates from the energy stored in the bypass capacitor. extremely low power consumption of the internal circuitry allows linkswitch-pl to operate continuously from current it takes from the drain pin. a bypass capacitor value of 1 f is suffcient for both high frequency decoupling and energy storage. during phase angle dimming when the conduction angle is small the ac input voltage is present for only short periods of time. in that case the ic should not rely on the integrated high voltage current source, but instead external bias circuitry should be used to supply the ic from the output (d es and r es in figure 4). if the output voltage is less than 7 v, external bias circuitry should be implemented, by using a bias winding on the primary of the transformer with a small signal rectifer and an electrolytic capacitor with a value based on maximum ic consumption and maximum phase dimming conduction angles. start-up, switching frequency, on-time range at start-up the controller uses an initial switching frequency f min and minimum on-time t on(min) . the charging of the output capacitor together with the energy delivery to the output leds as soon as their anode-cathode threshold is reached determines a step-by-step increase of the operating power mosfet switching frequency and on-time every half-cycle of the main input voltage. when the operating conditions (start-up or large transients) allow for only low energy processing (low frequency and on-time), the voltage across the input bulk capacitance will not reach zero even if the main voltage crosses zero. during these conditions the ic sets the reference voltage on the feedback pin to one half of its preset level (145 mv), to avoid overshoot of the output led current. once the feedback pin voltage exceeds this reduced threshold (with the zero crossing on the bulk capacitor being achieved), then the feedback pin voltage is restored to the normal 290 mv level. the steady state switching frequency and on-time is determined by the line voltage, voltage drop across the leds and system overall power transfer effciency. at light load when the device reaches the minimum frequency f min and on-time t on(min) , the controller regulates by skipping cycles. in this mode of operation the input current is not power factor corrected and the average output current is not guaranteed to fall within the normal range. the feedback pin cycle skipping threshold is reduced from approximately twice the normal regulation level down to just above the level required to limit output power delivery under these conditions. a properly designed supply will not operate in this mode under normal load conditions. a power supply designed correctly will operate within the switching frequency range [f min f max ], with an on-time falling between t on(min) and t on(max) when connected to a normal load. overload protection in case of overload, the system will increase the operating frequency and on-time each ac half-cycle until the maximum frequency and maximum on-time are reached. when this state is reached, by the next half-cycle, the controller will enter auto-restart protection, thus inhibiting the gate of the power mosfet for approximately 1.28 s if the main line frequency is 50 hz, 1.02 s if it is 60 hz. after this auto-restart off-time expires, the circuit will start again, exactly as at start-up, i.e. at f min and t on(min) , stepping up until regulation is achieved again. in case of a persistent overload condition, the auto-restart duty cycle dc ar will typically be as low as 33%. auto-restart is inhibited during phase dimming when the triac conduction duty cycle is less than 60%. output overvoltage protection if a no-load condition is present on the output of the supply, the output overvoltage zener (dz ov in figure 4) will conduct once its threshold is reached. a voltage v ov in excess of v fb(lo) = 2 v will appear across the feedback pin and the ic will latch off. normal operation will be restored once the bypass pin voltage drops below 4.9 v and the ic goes through a new start-up phase. output short-circuit if the output of the supply (i.e. the led load) is short-circuited, then a large amount of energy will be delivered to the sense resistor, generating a high voltage at the feedback pin. if this condition develops more than 2 v on the feedback pin, then the ic will interpret this event as an output short-circuit and will trigger latching shutdown. normal operation will resume after cycling the ac input such that the bypass pin voltage drops below 4.9 v and the ic goes through a new start-up phase. safe operating area (soa) protection if 3 consecutive cycles of the power mosfet are prematurely terminated due to the power mosfet current exceeding the current limit after the leading edge blanking time, soa protection mode is triggered and the ic will trigger latching shutdown. normal operation will resume after cycling the ac input such that the bypass pin voltage drops below 4.9 v and the ic goes through a new start-up phase. hysteretic thermal shutdown the thermal shutdown circuitry senses the die junction temperature. the thermal shutdown threshold is set to 142 c typical with a 75 c hysteresis. when the die temperature rises above this threshold (142 c) the power mosfet is disabled and remains disabled until the die temperature falls by 75 c, at which point the power mosfet is re-enabled.
rev. a 06/10 6 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary parameter symbol conditions source = 0 v; t j = -40 to +125 c (unless otherwise specifed) min typ max units control functions maximum output frequency f max t j = 25 c average 110 122 134 khz peak-peak jitter 6 % minimum output frequency f min t j = 25 c average 25.8 28.7 31.6 khz peak-peak jitter 6 % maximum switch on-time t on(max) t j = 25 c 5.74 s minimum switch on-time t on(min) t j = 25 c 1.18 s on-time extension t ext 5.2 s maximum duty cycle dc max 70 % feedback pin voltage v fb t j = 25 c 275 290 305 mv feedback pin voltage triggering cycle skipping mode v fb(sk) 520 mv feedback pin voltage for ic latch-off v fb(lo) 2000 mv feedback pull-up current i fb -1.3 -1.0 -0.7 a absolute maximum ratings (1,4) drain pin peak current: lnk454 ................. 400 ma (750 ma) lnk456 ................ 850 ma (1450 ma) lnk457 ............. 1350 ma (2000 ma) lnk458 .............. 1750 ma (2650 ma) LNK460 .............. 2700 ma (5100 ma) drain pin voltage ............. -0.3 v to 725 v feedback pin voltage ............ -0.3 to 9 v bypass pin voltage ................. -0.3 to 9 v lead temperature (3) ....................................................... ......... 260 c storage temperature . .................. -65 to 150 c operating junction temperature (2) ......................... -40 to 150 c notes: 1. all voltages referenced to source, t a = 25 c. 2. normally limited by internal circuitry. 3. 1/16 in. from case for 5 seconds. 4. the absolute maximum ratings specifed may be applied, one at a time without causing permanent damage to the product. exposure to absolute maximum ratings for extended periods of time may affect product reliability. thermal resistance thermal resistance: d (so-8c) package: ( q ja ) .......................... ........ 100 c/w (1) , 80 c/w (2) ( q jc ) ............................................... ........ 30 c/w (3) v (edip) package: ( q ja ) .......................... .......... 68 c/w (1) , 58 c/w (2) ( q jc ) ............................................... ........... 2 c/w (4) notes: 1. soldered to 0.36 sq. in. (232 mm 2 ), 2 oz. (610g/m 2 ) copper clad, with no external heat sink attached. 2. soldered to 1 sq. in. (645 mm 2 ), 2 oz. (610g/m 2 ) copper clad, with no external heat sink attached. 3. measured on the source pin close to plastic interface. 4. measured at the surface of exposed pad.
rev. a 06/10 7 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary parameter symbol conditions source = 0 v; t j = -40 to +125 c (unless otherwise specifed) min typ max units control function (cont.) drain supply current i s1 v fb > v fb(sk) (mosfet not switching) 450 a i s2 v fb = 0 v (mosfet switching at f max ) lnk454 530 a lnk456 585 lnk457 650 lnk458 730 LNK460 1050 bypass pin charge current i ch1 v bp = 0 v, t j = 25 c lnk454 -5.9 -4.2 -2.5 ma lnk456/457/458 -8.3 -5.9 -3.5 LNK460 -11.9 -8.5 -5.1 i ch2 v bp = 4 v, t j = 25 c lnk454 -3.4 -2.4 -1.4 ma lnk456/457/458 -5.2 -3.7 -2.2 LNK460 -8.0 -5.7 -3.4 bypass pin voltage v bp 5.60 5.85 6.15 v circuit protection current limit i limit(min) di/dt = 160 ma/ s t j = 25 c lnk454 245 264 283 ma di/dt = 325 ma/ s t j = 25 c lnk456 491 528 565 di/dt = 490 ma/ s t j = 25 c lnk457 790 850 910 di/dt = 650 ma/ s t j = 25 c lnk458 1023 1100 1177 di/dt = 980 ma/ s t j = 25 c LNK460 1581 1700 1819 leading edge blanking time t leb t j = 25 c 160 200 ns current limit delay t ild t j = 25 c 150 ns thermal shutdown temperature t sd 135 142 150 c thermal shutdown hysteresis t sd(h) 75 c bypass pin power-up reset threshold voltage v bp(reset) 4.9 v
rev. a 06/10 8 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary parameter symbol conditions source = 0 v; t j = -40 to +125 c (unless otherwise specifed) min typ max units output on-state resistance r ds(on) lnk454 i d = 26 ma t j = 25 c 23.1 26.6 w t j = 100 c 34.4 39.8 lnk456 i d = 53 ma t j = 25 c 11.7 13.5 t j = 100 c 17.5 20.2 lnk457 i d = 85 ma t j = 25 c 6.9 7.9 t j = 100 c 10.4 11.9 lnk458 i d = 110 ma t j = 25 c 4.4 5.1 t j = 100 c 6.7 7.6 LNK460 i d = 170 ma t j = 25 c 2.2 2.6 t j = 100 c 3.3 3.9 off-state leakage i dss1 v bp = 6.2 v, v fb > v fb(sk) , v ds = 580 v, t j = 125 c 50 a breakdown voltage bv dss v bp = 6.2 v, v fb > v fb(sk) , t j = 25 c 725 v drain supply voltage 50 v auto-restart off-time t ar(off) f main = 50 hz 1.28 s f main = 60 hz 1.02 auto-restart duty cycle dc ar 33 %
rev. a 06/10 9 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary typical performance characteristics 0 100 200 300 400 500 600 0 10 100 1000 pi-6005-060210 drain voltage (v) drain capacitance (pf) lnk454 0.3 lnk456 0.6 lnk457 1.0 lnk458 1.55 LNK460 3.1 scaling factors: 110 100 90 80 40 30 20 10 70 60 50 0 0 200 100 400 500 600 300 700 drain voltage (v) power (mw) pi-6007-060210 lnk454 0.3 lnk456 0.6 lnk457 1.0 lnk458 1.55 LNK460 3.1 scaling factors: 1.2 0 0 2 4 6 8 10 12 14 16 18 20 drain voltage (v) drain current (a) pi-6006-060210 0.6 0.4 0.2 lnk457 t case = 25 c lnk457 t case = 100 c 1 0.8 lnk454 0.3 lnk456 0.6 lnk457 1.0 lnk458 1.55 LNK460 3.1 scaling factors: se=ka46?l66 oa.ei6?.7.ae5.ia46rcl6oa.ei6?t05.=4l se=ka46?l66 tc4a6rcl6oa.ei6?t05.=4l se=ka46?l66 oa.ei6?kaa4i56rcl6oa.ei6?t05.=4l
rev. a 06/10 10 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary pi-4526-0401 10 d07c 3.90 (0.154) bsc notes: 1. jedec reference: ms-012. 2. package outline exclusive of mold flash and metal bur r. 3. package outline inclusive of plating thickness. 4. datums a and b to be determined at datum plane h. 5. controlling dimensions are in millimeters. inch dimensions are shown in parenthesis. angles in degrees. 0.20 (0.008) c 2x 1 4 5 8 2 6.00 (0.236) bsc d 4 a 4.90 (0.193) bsc 2 0.10 (0.004) c 2x d 0.10 (0.004) c 2x a-b 1.27 (0.050) bsc 7x 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) m c a-b d 0.25 (0.010) 0.10 (0.004) (0.049 - 0.065) 1.25 - 1.65 1.75 (0.069) 1.35 (0.053) 0.10 (0.004) c 7x c h 1.27 (0.050) 0.40 (0.016) gauge plane 0 - 8 1.04 (0.041) ref 0.25 (0.010) bsc sea ting plane 0.25 (0.010) 0.17 (0.007) det ail a det ail a c sea ting plane pin 1 id b 4 4.90 (0.193) 1.27 (0.050) 0.60 (0.024) 2.00 (0.079) reference solder pad dimensions so-8c (d package)
rev. a 06/10 11 lnk454/456-458/460 www.powerint.com this document contains information on a new product. specifcations and information herein are subject to change without notice. preliminary preliminary side view c a end view 12 12 detail a 0.059 [1.50] ref, typ. 2 8 pi-5556-051010 notes: 1. dimensioning and tolerancing per asme y14.5m-1994. 2. dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. maximum mold protrusion is 0.010 [0.25] per side 3. dimensions noted are inclusive of plating thickness. 4. does not include inter-lead flash or protrusions. 5. controlling dimensions in inches (mm). 6. datums a & b to be determined at datum h. 7. measured with the leads constrained to be perpendicular to datum c. 8. measured with the leads unconstrained. 9. lead numbering per jedec spp-012. edip-12 (v package) b h top view 0.316 [8.03] ref. pin #1 i.d. (laser marked) 0.350 [8.89] 0.070 [1.78] 1 2 3 4 5 6 12 11 10 9 8 7 7 12 6 0.059 [1.50] ref, typ. 1 0.213 [5.41] ref. 0.192 [4.87] ref. 0.436 [11.08] 0.406 [10.32] 0.023 [0.58] 0.018 [0.46] 0.092 [2.34] 0.086 [2.18] 0.049 [1.23] 0.046 [1.16] 0.022 [0.56] ref. 0.031 [0.80] 0.028 [0.72] 0.016 [0.41] 0.011 [0.28] 0.400 [10.16] 7 2 3 4 0.400 [10.16] 0.010 [0.25] ref. seating plane 0.412 [10.46] ref. 0.306 [7.77] ref. 0.104 [2.65] ref. 0.356 [9.04] ref. 0.019 [0.48] ref. 0.028 [0.71] ref. 0.020 [0.51] ref. bottom view 0.010 (0.25) m c a b 2x 0.004 [0.10] c b detail a (not drawn to scale) 0.004 [0.10] c a 5 4 part ordering information ? linkswitch product family ? pl series number ? package identifer d so-8c v edip-12 ? package material g green: halogen free and rohs compliant lnk 454 d g
for the latest updates, visit our website: www.powerint.com power integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. power integrations does not assume any liability arising from the use of any device or circuit described herein. power integrations makes no warranty herein and specifically disclaims all warranties including, without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement of third party rights. patent information the products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more u.s. and foreign patents, or potentially by pending u.s. and foreign patent applications assigned to power integrations. a complete list of power integrations patents may be found at www.powerint.com. power integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. life support policy power integrations products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of power integrations. as used herein: 1. a life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signifcant injury or death to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. the pi logo, topswitch, tinyswitch, linkswitch, dpa-switch, peakswitch, ecosmart, clampless, e-shield, filterfuse, stakfet, pi expert and pi facts are trademarks of power integrations, inc. other trademarks are property of their respective companies. ?2010, power integrations, inc. power integrations worldwide sales support locations world headquarters 5245 hellyer avenue san jose, ca 95138, usa. main: +1-408-414-9200 customer service: phone: +1-408-414-9665 fax: +1-408-414-9765 e-mail: usasales@powerint.com china (shanghai) room 1601/1610, tower 1 kerry everbright city no. 218 tianmu road west shanghai, p.r.c. 200070 phone: +86-21-6354-6323 fax: +86-21-6354-6325 e-mail: chinasales@powerint.com china (shenzhen) rm a, b & c 4th floor, block c, electronics science and technology bldg., 2070 shennan zhong rd, shenzhen, guangdong, china, 518031 phone: +86-755-8379-3243 fax: +86-755-8379-5828 e-mail: chinasales@powerint.com germany rueckertstrasse 3 d-80336, munich germany phone: +49-89-5527-3910 fax: +49-89-5527-3920 e-mail: eurosales@powerint.com india #1, 14th main road vasanthanagar bangalore-560052 india phone: +91-80-4113-8020 fax: +91-80-4113-8023 e-mail: indiasales@powerint.com italy via de amicis 2 20091 bresso mi italy phone: +39-028-928-6000 fax: +39-028-928-6009 e-mail: eurosales@powerint.com japan kosei dai-3 bldg. 2-12-11, shin-yokohama, kohoku-ku yokohama-shi kanagwan 222-0033 japan phone: +81-45-471-1021 fax: +81-45-471-3717 e-mail: japansales@powerint.com korea rm 602, 6fl korea city air terminal b/d, 159-6 samsung-dong, kangnam-gu, seoul, 135-728, korea phone: +82-2-2016-6610 fax: +82-2-2016-6630 e-mail: koreasales@powerint.com singapore 51 newton road #15-08/10 goldhill plaza singapore, 308900 phone: +65-6358-2160 fax: +65-6358-2015 e-mail: singaporesales@powerint.com taiwan 5f, no. 318, nei hu rd., sec. 1 nei hu dist. taipei, taiwan 114, r.o.c. phone: +886-2-2659-4570 fax: +886-2-2659-4550 e-mail: taiwansales@powerint.com europe hq 1st floor, st. jamess house east street, farnham surrey gu9 7tj united kingdom phone: +44 (0) 1252-730-141 fax: +44 (0) 1252-727-689 e-mail: eurosales@powerint.com applications hotline world wide +1-408-414-9660 applications fax world wide +1-408-414-9760 revision notes date a preliminary release 06/09/10

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