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STP10NK80ZFP STP10NK80Z - STW10NK80Z
N-CHANNEL 800V - 0.78 - 9A - TO-220/FP-TO-247 Zener-Protected SuperMESHTM MOSFET
General features
Type VDSS RDS(on) ID 9A 9A 9A Pw 160 W 160 W 40 W STW10NK80Z 800 V <0.90 STP10NK80Z 800 V <0.90 STP10NK80ZFP 800 V <0.90
s s s s s
Package
3 1 2
1
3 2
TO-220
TO-220FP
EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEABILITY
3 2 1
TO-247
Internal schematic diagram
Description
The SuperMESHTM series is obtained through an extreme optimization of ST's well established strip-based PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications.
Applications
s s s
HIGH CURRENT, HIGH SPEED SWITCHING SWITCH MODE POWER SUPPLIES DC-AC CONVERTERS FOR WELDING, UPS AND MOTOR DRIVE
Order codes
Sales Type STP10NK80Z STP10NK80ZFP STW10NK80Z Marking P10NK80Z P10NK80ZFP W10NK80Z Package TO-220 TO-220FP TO-247 Packaging TUBE TUBE TUBE
August 2005
Rev 2 1/14
www.st.com 14 www..com
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1 Electrical ratings
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
1
Table 1.
Electrical ratings
Absolute maximum ratings
Parameter Value TO-220/ TO-247 VDS VDGR VGS ID ID Drain-Source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20k) Gate-Source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor 9 6 36 160 1.28 4 4.5 --55 to 150 2500 800 800 30 9 (Note 1) 6 (Note 1) 36 (Note 1) 40 0.32 TO-220FP V V V A A A W W/C KV V/ns V C Unit
Symbol
IDM Note 2 PTOT
Vesd(G-S)
G-S ESD (HBM C=100pF, R=1.5k)
dv/dt Note 3 Peak Diode Recovery voltage slope VISO Tj Tstg Insulation Withstand Volatge (DC) Operating Junction Temperature Storage Temperature
Table 2.
Thermal data
TO-220 TO-220FP 3.1 62.5 300 TO-247 0.78 50 Unit C/W C/W C
Rthj-case Rthj-amb Tl
Thermal Resistance Junction-case Max Thermal Resistance Junction-amb Max Maximum Lead Temperature For Soldering Purpose
0.78
Table 3.
Symbol IAR EAS
Avalanche characteristics
Parameter Avalanche Current, repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj=25C, ID=IAR, VDD = 50V) Max Value 9 290 Unit A mJ
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STP10NK80ZFP - STP10NK80Z - STW10NK80Z
2 Electrical characteristics
2
Electrical characteristics
(TCASE = 25 C unless otherwise specified)
Table 4.
Symbol V(BR)DSS IDSS
On/off states
Parameter Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate Body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-Source On Resistance Test Conditions ID = 1 mA, VGS= 0 VDS = Max Rating, VDS = Max Rating,Tc=125C VGS = 20 V VDS= VGS, ID = 100 A VGS= 10 V, ID= 4.5 A 3 3.75 0.78 Min. 800 1 50
10
Typ.
Max.
Unit V A A A V
IGSS VGS(th) RDS(on)
4.5 0.9
Table 5.
Symbol gfs Note 4 Ciss Coss Crss Coss eq. Note 5 Qg Qgs Qgd
Dynamic
Parameter Forward Transconductance Test Conditions VDS =15V, ID = 4.5 A Min. Typ. 9.6 2180 205 38 105 72 12.5 37 101 Max. Unit S pF pF pF pF nC nC nC
Input Capacitance VDS =25V, f=1 MHz, V GS=0 Output Capacitance Reverse Transfer Capacitance Equivalent Ouput Capacitance VGS=0, VDS =0V to 640V Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=640V, ID = 9A VGS =10V (see Figure 19)
Table 6.
Symbol td(on) tr td(off) tf tr(Voff) tf tc
Switching times
Parameter Turn-on Delay Time Rise Time Test Conditions VDD=400 V, ID=4.5A, RG=4.7, VGS=10V (see Figure 20) VDD=400 V, ID=4.5A, RG=4.7, VGS=10V (see Figure 20) VDD=640 V, ID=9A, RG=4.7, VGS=10V (see Figure 20) Min. Typ. 30 20 Max. Unit ns ns
Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time
65 17 13 10 25
ns ns ns ns ns
3/14
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2 Electrical characteristics
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
Table 7.
Symbol BVGSO Note 6
Gate-source zener diode
Parameter Gate-Source Breakdown Voltage Test Conditions Igs=1mA (Open Drain) Min. 30 Typ. Max. Unit V
Table 8.
Symbol ISD ISDMNote 2 VSDNote 4 trr Qrr IRRM
Source drain diode
Parameter Source-drain Current Source-drain Current (pulsed) Forward on Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD=9 A, VGS=0 ISD=9A, di/dt = 100A/s, VDD=45 V, Tj=150C 645 6.4 20 Test Conditions Min. Typ. Max. 9 36 1.6 Unit A A V ns C A
(1)Limited only by maximum temperature allowed (2) Pulse width limited by safe operating area (3) ISD 9A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX (4) Pulsed: pulse duration = 300s, duty cycle 1.5% (5) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% (6) The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
4/14
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STP10NK80ZFP - STP10NK80Z - STW10NK80Z
2 Electrical characteristics
2.1
Electrical characteristics (curves)
Safe Operating Area for TO-220 Figure 2. Thermal Impedanc for TO-220
Figure 1.
Figure 3.
Safe Operating Area for TO-220FP
Figure 4.
Thermal Impedance for TO-220FP
Figure 5.
Safe Operating Area for TO-247
Figure 6.
Thermal Impedance for TO-247
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2 Electrical characteristics
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
Figure 8. Transfer Characteristics
Figure 7.
Output Characteristics
Figure 9.
Transconductance
Figure 10. Static Drain-Source on Resistance
Figure 11. Gate Charge vs Gate -Source Voltage
Figure 12. Capacitance Variations
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STP10NK80ZFP - STP10NK80Z - STW10NK80Z
2 Electrical characteristics
Figure 13. Normalized Gate Threshold Voltage Figure 14. Normalized on Resistance vs vs Temperatute Temperature
Figure 15. Source-drain Diode Forward Characteristics
Figure 16. Normalized BVDSS vs Temperature
Figure 17. Maximum Avalanche Energy vs Temperature
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3 Test circuits
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
3
Test circuits
Figure 19. Gate Charge Test Circuit
Figure 18. Switching Times Test Circuit For Resistive Load
Figure 20. Test Circuit For Inductive Load Switching and Diode Recovery Times
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STP10NK80ZFP - STP10NK80Z - STW10NK80Z
4 Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com
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4 Package mechanical data
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
TO-220 MECHANICAL DATA
DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154
oP
Q
10/14
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STP10NK80ZFP - STP10NK80Z - STW10NK80Z
4 Package mechanical data
TO-220FP MECHANICAL DATA
mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7 O
A
B
L3 L6 L7
F1 F
D
G1 H
F2
L2 L5
E
123
L4
G
11/14
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4 Package mechanical data
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
TO-247 MECHANICAL DATA
mm. MIN. 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.20 3.70 18.50 3.55 4.50 5.50 3.65 5.50 0.140 0.177 0.216 14.80 4.30 0.560 0.14 0.728 0.143 0.216 TYP MAX. 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75 MIN. 0.19 0.086 0.039 0.079 0.118 0.015 0.781 0.608 0.214 0.582 0.17 inch TYP. MAX. 0.20 0.102 0.055 0.094 0.134 0.03 0.793 0.620
DIM. A A1 b b1 b2 c D E e L L1 L2 oP oR S
12/14
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STP10NK80ZFP - STP10NK80Z - STW10NK80Z
5 Revision History
5
Revision History
Date 30-Aug-2005 Revision 2 Changes Inserted new package (DPAK)
13/14
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5 Revision History
STP10NK80ZFP - STP10NK80Z - STW10NK80Z
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
14/14


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