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INTEGRATED CIRCUITS
DATA SHEET
TDA8762A 10-bit high-speed low-power analog-to-digital converter
Product specification Supersedes data of 1995 April 27 File under Integrated Circuits, IC02 1996 Mar 21
Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
FEATURES * 10-bit resolution * Sampling rate up to 80 MHz * DC sampling allowed * One clock cycle conversion only * High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 MHz full-scale input at fclk = 80 MHz) * No missing codes guaranteed * In range (IR) TTL output * TTL compatible digital inputs and outputs * Low-level AC clock input signal allowed * External reference voltage regulator * Power dissipation only 380 mW (typical) * Low analog input capacitance, no buffer amplifier required * No sample-and-hold circuit required. QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO INL DNL fclk(max) PARAMETER analog supply voltage digital supply voltage output stages supply voltage analog supply current digital supply current output stages supply current integral non-linearity differential non-linearity maximum clock frequency TDA8762AM/6 TDA8762AM/8 Ptot total power dissipation 60 80 - - - 380 CL = 15 pF; ramp input fclk = 80 MHz; ramp input fclk = 80 MHz; ramp input CONDITIONS MIN. 4.75 4.75 4.4 - - - - - APPLICATIONS
TDA8762A
High-speed analog-to-digital conversion for: * Video data digitizing * Radar pulse analysis * Transient signal analysis * High energy physics research * modulators * Medical imaging. GENERAL DESCRIPTION The TDA8762A is a 10-bit high-speed analog-to-digital converter (ADC) for professional video and other applications. It converts the analog input signal into 10-bit binary-coded digital words at a maximum sampling rate of 80 MHz. All digital inputs and outputs are TTL compatible, although a low-level sine wave clock input signal is allowed.
TYP. 5.0 5.0 5.0 29 24 23 0.75 0.3
MAX. 5.25 5.25 5.25 36 30 30 1.5 0.7 - - 500
UNIT V V V mA mA mA LSB LSB MHz MHz mW
ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION plastic shrink small outline package; 28 leads; body width 5.3 mm VERSION SOT341-1 SOT341-1 SAMPLING FREQUENCY (MHz) 60 80
TDA8762AM/6 SSOP28 TDA8762AM/8 SSOP28
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
BLOCK DIAGRAM
TDA8762A
handbook, full pagewidth
V CCA 3
CLK 1
VCCD 11
OE 10
CLOCK DRIVER VRT
2
TC
TDA8762A
9 25 D9 24 D8 23 D7 RLAD 22 D6 21 D5 8 ANALOG -TO - DIGITAL CONVERTER LATCHES TTL OUTPUTS 20 D4 19 D3 7 18 D2 17 D1 16 D0 LSB data outputs MSB
analog voltage input
VI
VRM
VRB 6
13
VCCO1
28 VCCO2 IN RANGE LATCH TTL OUTPUT 26 IR output
4 AGND1
5 AGND2
12 DGND
14 OGND1
27 OGND2
MBE560
analog grounds
digital ground
output grounds
Fig.1 Block diagram.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
PINNING SYMBOL CLK TC VCCA AGND1 AGND2 VRB VRM VI VRT OE VCCD DGND VCCO1 OGND1 n.c. D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 IR OGND2 VCCO2 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 clock input two's complement input (active LOW) analog supply voltage (5 V) analog ground 1 analog ground 2 reference voltage BOTTOM input reference voltage MIDDLE analog input voltage reference voltage TOP input output enable input (TTL level input, active LOW) digital supply voltage (5 V) digital ground supply voltage for output stages 1 (5 V) output ground 1 not connected data output; bit 0 (LSB) data output; bit 1 data output; bit 2 data output; bit 3 data output; bit 4 data output; bit 5 data output; bit 6 data output; bit 7 data output; bit 8 data output; bit 9 (MSB) in range data output output ground 2 supply voltage for output stages 2 (5 V)
handbook, halfpage
TDA8762A
DESCRIPTION
CLK TC VCCA AGND1 AGND2 VRB VRM VI VRT
1 2 3 4 5 6 7
28 VCCO2 27 OGND2 26 IR 25 D9 24 D8 23 D7 22 D6
TDA8762A
8 9 21 D5 20 D4 19 D3 18 D2 17 D1 16 D0 15 n.c.
MBE561
OE 10 VCCD 11 DGND 12 V CCO1 13 OGND1 14
Fig.2 Pin configuration.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage difference VCCA - VCCD VCCA - VCCO VCCD - VCCO VI Vclk(p-p) IO Tstg Tamb Tj Note input voltage AC input voltage for switching (peak-to-peak value) output current storage temperature operating ambient temperature junction temperature referenced to AGND referenced to DGND -1.0 -1.0 -1.0 -0.3 - - -55 0 - CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3
TDA8762A
MAX. +7.0 +7.0 +7.0 +1.0 +1.0 +1.0 +7.0 VCCD 10 +150 +70 +150 V V V V V V V V
UNIT
mA C C C
1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 and +7.0 V provided that the supply voltage differences VCC are respected. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 110 UNIT K/W
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
TDA8762A
CHARACTERISTICS VCCA = V3 to V4 and V5 = 4.75 to 5.25 V; VCCD = V11 to V12 = 4.75 to 5.25 V; VCCO = V13 and V28 to V14 and V27 = 4.4 to 5.25 V; AGND and DGND shorted together; Tamb = 0 to +70 C; typical values measured at VCCA = VCCD = VCCO = 5 V; VI(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 C; unless otherwise specified. SYMBOL Supply VCCA VCCD VCCO VCC analog supply voltage digital supply voltage output stages supply voltage voltage difference VCCA - VCCD VCCA - VCCO VCCD - VCCO ICCA ICCD ICCO Inputs CLOCK INPUT CLK (REFERENCED TO DGND); note 1 VIL VIH IIL IIH ZI CI VIL VIH IIL IIH IIL IIH ZI CI LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current input impedance input capacitance Vclk = 0.4 V Vclk = 2.7 V fclk = 80 MHz fclk = 80 MHz 0 2.0 -1 - - - 0 2.0 VIL = 0.4 V VIH = 2.7 V VI = 1.3 V VI = 3.8 V fi = 4.43 MHz fi = 4.43 MHz -400 - - - - - - - 0 - 2 2 - - - - 0 70 5 8 0.8 VCCD +1 20 - - 0.8 VCCD - 20 - - - - V V A A k pF analog supply current digital supply current output stages supply current CL = 15 pF; ramp input -0.25 -0.4 -0.4 - - - - - - 29 24 23 +0.25 +0.4 +0.4 36 30 30 V V V mA mA mA 4.75 4.75 4.4 5.0 5.0 5.0 5.25 5.25 5.25 V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
INPUTS OE AND TC (REFERENCED TO DGND); see Table 2 LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current V V A A A A k pF
VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND) LOW level input current HIGH level input current input impedance input capacitance
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
SYMBOL PARAMETER CONDITIONS MIN. TYP. - 3.0 - - - - - 2.5
TDA8762A
MAX.
UNIT
Reference voltages for the resistor ladder; see Table 1 VRB VRT Vdiff Iref RLAD TCRLAD VosB VosT VI(p-p) Outputs DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO OGND) VOL VOH LOW level output voltage HIGH level output voltage IO = 1 mA IO = 0 mA IO = -0.4 mA IO = -1 mA IOZ output current in 3-state mode 0.4 V < VO < VCCO Switching characteristics CLOCK INPUT CLK; see Fig.4; note 1 fclk(max) maximum clock frequency TDA8762A/6 TDA8762A/8 tCPH tCPL clock pulse width HIGH clock pulse width LOW 60 80 5 5 - - - - - - - - MHz MHz ns ns 0 2.7 2.7 2.4 -20 - - - - - 0.4 VCCO - 0.5 VCCO - 1.3 VCCO - 1.4 +20 V V V V A reference voltage BOTTOM reference voltage TOP differential reference voltage VRT - VRB reference current resistor ladder temperature coefficient of the resistor ladder offset voltage BOTTOM offset voltage TOP analog input voltage (peak-to-peak value) note 2 note 2 note 3 1.2 - 1.8 - - - - - 1.5 1.3 3.8 2.5 28 90 1860 167 220 220 2.06 V V mA ppm m/K mV mV V VCCA - 0.8 V V
Analog signal processing LINEARITY INL DNL OFER GER integral non-linearity differential non-linearity offset error gain error (from device to device) fclk = 80 MHz; ramp input fclk = 80 MHz; ramp input middle code; VRB = 1.3 V; VRT = 3.8 V VRB = 1.3 V; VRT = 3.8 V; note 4 - - - - 0.75 0.3 1 0.1 1.5 0.7 - - LSB LSB LSB %
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
SYMBOL PARAMETER CONDITIONS MIN. TYP. - - -
TDA8762A
MAX.
UNIT
BANDWIDTH (fclk = 80 MHz) B analog bandwidth full-scale sine wave; note 5 - 75% full-scale sine wave; note 5 small signal at mid-scale; VI = 10 LSB at code 512; note 5 tSTLH tSTHL analog input settling time LOW-to-HIGH analog input settling time HIGH-to-LOW full-scale square wave; see Fig.6; note 6 full-scale square wave; see Fig.6; note 6 - - 40 55 700 MHz MHz MHz
- -
2.0 2.5
3 3.5
ns ns
HARMONICS (fclk = 80 MHZ) h1 hall fundamental harmonics (full scale) harmonics (full scale); all components second harmonics third harmonics THD total harmonic distortion fi = 4.43 MHz without harmonics; fclk = 80 MHz; fi = 4.43 MHz SIGNAL-TO-NOISE RATIO; see Fig.8; note 7 S/N signal-to-noise ratio (full scale) 56 58 - dB fi = 4.43 MHz fi = 4.43 MHz - - - -70 -75 -68 62 67 - dB dB dB - - 0 dB
EFFECTIVE BITS; see Figs 7, 8 and 9; note 7 EB effective bits TDA8762AM/6 fclk = 60 MHz fi = 4.43 MHz fi = 10 MHz fi = 20 MHz TDA8762AM/8 fclk = 80 MHz fi = 4.43 MHz fi = 10 MHz fi = 20 MHz TWO-TONE; note 8 TTIR two-tone intermodulation rejection fclk = 80 MHz fclk = 80 MHz; fi = 4.43 MHz; VI = 16 LSB at code 512 - - -68 10-13 - - dB - - - 9.3 8.9 8.0 - - - bits bits bits - - - 9.35 9.0 8.1 - - - bits bits bits
BIT ERROR RATE BER bit error rate times/ sample
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
SYMBOL PARAMETER CONDITIONS MIN. - TYP. -
TDA8762A
MAX.
UNIT
DIFFERENTIAL GAIN; note 9 Gdiff differential gain fclk = 80 MHz; PAL modulated ramp 0.5 %
DIFFERENTIAL PHASE; note 9 diff differential phase fclk = 80 MHz; PAL modulated ramp - 0.5 - deg
Timing (fclk = 80 MHz; CL = 15 pF); see Fig.4; note 10 tds th td CL tdZH tdZL tdHZ tdLZ Notes 1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less than 0.5 ns. 2. Analog input voltages producing code 0 up to and including code 1023: a) VosB (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 C. b) VosT (voltage offset TOP) is the difference between VRT (reference voltage TOP) and the analog input which produces data outputs equal to code 1023 at Tamb = 25 C. 3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3. V RT - V RB a) The current flowing into the resistor ladder is IL = ----------------------------------------- and the full-scale input range at the converter, R OB + R L + R OT RL to cover code 0 to code 1023, is . V I = R L x I L = ----------------------------------------- x ( V RT - V RB ) = 0.824 x ( V RT - V RB ) R OB + R L + R OT b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio RL ---------------------------------------- will be kept reasonably constant from part to part. Consequently variation of the output codes R OB + R L + R OT at a given input voltage depends mainly on the difference VRT - VRB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is then optimized. 4. ( V 1023 - V 0 ) - 2 V GER = ------------------------------------------------ x 100 2V sampling delay time output hold time output delay time digital output load capacitance - 5 - - - - - - - - 9 15 2 - 13 20 ns ns ns pF
3-state output delay times; see Fig.5 enable HIGH enable LOW disable HIGH disable LOW 45 25 12 12 50 35 15 15 ns ns ns ns
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
TDA8762A
5. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal. 6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square-wave signal) in order to sample the signal and obtain correct output data. 7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB x 6.02 + 1.76 dB. 8. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full scale to the converter. 9. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a digital-to-analog converter. 10. Output data acquisition: the output data is available after the maximum delay time of td. In the event of a 80 MHz clock operation, the hardware design must take into account the td and th limits with respect to the input characteristics of the acquisition circuit; an external latch will ease the design if output data lines cannot be short to minimize capacitance.
handbook, halfpage
VRT
9 ROT RL RLAD IL code 0 ROB code 1023
VRM
7
VRB
6
MGD281
Fig.3 Explanation of note 3.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
Table 1
TDA8762A
Output coding and input voltage (typical values; referenced to AGND, VRB = 1.3 V, VRT = 3.8 V) BINARY OUTPUT BITS TWO'S COMPLEMENT OUTPUT BITS IR D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 . . 1 1 0 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 1 . . 0 1 1 1 1 1 . . 0 0 0 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 1 . . 0 1 1
STEP VI(p-p) U/F 0 1 . . 1022 1023 O/F Table 2 TC X 0 1 <1.52 1.52 . . . . 3.58 >3.58
Mode selection OE 1 0 0 D9 TO D0 high impedance active; two's complement active; binary high impedance active active IR
handbook, full pagewidth
t CPL t CPH CLK 1.4 V
sample N
sample N + 1
sample N + 2
Vl
t ds DATA D0 to D9 DATA N-2 DATA N-1 td
th 2.4 V DATA N DATA N+1
MGC037
1.4 V 0.4 V
Fig.4 Timing diagram.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
TDA8762A
handbook, full pagewidth
V CCD OE 50%
t dHZ HIGH 90% output data t dLZ HIGH output data LOW 10% 50% t dZL LOW
t dZH
50%
TEST V CCD 3.3 k TDA8762A 15 pF OE S1 t dLZ t dZL t dHZ t dZH
S1 VCCD VCCD GND GND
MBE562
f OE = 100 kHz.
Fig.5 Timing diagram and test conditions of 3-state output delay time.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
TDA8762A
t STLH code 1023 VI code 0 2 ns 50%
t STHL
50%
2 ns
CLK
50%
50%
MBE566
0.5 ns
0.5 ns
Fig.6 Analog input settling-time diagram.
0 A (dB) -20
MBE567
-40
-60
-80
-100
-120
0
4.96
9.93
14.9
19.9
24.8
29.8
34.7
f (MHz)
39.7
Effective bits: 9.35; THD = -71.18 dB; Harmonic levels (dB): 2nd = -73.61; 3rd = -76.14; 4th = -83.82; 5th = -87.36; 6th = -86.33.
Fig.7 Fast Fourier Transform (fclk = 80 MHz; fi = 4.43 MHz).
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
TDA8762A
0 A (dB) -20
MBE568
-40
-60
-80
-100
-120
0
5.01
10.0
15.0
20.1
25.1
30.1
35.1
f (MHz)
40.1
Effective bits: 9.12; THD = -65.45 dB; Harmonic levels (dB): 2nd = -79.52; 3rd = -66.03; 4th = -81.60; 5th = -77.47; 6th = -104.43.
Fig.8 Fast Fourier Transform (fclk = 80 MHz; fi = 10 MHz).
0 A (dB) -20
MBE569
-40
-60
-80
-100
-120
0
5.02
10.0
15.1
20.1
25.1
30.1
35.2
f (MHz)
40.2
Effective bits: 8.08; THD = -52.60 dB; Harmonic levels (dB): 2nd = -58.35; 3rd = -54.22; 4th = -76.61; 5th = -66.90; 6th = -76.80.
Fig.9 Fast Fourier Transform (fclk = 80 MHz; fi = 20 MHz).
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
INTERNAL PIN CONFIGURATIONS
TDA8762A
VCCO2
handbook, halfpage
VCCO1
V CCA
D9 to D0 IR
VI
OGND1
MBE563
AGND
MGC040 - 1
Fig.10 TTL data and in-range outputs.
Fig.11 Analog inputs.
handbook, halfpage
VCCO1
VCCA
OE (TC)
VRT VRM VRB R LAD
AGND
MBE565
OGND2
MGD344
Fig.12 OE (TC) input.
Fig.13 VRB, VRM and VRT.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
TDA8762A
handbook, halfpage
VCCD
CLK
V ref (1.3 V)
DGND
MGC042 - 1
Fig.14 CLK input.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
APPLICATION INFORMATION
TDA8762A
handbook, full pagewidth
CLK
1
28
V CCO2
TC VCCA
2
27
OGND2
3
26
IR
AGND1 AGND2
(1)
4
25
D9
5
24
D8
V RB V RM
(4)
6
23 D7 D6
100 nF AGND
(3) (1)
7
22
VI
TDA8762A
8 21 D5
100 nF
(1)
AGND 100 nF
V RT
9
20
D4
OE AGND V CCD
10
19
D3
11
18
D2
DGND V CCO1
12
17
D1
13
16
D0
(2)
OGND1
14
15
MBE564
n.c.
The analog and digital supplies should be separated and decoupled. The external voltage reference generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value. Eventually, the reference ladder voltages can be derived from a well regulated VCCA supply through a resistor bridge and a decoupled capacitor. (1) VRB, VRM and VRT are decoupled to AGND. (2) Pin 15 should be connected to DGND in order to prevent noise influence. (3) When VRM is not used, pin 7 can be left open, avoiding the decoupling capacitor. In any case, this pin must not be grounded. (4) When analog input signal is AC coupled, an input bias or a clamping level must be applied to VI input (pin 8).
Fig.15 Application diagram.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
PACKAGE OUTLINE SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
TDA8762A
SOT341-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 14 wM detail X A
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 10.4 10.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.1 0.7 8 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 REFERENCES IEC JEDEC MO-150AH EIAJ EUROPEAN PROJECTION
ISSUE DATE 93-09-08 95-02-04
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
TDA8762A
If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8762A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
NOTES
TDA8762A
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
NOTES
TDA8762A
1996 Mar 21
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Philips Semiconductors
Product specification
10-bit high-speed low-power analog-to-digital converter
NOTES
TDA8762A
1996 Mar 21
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Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02) 805 4455, Fax. (02) 805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. (01) 60 101-1256, Fax. (01) 60 101-1250 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. (172) 200 733, Fax. (172) 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. (359) 2 689 211, Fax. (359) 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: see South America China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. (852) 2319 7888, Fax. (852) 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (032) 88 2636, Fax. (031) 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (358) 0-615 800, Fax. (358) 0-61580 920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01) 4099 6161, Fax. (01) 4099 6427 Germany: P.O. Box 10 51 40, 20035 HAMBURG, Tel. (040) 23 53 60, Fax. (040) 23 53 63 00 Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01) 4894 339/4894 911, Fax. (01) 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, BOMBAY 400 018 Tel. (022) 4938 541, Fax. (022) 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01) 7640 000, Fax. (01) 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. (03) 645 04 44, Fax. (03) 648 10 07 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. (0039) 2 6752 2531, Fax. (0039) 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. (03) 3740 5130, Fax. (03) 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02) 709-1412, Fax. (02) 709-1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03) 750 5214, Fax. (03) 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. 9-5(800) 234-7831, Fax. (708) 296-8556 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. (040) 2783749, Fax. (040) 2788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09) 849-4160, Fax. (09) 849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (022) 74 8000, Fax. (022) 74 8341 Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (63) 2 816 6380, Fax. (63) 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. (022) 612 2831, Fax. (022) 612 2327 Portugal: see Spain Romania: see Italy Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65) 350 2000, Fax. (65) 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. (011) 470-5911, Fax. (011) 470-5494 South America: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SAO PAULO-SP, Brazil, P.O. Box 7383 (01064-970), Tel. (011) 821-2333, Fax. (011) 829-1849 Spain: Balmes 22, 08007 BARCELONA, Tel. (03) 301 6312, Fax. (03) 301 4107 Sweden: Kottbygatan 7, Akalla. S-16485 STOCKHOLM, Tel. (0) 8-632 2000, Fax. (0) 8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. (01) 488 2211, Fax. (01) 481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. (886) 2 382 4443, Fax. (886) 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. (66) 2 745-4090, Fax. (66) 2 398-0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. (0212) 279 2770, Fax. (0212) 282 6707 Ukraine: PHILIPS UKRAINE, 2A Akademika Koroleva str., Office 165, 252148 KIEV, Tel. 380-44-4760297, Fax. 380-44-4766991 United Kingdom: Philips Semiconductors LTD., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. (0181) 730-5000, Fax. (0181) 754-8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800) 234-7381, Fax. (708) 296-8556 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. (381) 11 825 344, Fax. (359) 211 635 777
Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31-40-2724825 SCDS48 (c) Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1100/02/pp24 Document order number: Date of release: 1996 Mar 21 9397 750 00751

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