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2.5V/3V, 3.0GHz CML AnyGateTMANY LOGIC w/50 or 100 OUTPUTS FEATURES s Guaranteed AC parameters over temperature: * fMAX > 3.0GHz (SY55851A) * tr / tf < 100ps * Propagation delay < 280ps s Guaranteed operation over -40C to +85C temperature range s Wide supply voltage range: 2.3V to 3.6V s Single IC provides 8 logic functions s 2:1 MUX capability s Fully differential I/O s Source terminated CML outputs for fast edge rates: * SY55851 for 100 load * SY55851A for 50 load s Guaranteed matched propagation delays: * Select (S)-to-out: < 280ps * Input (A and B)-to-out: < 280ps s Accepts PECL, LVPECL, CML input signals s Functions as a PECL/LVPECL-to-CML translator s Available in a 10-pin (3mm x 3mm) MSOP package SuperLiteTM SY55851 SY55851A FINAL DESCRIPTION The SY55851 and SY55851A are highly flexible, universal logic gates capable of up to 3.0GHz operation (SY55851A). These AnyGate differential logic devices will produce all possible logic functions of two Boolean variables. They can be configured as any of the following gates: AND, NAND, OR, NOR, XOR, XNOR, DELAY, NEGATION (NOT). The SY55851 and SY55851A can also function as a 2-input multiplexer. The SY55851 has an output stage optimized for 100 loads, and the SY55851A is optimized for 50 loads. The differential inputs for both devices are normally terminated with a single resistor (100) between the true and complement pins. APPLICATIONS s s s s Port bypass Data communication systems Wireless communication systems Telecom systems www..com PIN CONFIGURATION S1 /S 2 A3 /A 4 GND 5 MSOP 10 VCC FUNCTIONAL BLOCK DIAGRAM S 2 9 /B 8B 7Q 6 /Q B A 2 0S 1 2 2 Q SY55851 and SY55851A PIN NAMES Pin A, /A B, /B Q, /Q S, /S GND VCC AnyGate and SuperLite are trademarks of Micrel, Inc. Rev.: A Amendment: /2 Function CML, PECL, LVPECL Input CML, PECL, LVPECL Input Differential CML Output CML, PECL, LVPECL Input Selector Ground VCC 1 Issue Date: October 2001 Micrel SuperLiteTM SY55851 SY55851A PIN DESCRIPTIONS A, /A - CML Input (Differential) This is one of the differential inputs to the logic block. For a 2-variable logic function, it is either a constant value or a Boolean input. For a 2-input mux, this signal represents the output when S is set to logic zero. B, /B - CML Input (Differential) This is one of the differential inputs to the logic block. For a 2-variable logic function, it is either a constant value or a Boolean input. For a 2-input mux, this signal represents the output when S is set to logic one. Q, /Q - CML Output (Differential) This is the differential CML output for the logic block. For termination guidelines, see Figure 3. S, /S - CML Input (Differential) This differential CML input is one of the inputs to the logic block. It represents either one Boolean input for a 2-variable logic function, or the select input for a 2-input mux. FUNCTIONAL DESCRIPTION Establishing Static Logic Inputs The true pin of an input pair is internally biased to ground through a 75k resistor. The complement pin of an input pair is internally biased to VCC/2 through an internal voltage divider consisting of two 75k resistors. Since some logic functions necessitate an output to be connected to two inputs, SY55851/A inputs have no internal terminations. Typically, one resistor between the true and complement input is all that is required, as per Figure 3. To keep an input at static logic zero at VCC 3.0V, leave both inputs unconnected or tie the complement input to VCC. For VCC < 3.0V applications, connect the complement input to VCC and leave the true input unconnected. To make an input static logic one, connect the true input to VCC, and leave the complement input unconnected. These are the only safe ways to cause inputs to be at a static value. In particular, no input pin should be directly connected to ground. All NC (no connect) pins should be unconnected. VCC NC Input /Input NC NC Input /Input For VCC > 3.0V Applications Figure 1. Hard Wiring A Logic "1" (1) NOTE: 1. Input is either A, B, S input, and /Input is either /A, /B, /S input. NC VCC Input /Input For VCC < 3.0V Applications Figure 2. Hard Wiring A Logic "0" (1) 2 Micrel SuperLiteTM SY55851 SY55851A TRUTH TABLES AND/NAND A Q /Q ( ) L L L L B L H L H S L L H H Q L L L H () /Q H H H L NC VCC S A /S /A B /B S A /S /A B /B OR/NOR Q + /Q ( + ) A L H L H B H H H H S L L H H + Q L H H H ( + ) /Q H L L L VCC NC S A /S /A B /B XOR/XNOR A Q /Q ( ) B H H L L S L H L H Q L H H L ( ) /Q H L L H L L H H NC VCC S A /S /A B /B DELAY/NEGATION Q /Q A L H B X X S L L Q L H /Q H L VCC S A /S /A B /B NC Q /Q A X X B L H S H H Q L H /Q H L S 2:1 MUX A B 0 S Q Q B A 1 H L 3 Micrel SuperLiteTM SY55851 SY55851A CML TERMINATION AND TTL INTERFACE All inputs accept the output from any other member of this family. All outputs are source terminated 100 or 50 CML differential drivers as shown in Figure 3. All inputs to the SY55851/A must be externally terminated. SY55851/A inputs are designed to accept a termination resistor between the true and complement inputs of a differential pair. 0402 form factor chip resistors will fit with some trace fanout. VCC VCC 100 100 Q /Q 100 200 100 50 50 Q /Q 50 100 50 8mA 16mA SY55851 SY55851A Figure 3a. SY55851 100 Load CML Output Figure 3b. Differentially Terminated SY55851A (50 Load CML Output) VCC VCC 100 100 Q /Q 100 100 50 100 50 VCC VCC 1k VCC 549 VCC VCC (TTL Driver) SY55851 SY55851A S /S 8mA TTL Driver 1k 1.47k SY55851 Figure 3c. Differentially Terminated SY55851 (50 Load CML Output) Figure 4. Interfacing TTL-to-CML Select Inputs 4 Micrel SuperLiteTM SY55851 SY55851A ABSOLUTE MAXIMUM RATINGS(1) Symbol VCC VIN VOUT TA Tstore JA JC Power Supply Voltage Input Voltage CML Output Voltage Operating Temperature Range Storage Temperature Range Package Thermal Resistance (Junction-to-Ambient) Package Thermal Resistance (Junction-to-Case) -Still-Air (multi-layer PCB) -500lfpm (multi-layer PCB) Rating Value -0.5 to +6.0 -0.5 to VCC +0.5 VCC -1.0 to VCC +0.5 -40 to +85 -65 to +150 113 96 42 Unit V V V C C C/W C/W C/W NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS TA = -40C to +85C(1) Symbol VCC ICC Parameter Power Supply Voltage Power Supply Current SY55851 SY55851A Min. 2.3 -- -- Typ. -- -- 46 Max. 3.6 40 60 Unit V mA mA No Load No Load Condition CML DC ELECTRICAL CHARACTERISTICS VCC = 2.3V to 3.6V; GND = 0V; TA = -40C to +85C(1) Symbol VID VIH VIL VOH VOL VOUT Parameter Differential Input Voltage Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage Output Voltage Swing(2) SY55851 SY55851A ROUT Output Source Impedance SY55851 SY55851A Min. 100 1.6 1.5 VCC - 0.040 VCC - 1.00 0.650 -- -- -- 80 40 Typ. -- -- -- VCC - 0.010 VCC - 0.800 0.800 0.400 0.200 0.400 100 50 Max. -- VCC VCC - 0.1 VCC VCC - 0.65 1.00 -- -- -- 120 60 Unit mV V V V V V V V V No Load No Load No Load 100 Load(3) 50 Load(4) (SY55851) 50 Load(5) (SY55851A) Condition NOTES: 1. The DC parameters are guaranteed after thermal equilibrium has been established. 2. Actual voltage levels and differential swing will depend on customer termination scheme. Refer to the "CML Termination" diagram for more details. 3. Applies to SY55851: 200 termination resistor across Q and /Q. See Figure 3a. 4. Applies to the SY55851. See Figure 3c. 5. Applies to the SY55851A: 100 termination resistor across Q and /Q. See Figure 3b. 5 Micrel SuperLiteTM SY55851 SY55851A AC ELECTRICAL CHARACTERISTICS(1) VCC = 2.3V to 3.6V; GND = 0V; TA = -40C to +85C Symbol fMAX(2) Parameter Max. Operating Frequency SY55851 SY55851A Propagation Delay SY55851 (S to Q) SY55851A Propagation Delay (A-Q and B-Q) SY55851 SY55851A CML Output Rise/Fall Times (20% to 80%) SY55851 SY55851A Min. 2.5 3.0 -- 130 -- 130 -- -- Typ. -- -- -- -- -- -- -- 65 Max. -- -- 350 280 350 280 110 100 Unit GHz GHz ps ps ps ps ps ps Condition tPD(S-Q) tPD (A-Q and B-Q) tr tf NOTES: 1. SY55851: outputs terminated to 50 equivalent load. See Figure 3c. SY55851A: outputs terminated to 50 load. See Figure 3b 2. fMAX represents a maximum toggle rate in which the output still meets CML logic swing. PRODUCT ORDERING CODE Ordering Code SY55851UKI SY55851UKITR* SY55851AUKI SY55851AUKITR* *Tape and Reel. Package Type K10-1 K10-1 K10-1 K10-1 Operating Range Industrial Industrial Industrial Industrial Package Marking 851U 851U 851A 851A Description 100 Load 100 Load 50 Load 50 Load 6 Micrel SuperLiteTM SY55851 SY55851A 10 LEAD MSOP (K10-1) Rev. 00 MICREL-SYNERGY 3250 SCOTT BOULEVARD TEL SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.synergysemi.com http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2001 Micrel Incorporated 7 |
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