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| www..com s s s s s om .c 4U et STP50NE10L he N - CHANNEL 100V - 0.020 - 50A TO-220 aS t STripFETTM POWER MOSFET a .D w w w TYPICAL R = 0.020 (R) TYPE VDSS R DS(on) ID STP50NE10L 100 V <0.025 50 A EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE AT 100 oC APPLICATION ORIENTED CHARACTERIZATION DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC & DC-AC CONVERTERS s AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc.) s ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS ID ID I DM (*) P tot Drain-source Voltage (V GS = 0) Gate-source Voltage Drain- gate Voltage (R GS = 20 k) Drain Current (continuous) at T c = 25 C o m o .c U t4 e e h S ta a .D w w w 3 1 2 DS(on) TO-220 INTERNAL SCHEMATIC DIAGRAM Parameter Value 100 Unit V V V A 100 20 50 35 o Drain Current (continuous) at T c = 100 C Drain Current (pulsed) Total Dissipation at T c = 25 o C Derating Factor dv/dt (1) Peak Diode Recovery voltage slope Tstg Tj Storage Temperature Max. Operating Junction Temperature (*) Pulse width limited by safe operating area (1) ISD 50 A, di/dt 275 A/s, VDD V(BR)DSS, Tj TJMAX May 1999 om .c 4U et he aS at .D w w w A 200 A 150 1 W W/o C V/ns o o 6 -65 to 175 175 C C 1/8 STP50NE10L THERMAL DATA R thj-case Rthj-amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 1 62.5 0.5 300 C/W oC/W o C/W o C o AVALANCHE CHARACTERISTICS Symbol IAR www..com Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max) Single Pulse Avalanche Energy (starting T j = 25 o C, I D = I AR , V DD = 50 V) Max Value 50 400 Unit A mJ E AS ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbol V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Conditions I D = 250 A V GS = 0 Min. 100 1 10 100 Typ. Max. Unit V A A nA Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (V DS = 0) V GS = 20 V T c = 125 o C ON () Symbol V GS(th) R DS(on) I D(on) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance Test Conditions I D = 250 A Min. 1 Typ. 1.7 0.020 0.024 50 Max. 2.5 0.025 0.030 Unit V A V GS = 10 V ID = 25 A V GS = 5 V I D = 25 A On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V DYNAMIC Symbol g fs () C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions V DS > I D(on) x R DS(on)max V DS = 25 V f = 1 MHz I D =25 A V GS = 0 Min. Typ. 45 5000 500 180 Max. Unit S pF pF pF 2/8 STP50NE10L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol t d(on) tr Qg Q gs Q gd www..com Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions V DD = 50 V I D = 25 A R G = 4.7 V GS = 5 V (Resistive Load, see fig. 3) V DD = 80 V I D = 50 A V GS = 5 V Min. Typ. 30 105 82 17 49 Max. Unit ns ns 105 nC nC nC SWITCHING OFF Symbol t d(of f) tf tr(Voff) tf tc Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions V DD = 50 V I D = 25 A R G = 4.7 V GS = 5 V (Resistive Load, see fig. 3) V clamp = 80 V I D = 50 A R G = 4.7 V GS = 5 V (Inductive Load, see fig. 5) Min. Typ. 135 45 45 45 85 Max. Unit ns ns ns ns ns SOURCE DRAIN DIODE Symbol ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 50 A V GS = 0 165 870 10.5 I SD = 30 A di/dt = 100 A/s V DD = 50 V T j = 150 o C (see test circuit, fig. 5) Test Conditions Min. Typ. Max. 50 200 1.5 Unit A A V ns nC A () Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STP50NE10L Output Characteristics Transfer Characteristics www..com Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STP50NE10L Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature www..com Source-drain Diode Forward Characteristics 5/8 STP50NE10L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform www..com Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STP50NE10L TO-220 MECHANICAL DATA DIM. MIN. A C D www..com mm TYP. MAX. 4.60 1.32 2.72 1.27 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 13.0 2.65 15.25 6.2 3.5 3.75 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40 inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151 D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. A C D1 L2 F1 D G1 E Dia. L5 L7 L6 L4 P011C L9 F2 F G H2 7/8 STP50NE10L www..com Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 8/8 http://www.st.com . |
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