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R EM MICROELECTRONIC - MARIN SA EM6156 5V 120mA Automotive LDO Regulator with Watchdog Description The EM6156 offers a high level of integration by combining voltage regulation, voltage monitoring and software monitoring using a watchdog. A comparator monitors the voltage applied at the VIN input comparing it with an internal voltage reference VREF. The power-on reset function is initialized after VIN reaches VREF and takes the reset output inactive after a delay TPOR. The reset output goes active low when the VIN voltage is less than VREF. The RESET output is guaranteed to be in a correct state for a regulated output voltage as low as 1.2V. The watchdog function monitors software cycle time and execution. If software clears the watchdog too slowly (incorrect execution) it will cause the system to be reset. In EM6156, the voltage regulator has a low dropout voltage and a low quiescent current. The quiescent current increases only slightly in dropout prolonging battery life. Built-in protection includes a positive transient absorber for up to 45 V (load dump) and the ability to survive an unregulated input voltage of -42 V (reverse battery). The input may be connected to ground or to a reverse voltage without reverse current flowing from the output to the input. Features -40C to +125C temperature range Highly accurate 5 V, 120 mA guaranteed output (actual maximum current depends on power dissipation) Output voltage tolerance <+/- 3% Low dropout voltage, typically 250 mV at 100 mA Unregulated DC input can withstand -42 V reverse battery and +45 V power transients Fully operational for unregulated DC input voltage up to 40 V and regulated output voltage down to 3.5 V No reverse output current Very low temperature coefficient for the regulated output Current limiting Four threshold voltages (2.9V, 3.0V, 4.4V, 4.6V) Several timeout reset periods (1.6ms, 25ms, 200ms, 1600ms) Several watchdog timeout periods (6.2ms, 102ms, 1,6s, 25,6s) Push pull or Open-drain active-low RESET output Reset output guaranteed for regulated output voltage down to 1.2 V Qualified according to AEC-Q100 Green SO8 Exposed Pad Power Package (RoHS compliant) Typical Operating Configuration Applications Automotive systems Industrial Home security systems Fig. 1 Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 1 www.emmicroelectronic.com R EM6156 Block Diagram Fig. 2 Pin Assignment Description SO8 Exposed Pad 1 2 Name VDD Function Watchdog power supply 3 4 5 6 7 8 Table 1 WDI VSS VIN NC VOUT RESET RESET Watchdog timer clear input signal Ground terminal Voltage regulator input Not connected Voltage regulator output RESET Output (Push-pull) RESET Output Exposed pad Can be connected to VSS or left floating Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 2 www.emmicroelectronic.com R EM6156 Ordering Information Standard Versions Part Number EM6156LXES8B-4.4+ Threshold Reset 4.4V Timeout Reset 200ms Watchdog Timeout 1.6s Reset Output Active Low Push Pull Package ExPadSO8 Delivery Form Tape & Reel, 2500 pcs Package Marking TBD Note: the "+" symbol at the end of the part number means that this product is RoHS compliant (green). Sample stock is generally held on standard versions only. Please contact factory for other versions not shown here and for availability of non standard versions. Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A tWD [ms] 3 www.emmicroelectronic.com R EM6156 Absolute Maximum Ratings Parameter Continuous voltage at VIN to VSS Transients on VIN for t < 100ms and duty cycle 1% Max. voltage at any signal pin Min. voltage at any signal pin Reverse supply voltage on VIN Storage temperature ESD According to MIL-STD-883 method 3015.7 Symbol Conditions VIN -0.3V to +40V See the notes related to Table 2. Special care must be taken in disturbed environments (automotive, proximity of motors and relays, etc). VTRANS VMAX VMIN VREV TSTO VSmax Up to +45V VOUTPUT + 0.3V VSS - 0.3V -42V -65 to 150C 2000V Table 2 Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. Unused inputs must always be tied to a defined logic voltage level. Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Operating Conditions Parameter Operating junction temperature VIN voltage (Note 1) VOUT voltage (Note 1,2) Symbol Tj VINPUT VOUTPUT VOUTPUT IOUTPUT VIN Rth(j-a) Min -40 4.0 3.5 1.2 120 0 30 VOUT 90 Max +150 40 5.5 Unit C V V V mA V C/W Table 3 Decoupling Methods The input capacitor is necessary to compensate the line influences. A resistor of approx. 1 connected in series with the input capacitor may be used to damp the oscillation of the input capacitor and input inductance. The ESR value of the capacitor plays a major role regarding the efficiency of the decoupling. It is recommended also to connect a ceramic capacitor (100nF) directly at the IC's pins. In general the user must assure that pulses on the input line have slew rates lower than 1V/s. On the output side, the capacitor is necessary for the stability of the regulation circuit. The stability is guaranteed for values of 10 F or greater. It is especially important to choose a capacitor with a low ESR value. Tantalum capacitors are recommended. RESET guaranteed (Note 3) VOUT output current (Note 4) Comparator input voltage Package thermal resistance from junction to ambient: Exp. Pad SO8 150 MILS (Note 5) Note 1: Note 2: Note 3: Note 4: Note 5: Full operation guaranteed. To achieve the load regulation specified in Table 3, a 10 F capacitor or greater is required on the VIN, see Fig. 1b. The 10 F must have an effective resistance 4 and a resonant frequency above 500 kHz. A 10F load capacitor and a 100 nF decoupling capacitor are required o the regulator output for stability. The 10 F must have an effective series resistance of < 4 and a resonant frequency above 500 kHz. For open drain output type, RESET must be pulled up externally to VOUT even if it is unused. The output current will not apply to the full range of input voltage. Power dissipation that would require the EM6156 to work above the maximum junction temperature (+150 C) must be avoided. The thermal resistance specified assumes the package is soldered to a PCB. A typical value of 51 C/W has been obtained with a dual layer board, with the slug soldered to the heat-sink area of the PCB. Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 4 www.emmicroelectronic.com R EM6156 Electrical Characteristics VIN = 13.5V, COUT = 10F + 100nF, CIN = 2 F, VDD connected to VOUT; TA = -40 to +125 C (Note 1), unless otherwise specified. Parameter Symbol Conditions Min Typ Max Low drop Output Regulator Supply current (Note 6) ISS IL = 1 mA 412 Supply current ISS IL = 100 mA 9 15 Output voltage VOUTPUT 4.9 5 5.10 5 mA IL 100 mA Line regulation (Note 7) VLINE 15 30 6 V VIN 100 mA, IL = 5 mA Load regulation (Note 7) VL 40 5 mA IL 100 mA, VIN = 6V Dropout voltage (Note 8) VDROPOUT IL = 100 mA 250 500 Current limit ILmax Output tied to VSS, VIN = 6V 120 160 Reset Threshold hysteresis VHYS TA = +25C 2.1%VTH EM6156 C-G-L-Q 160 200 240 VDD from 0V to EM6156 A-E-J-N 0.7 1.56 3.8 VTH(typ)+15% Reset timeout period tPOR EM6156 B-F-K-P 20 25 30 TA = +25C (Note 2 & Note 4) EM6156 D-H-M-R 1280 1600 1920 Propagation delay time VDD drops from VTH(typ) +0.2V to 2 70 255 tP VDD to RESET (RESET) VTH(typ)-0.2V (Note 2). TA = +25C delay VDD > 1V IOL = 100A 0.3 Open-drain RESET output VOL VDD > 2.5V IOL = 1.5mA 0.3 voltage IOL = 3mA 0.35 VDD > 5V VDD > 2.5V IOL = 1.5mA 0.3 Push-pull RESET / RESET VOL VDD > 5V IOL = 3mA 0.35 output voltage VDD > 1V IOL = 100A 0.3 VDD > 1.1V IOL = -30A 0.8 VOH VDD > 2.5V IOL = -1.5mA 2 IOL = -3mA 4 VDD > 5V Output leakage current ILEAK Only for EM6156_Y (open-drain) 0.5 +25C 2.886 2.974 EM6156-2.9 -40C to +85C 2.784 2.93 3.091 -40C to +125C 2.731 3.103 +25C 3.034 3.126 EM6156-3.1 -40C to +85C 2.926 3.08 3.249 -40C to +125C 2.871 3.262 Threshold voltage (Note 3) VTH +25C 4.334 4.466 EM6156-4.4 -40C to +85C 4.180 4.40 4.642 -40C to +125C 4.101 4.660 +25C 4.561 4.699 EM6156-4.6 -40C to +85C 4.399 4.63 4.885 -40C to +125C 4.315 4.903 Watchdog Input (WDI) WDI Input low VWDI low 0.3VDD WDI Input high VWDI high TA = +25C 0.7VDD Pulse width at WDI tWP 1 EM6156 J-K-L-M 1280 1600 1920 EM6156 A-B-C-D 5 6.25 7.5 (Note 5) Watchdog timeout period tWD EM6156 E-F-G-H 80 100 120 EM6156 N-P-Q-R 20480 25600 30720 High-level input current IIH WDI connected to VDD, TA = +25C 18 Low-level input current IIL WDI connected to VSS, TA = +25C 8.3 Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Production tested at +25C only. Over temperature limits are guaranteed by design, not production tested. WDI and RESET open. Threshold voltage is specified for VDD falling. Standard version for tPOR is 200ms (typ). Other option (1.6ms, 25ms, 1600ms) are available by mask option Standard version for tWD is 1600ms (typ). Other option (6.2ms, 102ms, 25.6s) are available by mask option If INPUT is connected to VSS, no reverse current will flow from the OUTPUT to the INPUT. Regulation is measured at constant junction temperature using pulse testing with a low duty cycle. The dropout voltage is defined as the INPUT to OUTPUT differential, measured with the input voltage equal to 5.0 V. Unit A mA V mV mV mV mA V ms s V V V A V V V s ms A A Table 4 Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 5 www.emmicroelectronic.com R EM6156 Timing Waveforms Watchdog Timeout Period tSEN V DD V TH V HYS Overdrive 0.9V t logic "1" RESET logic "0" t logic "1" RESET logic "0" t tPOR tPOR tMD tP Fig. 3 logic "1" WDI logic "0" tWP tWD tWD t logic "1" RESET logic "0" t logic "1" RESET logic "0" t Fig. 4 Note 9: tSEN = Maximum Transient Duration. Please refer to figure on the next page. Note 10: Overdrive = VTH -VDD. Please refer to figure on the next page. tPOR Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 6 www.emmicroelectronic.com R EM6156 Typical Operating Characteristics (Typical values are at TA=+25C unless otherwise noted. WDI, RESET and RESET open.) 9 8 7 6 5 [ uA ] 4 3 2 1 0 -50 -25 0 25 50 [ C ] 75 100 125 VDD 3 . 3 V VDD 5 . 0 V 6% 4% 2% 0% -2% VDD 1. 5 V -4% -6% -50 -25 0 25 50 [ C ] 75 100 125 Fig. 5 Fig. 6 IDD vs. Temperature Threshold Voltage Variation vs. Temperature (normalized) 160% 140% 120% 100% 80% 60% -50 -25 0 25 50 [ C ] 75 100 125 Fig. 7 160% tPOR (C) tPOR (25C) 140% 120% 100% 80% 60% -50 -25 0 25 50 [ C ] tWD (C) tWD (25C) 75 100 125 Fig. 8 Reset Timeout Period tPOR vs. Temperature (normalized with respect to tPOR 25C) 120 100 80 [ us ] 60 40 20 0 -50 Watchdog Timeout Period tWD vs. Temperature (normalized with respect to tWD 25C) 120 100 80 [ us ] 60 40 20 0 Reset occurs above this line -25 0 25 50 [ C ] 75 100 125 Fig. 9 1 10 [ mV ] 100 1000 Fig. 10 Propagation Time tPHL vs. Temperature Maximum Transient Duration tSEN vs. Overdrive VTH-VD 7 www.emmicroelectronic.com Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A R EM6156 Typical Operating Characteristics (Typical values are at TA = +25C unless otherwise noted. WDI, RESET and RESET open) 250 225 200 [ ns ] 175 150 125 100 -50 -25 0 25 [ C ] 50 75 100 125 Fig. 11 Watchdog Input Pulse Width tWP vs. Temperature Functional Description VDD MR WDI High Impedance RESET t < tWD tPOR t > tWD tPOR tPOR Fig. 12 VOUT Monitoring A microprocessor (P) reset input starts the microcontroller in a known state. The EM6156 microcontroller supervisory circuits assert a reset to prevent code-execution errors during power-up, power down, and brownout conditions. RESET is guaranteed to be a logic low for VDD down to 0.9V. Once VDD exceeds the reset threshold, an internal timer keeps RESET low for the specified reset timeout period (tPOR); after this interval, RESET returns high. If a brownout condition occurs (VDD dips below the reset threshold), RESET goes low. Each time RESET is asserted it stays low for the reset timeout period. Any time VDD goes below the reset threshold the internal timer restarts. RESET is the inverse of RESET. Voltage Regulator The EM6156 has a 5 V, 150 mA, low dropout voltage regulator. The low supply current makes the EM6156 particularly suitable for automotive systems which remain continuously powered. The input voltage range is 2.3 V to 40 V for operation and the input protection includes both reverse battery (42 V below ground) and load dump (positive transients up to 45 V). There is no reverse current flow from the VOUT to the VIN when the VIN equals VSS. This feature is important for systems which need to implement (with capacitance) a minimum power supply hold-up time in the event of power failure. To achieve good load regulation a 22 F capacitor (or greater) is needed on the VIN (see Fig. 17). Tantalum or aluminium electrolytic are adequate for the 22 F capacitor; film types will work but are relatively expensive. Many aluminium electrolytic have electrolytes that freeze at about -30C, so tantalums are recommended for operation below -25C. The important parameters of the 22 F capacitor are an effective series resistance of lower than 4 and a resonant frequency above 500 kHz. A output 10 F capacitor (or greater) and a 100 nF capacitor are required on the output to prevent oscillations due to instability. The specification of this 10 F capacitor is as per the 22 F capacitor on the input (see previous paragraph). The EM6156 will remain stable and in regulation with no external load and the dropout voltage is typically constant as the input voltage fall below its minimum level (see Table 2). These features are especially important in CMOS RAM keep-alive applications. Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 8 www.emmicroelectronic.com R EM6156 Power Dissipation Care must be taken not to exceed the maximum junction temperature (+125C). The power dissipation within the EM6156 is given by the formula: PTOTAL = (VINPUT - VOUTPUT) x IOUTPUT + (VINPUT) x ISS The maximum continuous power dissipation at a given temperature can be calculated using the formula: PMAX = ( 150C - TA) / Rth(j-a) where Rth(j-a) is the thermal resistance from the junction to the ambient and is specified in Table 2. Note that Rth(j-a) given in Table 2 assumes that the package is soldered to a PCB. The above formula for maximum power dissipation assumes a constant load (i.e. >100 s). The transient thermal resistance for a single pulse is much lower than the continuous value. Watchdog Description If the watchdog timer has not been cleared within tWD (1.6s typ.), reset asserts. The internal 1.6s timer is cleared by either a reset pulse or by toggling WDI. While reset is asserted, the timer remains cleared and does not count. As soon as reset is released, the timer starts counting. If the microcontroller I/O connected to WDI is put in a high impedance condition, the circuit will detect this condition as a microcontroller in sleep mode and prevent its watchdog from timing out. To monitor a high impedance or a three state condition on WDI, the watchdog input is internally driven low during the first 15/16 of the watchdog timeout period and high for the last 1/16 of the watchdog timeout period. VDD Pullup 1/16 tWD WDI 15/16 tWD Transition Detector Watchdog Logic + Timer Pulldown GND Fig. 14 WDI Input Stage Block Schematic 15.0 12.0 9.0 [ uA ] 6.0 3.0 0.0 -50 -25 0 25 50 75 100 125 [ C ] VDD RESET WDI Pullup OFF ON OFF Fig. 15 WDI Input Current Low-level IIL vs. Temperature (VDD=5.5V) WDI Pulldown ON OFF ON tPOR 15/16 tWD tWD 1/16 tWD 25.0 Fig. 13 20.0 15.0 [ uA ] WDI Input Timing Diagram When WDI is left unconnected, this internal driver clears the 1.6s timer every 1.5s. When WDI is three-stated or unconnected, the maximum allowable leakage current is 0.5A. To minimized the overall system power consumption and therefore for a minimum watchdog input current leave WDI low for the majority of the watchdog timeout period, pulsing it low-high-low once within the first 15/16 of the watchdog timeout period to reset the watchdog timer. If WDI is externally driven high for the majority of the timeout period, up to 35A can flow into WDI. Meanwhile when the microcontroller is not in sleep mode, the output of the microcontroller which drives WDI has to be strong enough to fight the 35A. 10.0 5.0 0.0 -50 -25 0 25 50 75 100 125 [ C ] Fig. 16 WDI Input Current High-Level IIH vs. Temperature (VDD=5.5V) Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 9 www.emmicroelectronic.com R EM6156 Typical Application Unregulated Voltage Regulated Voltage (5V) COUT + VIN VOUT VDD EM6156 22uF + 100nF 10uF Address decoder WDI RESET VSS Microprocessor RES Motor controls GND Fig. 17 The important parameters of the 10F capacitor are an effective series resistance lower than 4 and a resonant frequency above 500 kHz. Typical maximum output current versus VIN (to be confirmed after qualification) 200 180 Esposed Pad SO8 Package Exposed Pad SO-16 Package Bottom slug soldered to PCB Botton slug soldered to PCB 160 140 OUTPUT Current [mA] TA=25C 120 100 80 TA=85C 60 40 20 0 5 10 15 20 25 30 35 40 INPUT Voltage [V] Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 10 www.emmicroelectronic.com R EM6156 Package Information EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not authorized for use as components in life support devices or systems. Copyright (c) 2007, EM Microelectronic-Marin SA 06/07 - rev.A 11 www.emmicroelectronic.com |
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