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HAT2092R Silicon N Channel Power MOS FET High Speed Power Switching REJ03G0511-0300 (Previous ADE-208-1236A(Z)) Rev.3.00 Jan.13.2005 Features * * * * Low on-resistance Capable of 4.5 V gate drive Low drive current High density mounting Outline SOP-8 5 76 78 DD 56 DD 8 2 G 3 12 4 4 G S1 S3 1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain MOS1 MOS2 Absolute Maximum Ratings (Ta = 25C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel dissipation Symbol VDSS VGSS ID ID(pulse)Note1 IDR Pch Note2 Pch Note3 Ratings 30 20 11 88 11 2 3 Unit V V A A A W W C C Channel temperature Tch 150 Storage temperature Tstg -55 to +150 Notes: 1. PW 10 s, duty cycle 1 % 2. 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10s 3. 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10s Rev.3.00 Jan. 13, 2005 page 1 of 7 HAT2092R Electrical Characteristics (Ta = 25C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Note: 4. Pulse test Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF trr Min 30 20 -- -- 1.0 -- -- 12 -- -- -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- 13 17 20 1400 340 190 22 4 4 15 17 50 9 0.85 50 Max -- -- 10 1 2.5 16 25 -- -- -- -- -- -- -- -- -- -- -- 1.10 -- Unit V V A A V m m S pF pF pF nc nc nc ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = 100 A, VDS = 0 VGS = 16 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, ID = 1 mA ID = 5.5 A, VGS = 10 V Note4 ID = 5.5 A, VGS = 4.5 V Note4 ID = 5.5 A, VDS = 10 V Note4 VDS = 10V VGS = 0 f = 1MHz VDD = 10 V VGS = 10 V ID = 11 A VGS = 10 A, ID = 5.5 A VDD 10 V RL = 1.83 Rg = 4.7 IF = 11A, VGS = 0 Note4 IF = 11A, VGS = 0 diF/ dt =50A/s Rev.3.00 Jan. 13, 2005 page 2 of 7 HAT2092R Main Characteristics Power vs. Temperature Derating 4.0 Pch (W) ID (A) Maximum Safe Operation Area 500 10 s 10 0 Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW < 10 s 3.0 100 10 Channel Dissipation Drain Current DC Op PW era tio 2.0 1 1 =1 0m s n (P W 1m s s 2 ive Dr at er Op 1.0 Dr ive Op Operation in this area is 0.1 limited by RDS(on) N < 1 ote 0s 4 ) ion er at ion 0 50 100 150 Ta (C) 200 Ambient Temperature Ta = 25C 1 shot Pulse 0.01 0.1 0.3 1 3 10 30 100 Drain to Source Voltage VDS (V) Note 4 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics 50 10 V 4.5 V ID (A) Typical Transfer Characteristics 50 VDS = 10 V Pulse Test 40 ID (A) Drain Current 4V Pulse Test 40 30 3.5 V 30 Drain Current 20 20 Tc = 75C 10 25C -25C VGS = 3 V 10 0 2 4 6 Drain to Source Voltage 8 10 VDS (V) 0 1 2 3 Gate to Source Voltage 4 VGS 5 (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage (V) 0.20 Pulse Test 0.16 Drain to Source On State Resistance RDS(on) (m) VDS(on) Static Drain to Source on State Resistance vs. Drain Current 100 Pulse Test 50 20 10 5 2 1 0.1 0.2 0.5 1 2 5 10 20 Drain Current ID (A) VGS= 4.5 V 10 V Drain to Source Voltage 0.12 ID = 10 A 0.08 5A 2A 0.04 0 4 8 12 Gate to Source Voltage 16 VGS 20 (V) 50 100 Rev.3.00 Jan. 13, 2005 page 3 of 7 HAT2092R Static Drain to Source on State Resistance vs. Temperature 50 Pulse Test 40 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (m) 100 30 10 3 1 0.3 0.1 0.1 VDS = 10 V Pulse Test 0.3 1 3 10 30 100 25C Tc = -25C 30 VGS = 4.5 V ID = 2 A, 5 A 75C 10 A 20 10 10 V 0 -40 2 A, 5 A, 10 A 0 40 80 120 160 Case Temperature Tc (C) Body-Drain Diode Reverse Recovery Time Drain Current ID (A) Typical Capacitance vs. Drain to Source Voltage 10000 3000 1000 300 100 30 10 0 10 20 30 VGS = 0 f = 1 MHz 40 50 Coss Crss Ciss 100 Reverse Recovery Time trr (ns) 50 20 di/dt = 50 A/s VGS = 0, Ta = 25C 5 10 20 IDR (A) 10 0.1 0.2 0.5 1 2 Reverse Drain Current Capacitance C (pF) Drain to Source Voltage VDS (V) Switching Characteristics 200 VGS (V) Dynamic Input Characteristics 50 Drain to Source Voltage VDS (V) ID = 11 A VGS 20 100 Switching Time t (ns) 40 16 td(off) 50 tf 20 10 5 VGS = 10 V, VDS = 10 V Rg = 4.7 , duty < 1 % 0.5 1 2 5 10 Drain Current ID (A) 20 td(on) tr 30 VDS 12 VDD = 25 V 10 V 8 5V VDD = 25 V 10 V 5V 8 16 24 32 Gate Charge Qg (nc) 4 0 40 20 10 Gate to Source Voltage 0 2 0.1 0.2 Rev.3.00 Jan. 13, 2005 page 4 of 7 HAT2092R Reverse Drain Current vs. Source to Drain Voltage 50 Reverse Drain Current IDR (A) 40 10 V 5V VGS = 0 30 20 10 Pulse Test 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 VSD (V) Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation) 10 Normalized Transient Thermal Impedance s (t) D=1 1 0.1 0.05 0.02 0.01 0.01 p ot uls e ch - f(t) = s (t) x ch - f ch - f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6 mm) PDM PW T 0.001 h 1s D= PW T 0.0001 10 100 1m 10 m 100 m 1 10 Pulse Width PW (S) 100 1000 10000 Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10 Normalized Transient Thermal Impedance s (t) 1 D=1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 uls e 0.01 ch - f(t) = s (t) x ch - f ch - f = 166C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6 mm) PDM PW T 0.001 1s h p ot D= PW T 0.0001 10 100 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Rev.3.00 Jan. 13, 2005 page 5 of 7 HAT2092R Switching Time Test Circuit Vin Monitor Rg D.U.T. RL Vin Vin 10 V V DS = 10 V Vout 10% 10% 90% td(on) tr 90% td(off) tf 10% Vout Monitor Switching Time Waveform 90% Rev.3.00 Jan. 13, 2005 page 6 of 7 HAT2092R Package Dimensions As of January, 2003 Unit: mm 4.90 5.3 Max 5 8 1 4 3.95 *0.22 0.03 0.20 0.03 1.75 Max 0.75 Max 6.10 - 0.30 + 0.10 1.08 0 - 8 + 0.67 0.14 - 0.04 + 0.11 1.27 0.60 - 0.20 *0.42 0.08 0.40 0.06 0.15 0.25 M *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms -- 0.085 g Ordering Information Part Name HAT2092R-EL-E HAT2092RJ-EL-E Quantity 2500 pcs 2500 pcs Taping Taping Shipping Container Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Jan. 13, 2005 page 7 of 7 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 http://www.renesas.com (c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0 |
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