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Design Example Report
Title Specification Application Author Document Number Date Revision 10 W Power Supply using DPA423P Input: 37-57 VDC Output: 3.3V/2.0A, 5V/200mA, 12V/200mA VoIP phone Power Integrations Applications Department DER-96 September 12, 2005 1.0
Summary and Features This document is an engineering prototype report describing a VoIP power supply utilizing DPA423P. * * * * * * * Eliminates LM78xx linear-regulators on 5 V Low-cost 12 V linear-reg. with short circuit protection provided by main supply High Efficiency (> 70% at 48 VDC) Low EMI signature (both radiated and conducted emissions) Low Parts Count Built-in input short circuit protection on all outputs Carefully designed for low EMI
The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com.
Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA. Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com
DER-96
10 W VoIP
September 12, 2005
Table Of Contents
Introduction................................................................................................................. 4 Power Supply Specification ........................................................................................ 5 Schematic................................................................................................................... 6 Circuit Operation ........................................................................................................ 7 4.1 General ............................................................................................................... 7 4.2 Description .......................................................................................................... 7 5 BOM ........................................................................... Error! Bookmark not defined. 6 Layout....................................................................................................................... 11 7 Transformer Design Spreadsheet ............................................................................ 12 8 Transformer Specification......................................................................................... 14 8.1 Transformer Winding......................................................................................... 14 8.2 Electrical Specifications..................................................................................... 14 8.3 Materials............................................................................................................ 14 8.4 Transformer Build Diagram ............................................................................... 15 8.5 Transformer Construction.................................................................................. 15 8.5.1 WD#3 Copper Foil build diagram: .............................................................. 16 9 Inductor Specification ............................................................................................... 17 9.1 Inductor Winding ............................................................................................... 17 9.2 Electrical Specifications..................................................................................... 17 9.3 Materials............................................................................................................ 17 9.4 Inductor Footprint Diagram................................................................................ 18 9.5 Inductor Construction ........................................................................................ 18 10 Performance ......................................................................................................... 19 10.1 Efficiency........................................................................................................... 19 10.2 Regulation vs. Load........................................................................................... 20 10.3 Regulation vs. Load........................................................................................... 21 10.4 Raw Performance Data ..................................................................................... 22 10.5 Thermal Performance........................................................................................ 24 11 Waveforms............................................................................................................ 25 11.1 Drain Current and Voltage................................................................................. 25 11.2 Output Transient Load Response ..................................................................... 26 11.3 Output Ripple Voltage ....................................................................................... 27 11.4 Output Voltage Start-up Profile ......................................................................... 28 12 Conducted EMI ..................................................................................................... 30 12.1 230V High Line EMI .......................................................................................... 30 13 Radiated EMI scans.............................................................................................. 31 14 Revision History.................................................................................................... 32 1 2 3 4
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DER-96
10 W VoIP
September 12, 2005
Important Notes: Although this board is designed to satisfy safety isolation requirements, the engineering prototype has not been agency approved. Therefore, all testing should be performed using an isolated source to provide power to the prototype board. Design Reports contain a power supply design specification, schematic, bill of materials, and transformer documentation. Performance data and typical operation characteristics are included. Typically only a single prototype has been built.
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DER-96
10 W VoIP
September 12, 2005
1 Introduction
This document is an engineering prototype report describing a VoIP prototype power supply utilizing DPA423P. The power supply delivers 10 W continuous from an input of 37 to 57 VDC. The design has been optimized to minimize radiated EMI emissions. In the EMI section of the report it can be seen that there is a dramatic improvement in radiated EMI over the existing production DPA423 design. This document provides complete design information including specification, schematic, bill of material and transformer design and construction information. The document also provides performance information.
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10 W VoIP
September 12, 2005
2 Power Supply Specification
Description Input Voltage Under-Voltage Over-Voltage Output Output Voltage 1 Output Ripple Voltage 1 Output Current 1 Output Voltage 2 Output Ripple Voltage 2 Output Current 2 Output Voltage 3 Output Ripple Voltage 3 Output Current 3 Symbol VIN VIN_UV VIN_OV VOUT1 VRIPPLE1 IOUT1 VOUT2 VRIPPLE2 IOUT2 VOUT3 VRIPPLE3 IOUT3 0 0 11.4 12 Min 37 34 N/A 3.135 0 4.75 5 3.3 3.465 100 2 5.25 100 200 12.6 250 200 Typ Max 57 Units VDC VDC VDC V mVp-p A V mVp-p mA V mVp-p mA
5% 20 MHz bandwidth 5% 20 MHz bandwidth
Comment
5% 20 MHz bandwidth
Total Output Power Average Output Power Average Output Power Average Output Power Average Output Power Average Output Power Full Load Efficiency Environmental Conducted EMI Safety Ambient Temperature
POUT1 POUT2 POUT2 POUT_TOTAL POUT_FAULT
6.6 1 2.4 10 70
W W W W W %
Meets CISPR22B / EN55022B Designed to meet IEC950, UL1950 Class II
TAMB
0
40
o
C
Forced airflow
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3
Schematic
Figure 1 - Schematic
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10 W VoIP
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4 Circuit Operation
4.1 General The power supply uses a DPA423 device (U1), with integrated MOSFET and controller, in an isolated flyback configuration. The circuit also uses the under-voltage shutdown feature of the device along with current limit setting to minimize transformer size. The device operates at a switching frequency of 300 kHz. 4.2 Description The input fuse F1 protects the supply against catastrophic failure - although the built-in protection features of the DPA-Switch should render this redundant. The components C1, C2 and L7 form a pi-filter to limit both conducted and radiated EMI emissions. These components work to limit EMI emissions in conjunction with y-capacitor C16 and the shielding in the transformer. Resistor R1 programs the input under voltage startup threshold (and over voltage shutdown voltage). Diode D1, R7, C4, R2, and R3 implement an RCD clamp circuit to limit the leakage inductance spike on the Drain pin. Capacitor C3 and resistor R4 implement a snubber to limit high frequency ringing on the due to drain switching. Diode D2, R5 and C6 implement a bias voltage supply to provide operating power to the DPA-Switch (U4) with integrated PWM, controller and main switching MOSFET. Resistor R6 and C5 provide diode snubber for D2. Resistor R20 programs the current limit of the DPA-Switch. Capacitors C7 and C8 provide device decoupling with C8 also program the startup and auto-restart period of the device. Resistor R8 provides feedback compensation in conjunction with C8. The inductance of transformer T1 provides the energy storage and conversion component of the circuit. The 3.3 V output is rectified and filtered by diode D8 and capacitors C10, C11 with C12 provided output decoupling. The 5 V output is DC-stacked on the regulated DC output of 3.3 V and is rectified and filtered by diode D6 and capacitors C13 with capacitor C18 providing output decoupling. The 12 V output is AC-stacked on the 5 V transformer winding and is rectified and filtered by diode D7 and capacitor C14 with capacitor C17 providing output decoupling. Transistor Q2 and components R15, R26, R27, R28, C24, U4 implement a linear regulator to eliminate peak charging voltage from the 12 V output. Resistor R26, D12, D13 and D14 all form pre-load networks between the outputs to improve cross-regulation. Components R21, C21, R22, C22, R23 and C23 provide snubbing on output diodes. Diode pulls down the 5 V output when 12 V output is shorted thus forcing DPA-switch auto-restart. Using this diode removes the need for short-circuit protection in the 12 V linear regulator circuit. Resistors R11 and R10 sense the voltages on 5 V and 3.3 V outputs respectively. In conjunction with R12 they provide the input signal for the LM431 (U3) reference. Components R13 and C15 provide compensation for U3, to make sure that it's frequency response is limited only to low-frequency signals. Resistor R9 programs the highfrequency gain of the control loop and with opto-diode U2A transmits the feedback signal. Diode D3 and C9 provide a soft-finish circuit to limit output overshoot at startup. Diode D4
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September 12, 2005
discharges C9 when the output of the power supply drops out of regulation. Optotransistor U2B feeds the control signal back to the DPA-Switch.
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10 W VoIP
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5 Bill Of Materials
Item Qty. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Ref. Description 39 uF, 63, Electrolytic, Low ESR, 610 mOhm, (6.3 x 15) 470 pF, 100 V, Ceramic, X7R 22 nF, 100 V, Ceramic, X7R Mfg Part Number Mfg
2 C1 C2 1 C3 1 C4 1 C5 1 C6 1 C7 1 C8 1 C9 C10 C11 4 C12 C18 1 C13 1 C14 1 C15 1 C16 1 C17 C21 C22 3 C23 1 C24 1 D1
LXZ63VB39RM515LL United Chemi-Con ECU-S2A471KBA ECU-S2A223KBA Panasonic Panasonic
470 pF 50 V, Ceramic, X7R, 0603 ECJ-1VC1H471J Panasonic 10 uF, 16 V, Electrolytic, Gen. Purpose, (5 x KME16VB10RM5X11 11) LL United Chemi-Con 220 nF, 25 V, Ceramic, X7R, 0805 ECJ-2YB1E224K 47 uF, 10 V, Electrolytic, Gen. Purpose, (5 x KME10VB22RM5X11 11) LL 33 uF, 10 V, Electrolytic, Gen. Purpose, (5 x KME10VB33RM5X11 11) LL 680 uF, 10 V, Electrolytic, Very Low ESR, 56 mOhm, (8 x 15) KZE10VB681MH15LL 220 uF, 10 V, Electrolytic, Very Low ESR, 130 mOhm, (6.3 x 11) KZE10VB221MF11LL 100 uF, 10 V, Electrolytic, Very Low ESR, 300 mOhm, (5 x 11) KZE10VB101ME11LL 100 nF, 50 V, Ceramic, X7R, 0805 330 pF, Ceramic Y1 1 uF, 25 V, Ceramic, X7R, 1206 100 pF 50 V, Ceramic, X7R, 0603 100 nF, 50 V, Ceramic, X7R 600 V, 1 A, Rectifier, Glass Passivated, 2 us, DO-41 ECU-V1H221KBN 440LT33 ECJ-3YB1E105K ECJ-1VC1H101J ECU-S1H104KBB 1N4005GP LL4148 SB1100 11DQ06 SB540 Panasonic United Chemi-Con United Chemi-Con United Chemi-Con United Chemi-Con United Chemi-Con Panasonic Vishay Panasonic Panasonic Panasonic Vishay Diode Inc. Fairchild International Rectifier Vishay Vishay Diodes Inc Vishay Wickman N/A Molex
3 D2 D3 D4 75 V, 0.15 A, Fast Switching, 4 ns, MELF 1 D6 1 D7 1 D8 1 D11 D12 D13 3 D15 1 D14 100 V, 1 A, Schottky, DO-41 60 V, 1.1 A, Schottky, DO-41 40 V, 5 A, Schottky, DO-201AD
100 V, 1 A, Rectifier, DO-41 1N4002 50 V, 1 A, Rectifier, Glass Passivated, DO213AA (MELF) DL4001 20 V, 1 A, Schottky, DO-41 1N5817
1 F1 1 A, 250V, Slow, TR5 3,721,100,041 J3 J4 2 (FL1, FL2) PCB Terminal Hole, 18 AWG N/A 10 Position, Fem/Male (5 x 2 header, Top & 1 J6 Bot Entry, 0.1 pitch, Vertical 22-28-4100 1 J7 8 Position, Fem/Male (4 x 2) header, Top &
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10 W VoIP
Bot Entry, 0.1 pitch, Vertical
September 12, 2005
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
1 L7 1 Q2 1 R1 2 R2 R3 1 R4 1 R5 2 R6 R7 1 R8 2 R9 R15 1 R10 1 R11 1 R12 1 R13 1 R20 R21 R22 3 R23 0 R24 *NP 0 R25 *NP 1 R26 1 R27 1 R28 1 R29 1 T1 1 U1 1 U2 1 U3 1 U4 68 Total
520 uH,xA, Powdered Iron Core, Toroidal, 4 Pin Custom NPN, Small Signal BJT, 80 V, 0.5 A, TO-92 MPSA06 619 k, 1%, 1/8 W, Metal Film, 0805 100 k, 5%, 1/4 W, Metal Film, 1206 100 R, 5%, 1/8 W, Metal Film, 0805 10 R, 5%, 1/10 W, Metal Film, 0603 100 R, 5%, 1/10 W, Metal Film, 0603 1 R, 1%, 1/16 W, Metal Film, 0603 150 R, 5%, 1/10 W, Metal Film, 0603 8.66 k, 1%, 1/16 W, Metal Film, 0603 15.8 k, 1%, 1/4 W, Metal Film, 1206 10 k, 1%, 1/8 W, Metal Film, 0805 1 k, 5%, 1/10 W, Metal Film, 0603 9.53 k, 1%, 1/4 W, Metal Film, 1206 10 R, 5%, 1/10 W, Metal Film, 0603 1.5 k, 5%, 1/8 W, Metal Film, 0805 150 k, 1%, 1/16 W, Metal Film, 0603 1 R, 5%, 1/8 W, Metal Film, 0805 26.1 k, 1%, 1/4 W, Metal Film 10 k, 1%, 1/4 W, Metal Film 3.3 k, 5%, 1/8 W, Carbon Film Bobbin, EFD20, Horizontal, 8 pins DPA-Switch, DPA423P, DIP-8 ERJ-6ENF6193V ERJ-8GEYJ104V ERJ-6GEYJ101V ERJ-3GEYJ106V ERJ-3GEYJ101V ERJ-3EKF1004V ERJ-3GEYJ151V ERJ-3EKF8661V ERJ-8ENF1582V ERJ-6ENF1002V ERJ-3GEYJ102V ERJ-8ENF9531V ERJ-3GEYJ100V ERJ-6GEYJ152V ERJ-3EKF1503V ERJ-6GEYJ1R0V MFR-25FBF-26K1 MFR-25FBF-10K0 CFR-12JB-3K3 YW-272-03B DPA423P
Custom Fairchild Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Yageo Yageo Yageo Yih-Hwa Enterprises Power Integrations Isocom, Sharp National Semiconductor Texas Instruments
Opto coupler, 35 V, CTR 80-160%, 4-DIP ISP817A, PC817X1 2.495 V Shunt Regulator IC, 2%, -40 to 85C, SOT23 LM431AIM 2.495 V Shunt Regulator IC, 2%, 0 to 70C, TO-92 TL431CLP
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10 W VoIP
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6
Layout
Figure 2 - PC-Board Layout (see schematic for *MP and *NP parts)
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7 Transformer Design Spreadsheet
DCDC_DPASwitch_ 061704; Rev.1.11; Copyright Power Integrations Inc. 2004 DPASwitch_Flyback_061704 - Continuous/Discontinuous mode Spreadsheet. Copyright 2004 Power Integrations
INPUT
INFO
OUTPUT UNITS Volts Volts Volts Watts 0.7
ENTER APPLICATION VARIABLES
VDCMIN VDCMAX VO PO n Z VB 37 57 3.3 10 Comment 0.8 14
App140569 - EFD20 - 010605a
Minimum DC Input Voltage Maximum DC Input Voltage Output Voltage Verify temperature rise for continuous power. P and G packages may be thermally limited Efficiency Estimate Loss Allocation Factor, (0.7 Recommended) Bias Voltage (Recommended between 12V and 18V)
Volts
UV AND OV PARAMETERS
VUVOFF VUVON VOVON VOVOFF RL
min 30.8802 33.11235 77.1176 max 34.06899 35.66338 97.52584 637.7573 Volts Volts Volts Volts k-Ohms Minimum undervoltage On-Off threshold Maximum undervoltage Off-On threshold (turn-on) Minimum overvoltage Off-On threshold Maximum overvoltage On-Off threshold (turn-off)
ENTER DPASWITCH VARIABLES
DPASWITCH Chosen Device ILIMITMAX Frequency fS VOR KI ILIMITEXT RX VDS VD VDB KRP/KDP DPA423P #N/A #N/A F #N/A 38 0.80
16VDC Power Out 6W 1.34 Amps Hertz 38 Volts 0.8 0.928 Amps 9.501216 k-Ohms Volts Volts Volts 36 VDC 13W From DPASWITCH Data Sheet Enter 'F' for fS = 400KHz and 'L' for fS = 300KHz DPASWITCH Switching Frequency Reflected Output Voltage Current Limit Reduction Factor Minimum External Current limit Resistor from X pin to source to set external current limit DPASWITCH on-state Drain to Source Voltage Output Winding Diode Forward Voltage Drop Bias Winding Diode Forward Voltage Drop Ripple to Peak Current Ratio (0.2 < KRP < 1.0 : 1.0< KDP<6.0)
1 0.45 0.7 0.40
ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES
Core Type Core Manuf Bobbin Manuf Core Bobbin AE LE AL BW M L NS efd20
Selected Transformer Core
EFD20 EFD20_Bob 0.31 4.7 1200 13.5
0 2 3
P/N: P/N: cm^2 cm nH/T^2 mm mm
EFD20-3F3-Exxx-xx CPHS-EFD20-1S-10P-T Core Effective Cross Sectional Area Core Effective Path Length Ungapped Core Effective Inductance Bobbin Physical Winding Width Safety Margin Width (Half the Primary to Secondary Creepage Distance) Number of Primary Layers Number of Secondary Turns
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CURRENT WAVEFORM SHAPE PARAMETERS
DMAX IAVG IP IR IRMS
0.513514 0.337838 0.822368 0.328947 0.476332 Maximum Duty Cycle Amps Amps Amps Amps Average Primary Current Peak Primary Current Primary Ripple Current Primary RMS Current
TRANSFORMER PRIMARY DESIGN PARAMETERS
LP NP NB ALG BP BM BAC ur LG BWE
144.7851 30.4 11.76 156.6667 1425.727 1263.441 252.6882 1447.793 0.216191 27 uHenries Primary Inductance Primary Winding Number of Turns Bias Winding Number of Turns Gapped Core Effective Inductance Peak Flux density during transients (Limit to 3000 Gauss) Maximum Flux Density AC Flux Density for Core Loss Curves (0.5 X Peak to Peak) Relative Permeability of Ungapped Core Gap Length (Lg >> 0.051 mm) Effective Bobbin Width
nH/T^2 Gauss Gauss Gauss mm mm
TRANSFORMER SECONDARY DESIGN PARAMETERS
ISP ISRMS IO IRIPPLE
8.333333 4.698092 3.030303 3.590172 Amps Amps Amps Amps Peak Secondary Current Secondary RMS Current Power Supply Output Current Output Capacitor RMS Ripple Current
VOLTAGE STRESS PARAMETERS
VDRAIN PIVS PIVB
156.8 Volts 8.925 Volts 36.05 Volts Maximum Drain Voltage (Includes Effect of Leakage Inductance) Output Rectifier Maximum Peak Inverse Voltage Bias Rectifier Maximum Peak Inverse Voltage
ADDITIONAL OUTPUTS
V_OUT2 VD_OUT2 N_OUT2 PIV_OUT2 V_OUT3 VD_OUT3 N_OUT3 PIV_OUT3 1.7330 0.8000
Volts Volts 2.0264 5.5325 Volts Volts Volts 6.08 18.3 Volts Auxiliary Output Voltage Auxiliary Diode Forward Voltage Drop Auxiliary Number of Turns Auxiliary Rectifier Maximum Peak Inverse Voltage Auxiliary Output Voltage Auxiliary Diode Forward Voltage Drop Auxiliary Number of Turns Auxiliary Rectifier Maximum Peak Inverse Voltage
6.9 0.7
Note1: the output Vout2 is DC-stacked on top of Vout1 (after the Vout1 rectifier diode), the output Vout3 is AC-stacked on top of the Vout2 winding (before Vout2 rectifier diode).
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10 W VoIP
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8 Transformer Specification
8.1 Transformer Winding
FL2 (J4) W1: 30T 1 x 27 AWG 4 FLOAT W3: 1.5T FOIL ** . 2 W5: 2T 3 x 27 AWG 6 7 1 2 W2: 12T 1 x 36 AWG W4: 3T 4 x 27 AWG 5 W6: 6T 1 x 27 AWG FL1 (J3) 8
3
Figure 3 - Transformer Electrical Diagram (** denotes reverse wound)
8.2
Electrical Specifications
Non-isolated Pins 3-4, all other windings open, measured at 300 kHz, 0.4 VRMS Pins 3-4, all other windings open Pins 3-4, with Pins 5,6,7,8 shorted, measured at 300 kHz, 0.4 VRMS N/A 145 H, 0/+20% 5 MHz (Min.) 5 uH (Max.)
Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance
8.3
Materials
Description Core: EFD20 ALG=157 nH/t^2 (core 3F3 material) Bobbin: EFD20 8-pin horizontal 27AWG Doubled insulated 36 AWG Doubled insulated 1 mil foil Prepared foil - see assembly diagram. Tape: Varnish
Item [1] [2] [3a] [3b] [3c] [4] [6] [8]
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DER-96 8.4
10 W VoIP
September 12, 2005
Transformer Build Diagram
Tape FL1 FL2 6 8 5 7 W5 W4 Tape Tape W6 Tape
2 2 1 3 4
W3 W2 Tape W1
Figure 4 - Transformer Build Diagram
8.5
Transformer Construction
W1 Tape W2 Tape W3 Tape W4 W5 Tape W6 Outer Wrap Core Ground Final Assembly Start at Pin 4. Wind 30 turns item [3a]. Finish on pin 3 Use layer of item [6]. Start at Pin 1. Wind 12 turns item [3b]. Spread evenly across bobbin. Finish on pin 2 Use layer of item [6]. Start at Pin 2. Wind reverse direction 1.5 turns of item [4]. Finish winding and leave floating in stack. Use layer of item [6]. Start at Pins 7. Wind 3 turns quad-filar item [3a]. Spread evenly across bobbin. Finish temporarily on pin 1. Start at Pin 8. Wind 2 turns tri-filar item [3a]. Spread evenly across bobbin, filling in the gaps in the previous W3. Finish on pin 6. Move temporary connection from Pin 1 to Pin 5. Use layer of item [6]. Start at FL2. Wind 6 turns item [3a]. Spread evenly across bobbin. Finish on FL1. Wrap windings with 3 layers of tape [item [7]. Use copper self-adhesive tape touching core on all four sides. Make connection from this tape to pin 2 of bobbin. Note: this is not a "bellyband", this is instead purely to electrically ground the core Assemble and secure core halves. Varnish impregnate (item [8]).
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September 12, 2005
8.5.1 WD#3 Copper Foil build diagram:
Cu Foil 1mil; 13 mm W x 46mm L 1-layer tape folded
44mm 30 AWG
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9 Inductor Specification
9.1 Inductor Winding
4 2 3
W1: 15T 1 x 27 AWG
W2: 15T 1 x 27 AWG
1
Figure 5 - Inductor Electrical Diagram
9.2
Electrical Specifications
Non-isolated Pins 4-2, all other windings open, measured at 300 kHz, 0.4 VRMS Pins 4-2, all other windings open Pins 4-2, with Pins 1,2,3,5,6,8 shorted, measured at 300 kHz, 0.4 VRMS N/A 520 H, -0/+20% 3.9 MHz (Min.) 3.5 uH (Max.)
Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance
9.3
Materials
Description Core: Fair-rite - 5975000201 (diameter 9.5mm, Al=4400) Bobbin - 8 pin former 27AWG Doubled insulated Hot-set glue
Item [1] [2] [3a] [8]
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9.4
Inductor Footprint Diagram
Figure 6 - Transformer Footprint - Top Side View Diagram
9.5
Inductor Construction
W1 W2 Outer Wrap Final Assembly Start at Pin 2. Wind 15 turns item [3a]. Finish on pin 4 Start at Pin 1. Wind 15 turns item [3a]. Finish on pin 3 Wrap windings with 3 layers of tape [item [7]. Assemble and secure core halves. Impregnate (item [8]).
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10 W VoIP
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10 Performance
10.1 Efficiency
Efficiency vs Line/Load
80%
70% Efficiency (%)
60%
37 VDC 48 VDC 57 VDC
50%
40% 0 2 4 6 8 10 Pout (W) 12 14 16
Figure 7 - Efficiency vs. Input Voltage and Output Load, Room Temperature
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DER-96 10.2 Regulation vs. Load
10 W VoIP
September 12, 2005
Regulation vs Load
107.0%
Re gu 102.0% lat io 99.5% n (% 97.0% )
94.5% 92.0% 0 2 4 6 8 10 12
104.5%
3.3 V 37 VDC 57 3.3 V VAC 5 V 37 VDC 5 V 57 VDC
14
16
Pout (W)
Figure 8 - Output Regulation vs. Output Load for 3.3 V and 5 V Outputs, Room Temperature
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DER-96 10.3 Regulation vs. Load
10 W VoIP
September 12, 2005
Regulation vs Load
105.0%
Regulation (%)
102.5%
12V 37 VDC
100.0%
12V 57 VDC
97.5%
95.0% 0 2 4 6 8 10 12 14 16
Pout (W)
Figure 9 - Output Regulation vs. Output Load for 12 V Output, Room Temperature
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September 12, 2005
10.4 Raw Performance Data It can be seen from the data below, that the power supply meets the regulation requirements even without need for a linear-regulator on the 5 V output. Also the efficiency of 70.5% at 48 VDC very high compared to alternate solutions.
Vin (DC) 37.6 37.6 37.6 37.6 37.6 37.6 37.6 37.6 37.5 37.5 37.5 37.5 48.2 48.2 48.2 48.1 48.1 48.1 48.1 48.1 48.1 48.1 48.1 48.1 57.6 57.6 57.6 57.6 57.6 57.6 57.6 57.6 57.5 57.5 57.5 57.5 Iin (A) 0.021 0.103 0.05 0.139 0.08 0.16 0.12 0.196 0.277 0.335 0.325 0.377 0.019 0.083 0.042 0.113 0.061 0.128 0.097 0.156 0.214 0.261 0.249 0.292 0.017 0.069 0.038 0.097 0.051 0.11 0.083 0.134 0.181 0.219 0.207 0.245 Max Min Delta Vout1 (V) 3.3 3.25 3.31 3.29 3.24 3.23 3.28 3.27 3.2 3.2 3.23 3.22 3.3 3.25 3.31 3.28 3.24 3.23 3.28 3.27 3.2 3.2 3.23 3.23 3.3 3.25 3.31 3.28 3.24 3.23 3.28 3.27 3.2 3.2 3.23 3.23 3.31 3.2 0.11 Iout1 (A) 0 0 0 0 0.5 0.5 0.5 0.5 2 2 2 2 0 0 0 0 0.5 0.5 0.5 0.5 2 2 2 2 0 0 0 0 0.5 0.5 0.5 0.5 2 2 2 2 0.3% -3.0% 3.3% Vout2 (V) 5.02 5.11 5.02 5.05 5.14 5.14 5.07 5.06 5.19 5.18 5.13 5.12 5.04 5.11 5.01 5.05 5.14 5.14 5.07 5.08 5.18 5.18 5.11 5.12 5.04 5.12 5.01 5.05 5.14 5.14 5.07 5.07 5.18 5.18 5.12 5.12 5.19 5.02 0.17 Iout2 (A) 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 0 0 0.2 0.2 3.8% 0.4% 3.4% Vout3 (V) 11.84 11.21 12.54 11.48 12.48 11.46 12.52 11.66 12.48 12.06 12.52 12.25 11.87 11.23 12.55 11.48 12.48 11.44 12.52 11.64 12.47 11.94 12.51 12.12 11.86 11.23 12.55 11.47 12.48 11.44 12.52 11.62 12.48 11.88 12.51 12.05 12.54 11.21 1.33 Iout3 (A) 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 0 0.2 4.5% -6.6% 11.1%
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DER-96
Vnom1= Vnom2= %Vout1 (%) 100.0% 98.5% 100.3% 99.7% 98.2% 97.9% 99.4% 99.1% 97.0% 97.0% 97.9% 97.6% 100.0% 98.5% 100.3% 99.4% 98.2% 97.9% 99.4% 99.1% 97.0% 97.0% 97.9% 97.9% 100.0% 98.5% 100.3% 99.4% 98.2% 97.9% 99.4% 99.1% 97.0% 97.0% 97.9% 97.9% 100.3% 97.0% 3.3% 3.3 Vnom3= 5 %Vout2 %Vout3 (%) (%) 100.4% 102.2% 100.4% 101.0% 102.8% 102.8% 101.4% 101.2% 103.8% 103.6% 102.6% 102.4% 100.8% 102.2% 100.2% 101.0% 102.8% 102.8% 101.4% 101.6% 103.6% 103.6% 102.2% 102.4% 100.8% 102.4% 100.2% 101.0% 102.8% 102.8% 101.4% 101.4% 103.6% 103.6% 102.4% 102.4% 103.8% 100.4% 3.4% 98.7% 93.4% 104.5% 95.7% 104.0% 95.5% 104.3% 97.2% 104.0% 100.5% 104.3% 102.1% 98.9% 93.6% 104.6% 95.7% 104.0% 95.3% 104.3% 97.0% 103.9% 99.5% 104.3% 101.0% 98.8% 93.6% 104.6% 95.6% 104.0% 95.3% 104.3% 96.8% 104.0% 99.0% 104.3% 100.4% 104.5% 93.4% 11.1%
10 W VoIP
12 Pin (W) 0.7896 3.8728 1.88 5.2264 3.008 6.016 4.512 7.3696 10.3875 12.5625 12.1875 14.1375 0.9158 4.0006 2.0244 5.4353 2.9341 6.1568 4.6657 7.5036 10.2934 12.5541 11.9769 14.0452 0.9792 3.9744 2.1888 5.5872 2.9376 6.336 4.7808 7.7184 10.4075 12.5925 11.9025 14.0875 14.1 1.9 12.3 Eff (%) 0.0% 57.9% 53.4% 63.3% 53.9% 64.9% 58.8% 67.6% 61.6% 70.1% 61.4% 70.1% 0.0% 56.1% 49.5% 60.8% 55.2% 63.4% 56.9% 66.4% 62.2% 70.0% 62.5% 70.5% 0.0% 56.5% 45.8% 59.1% 55.1% 61.6% 55.5% 64.4% 61.5% 69.7% 62.9% 70.2% 70.1% 53.4% 16.7% Pout1 (W) 0.0 0.0 0.0 0.0 1.6 1.6 1.6 1.6 6.4 6.4 6.5 6.4 0.0 0.0 0.0 0.0 1.6 1.6 1.6 1.6 6.4 6.4 6.5 6.5 0.0 0.0 0.0 0.0 1.6 1.6 1.6 1.6 6.4 6.4 6.5 6.5 Pout2 (W) 0.0 0.0 1.0 1.0 0.0 0.0 1.0 1.0 0.0 0.0 1.0 1.0 Pout3 (W)
September 12, 2005
Pout6 (W) 0.0 2.2 0.0 2.3 0.0 2.3 0.0 2.3 0.0 2.4 0.0 2.5 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0
Pout (W) 0.0 2.2 1.0 3.3 1.6 3.9 2.7 5.0 6.4 8.8 7.5 9.9 0.0 2.2 1.0 3.3 48 1.6 3.9 2.7 5.0 6.4 8.8 7.5 9.9 0.0 2.2 1.0 3.3 1.6 3.9 2.7 5.0 6.4 8.8 7.5 9.9 9.9 1.0
0.0 0.0 0.0 0.0 2.2 0.0 1.0 0.0 0.0 1.0 2.3 0.0 High efficiency at 0.0 0.0 0.0 0.0 2.3 VDC full load 0.0 1.0 0.0 0.0 1.0 2.3 0.0 0.0 0.0 0.0 0.0 2.4 0.0 1.0 0.0 0.0 1.0 2.4 0.0 0.0 0.0 1.0 1.0 0.0 0.0 1.0 1.0 0.0 0.0 1.0 1.0 0.0 2.2 0.0 2.3 0.0 2.3 0.0 2.3 0.0 2.4 0.0 2.4 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0
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DER-96 10.5 Thermal Performance
10 W VoIP
September 12, 2005
Temperature Vs Time
100
Ch1 - U1 Ch2 - Amb Ch3 - C11
Temperature ('C)
80 60 40 20 0 1 10 100
Ch4 - D8 Ch5 - T1
Time (min)
Figure 10 - Thermal Performance of Key Power Supply Components
Time (Mins.) 0 1 2 4 8 16 37 66 132 U1 (Drain) ('C) 24 44 47 60 63 73 66 73 66 Amb ('C) 24 24 24 24 24 25 26 26 26
Temperature C11 ('C) 25 27 31 36 44 49 51 50 49
D8 ('C) 25 43 49 52 63 64 70 65 71
T1 ('C) 25 30 35 41 52 58 61 61 62
Figure 11 - Raw Test Data
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DER-96
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September 12, 2005
11 Waveforms
11.1 Drain Current and Voltage
Figure 12 - 37 VDC, full load Upper Ch3: Drain Voltage 50 V, Lowr Ch4: Drain Current 0.5 A / Div, 1 s / div
Figure 13 - 48 VDC, full load Upper Ch3: Drain Voltage 50 V, Lowr Ch4: Drain Current 0.5 A / Div, 1 s / div
Figure 14 - 57 VDC, full load Upper Ch3: Drain Voltage 50 V, Lowr Ch4: Drain Current 0.5 A / Div, 1 s / div
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DER-96
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September 12, 2005
11.2 Output Transient Load Response
Figure 15 - 48 VDC, full load (3.3 V 1.6 A to 2.0 A step) 3.3 V Output Voltage 50 mV / Div, 10 ms / div
Figure 16 - 48 VDC, full load (5 V 0.16 A to 0.2 A step) 5 V Output Voltage 20 mV / Div, 10 ms / div
Figure 17 - 48 VDC, full load (12 V 0.16 A to 0.2 A step) 12 V Output Voltage 50 mV / Div, 10 ms / div
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DER-96
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September 12, 2005
11.3 Output Ripple Voltage It can be seen from the waveforms below that the power supply comfortably meets the output ripple specifications. This is possible even without the need for an output inductor. Measurements made with 0.1 uF ceramic capacitor in parallel with a 1 uF / 50 V electrolytic capacitor, and also made using very short lead length connections to the output pins of the power supply.
Figure 18 - 48 VDC, Full Load 3.3 V Output Ripple, 50 mV, 2 s / div
Figure 19 - 48 VDC, Full Load 5V Output Ripple, 50 mV, 2 s / div
Figure 20 - 48 VDC, Full Load 12 V Output Ripple, 50 mV, 2 s / div
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DER-96
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September 12, 2005
11.4 Output Voltage Start-up Profile
Figure 21 - 3.3 V Start-up at No Load, 48 VDC Upper Ch1: 3.3 V output, 1 V / div, Lower Ch3: Drain Voltage 50 V / div, 20 ms / div.
Figure 22 - 3.3 V Start-up at Full Load, 48 VDC Upper Ch1: 3.3 V output, 1 V / div, Lower Ch3: Drain Voltage 50 V / div, 20 ms / div.
Figure 23 - 5 V Start-up at No Load, 48 VDC Upper Ch1: 5 V output, 2 V / div, Lower Ch3: Drain Voltage 50 V / div, 20 ms / div.
Figure 24 - 5 V Start-up at Full Load, 48 VDC Upper Ch1: 5 V output, 2 V / div, Lower Ch3: Drain Voltage 50 V / div, 20 ms / div.
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DER-96
10 W VoIP
September 12, 2005
Figure 25 - Start-up Profile at No Load, 48 VDC Upper Ch1: 12 V output, 2 V / div, Lower Ch3: Drain Voltage 50 V / div, 20 ms / div.
Figure 26 - Start-up Profile at Full Load, 48 VDC Upper Ch1: 12 V output, 2 V / div, Lower Ch3: Drain Voltage 50 V / div, 20 ms / div.
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DER-96
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September 12, 2005
12 Conducted EMI
EMI was tested at room temperature and at 230 VAC input. An AC-DC (48 V output) adapter was plugged into the LISN (AC-output). The DC-DC converter (using DPA423 was plugged into the 48 VDC output from the AC-DC adapter. In some tests the output of the DC-DC converter was left floating and in other cases the output (0 VDC) was connected to Earth ground. 12.1 230V High Line EMI
Figure 27 - 230 VAC - N1 - full system grounded output - full-load
Figure 28 - 230 VAC - L1 - full system grounded output - full-load
Figure 29 - 230 VAC - N1 - full system floating output - full-load
Figure 30 - 230 VAC - L1 - full system floating output - full-load
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DER-96
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September 12, 2005
13 Radiated EMI scans
As can be seen from the radiated EMI scans below, the new board performs extremely well compared to the original DPA423 power supply. This is because of optimal layout and power supply filtering (including transformer shielding design). The measurements were made in an open-field test site, with the AC-adapter (which outputs 48 VDC). This AC-adapter was connected to 115 VAC via a LISN and the output 48 VDC was input to the DPA423 DC-DC converter.
Local baseline radio interferance
Figure 31 - Radiated no-power Baseline
Figure 32 - Original board with DPA423 and ACadapter (230 VAC) - Output Floating
Figure 33 - New prototype board using DPA423 and AC-adapter (230 VAC) - Output Floating
Figure 34 - New prototype board using DPA423 and AC-adapter (230 VAC) - Output Hard Grounded
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DER-96
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September 12, 2005
14 Revision History
Date September 12, 2005 Author RM Revision 1.0 Description & changes Initial release Reviewed VC / AM
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DER-96
10 W VoIP
September 12, 2005
For the latest updates, visit our Web site: www.powerint.com
Power Integrations may make changes to its products at any time. Power Integrations has no liability arising from your use of any information, device or circuit described herein nor does it convey any license under its patent rights or the rights of others. POWER INTEGRATIONS MAKES NO WARRANTIES HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
PATENT INFORMATION The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com.
The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, and EcoSmart are registered trademarks of Power Integrations. PI Expert and DPA-Switch are trademarks of Power Integrations. (c) Copyright 2004, Power Integrations.
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WORLD HEADQUARTERS 5245 Hellyer Avenue, San Jose, CA 95138, USA Main: +1-408-414-9200 Customer Service: Phone: +1-408-414-9665 Fax: +1-408-414-9765 e-mail: usasales@powerint.com CHINA (SHANGHAI) Rm 807, Pacheer, Commercial Centre, 555 Nanjing West Road, Shanghai, 200041, China Phone: +86-21-6215-5548 Fax: +86-21-6215-2468 e-mail: chinasales@powerint.com CHINA (SHENZHEN) Rm# 1705, Bao Hua Bldg. 1016 Hua Qiang Bei Lu, Shenzhen, Guangdong, 518031, China Phone: +86-755-8367-5143 Fax: +86-755-8377-9610 e-mail: chinasales@powerint.com APPLICATIONS HOTLINE World Wide +1-408-414-9660 GERMANY Rueckertstrasse 3, D-80336, Munich, Germany Phone: +49-895-527-3910 Fax: +49-895-527-3920 e-mail: eurosales@powerint.com JAPAN Keihin-Tatemono 1st Bldg. 12-20 Shin-Yokohama, 2-Chome, Kohoku-ku, Yokohama-shi, Kanagawa 222-0033, Japan Phone: +81-45-471-1021 Fax: +81-45-471-3717 e-mail: japansales@powerint.com KOREA 8th Floor, DongSung Bldg. 17-8 Yoido-dong, Youngdeungpo-gu, Seoul, 150-874, Korea Phone: +82-2-782-2840 Fax: +82-2-782-4427 e-mail: koreasales@powerint.com SINGAPORE 51 Newton Road, #15-08/10 Goldhill Plaza, Singapore, 308900 Phone: +65-6358-2160 Fax: +65-6358-2015 e-mail: singaporesales@powerint.co m TAIWAN 17F-3, No. 510, Chung Hsiao E. Rd., Sec. 5, Taipei, Taiwan 110, R.O.C. Phone: +886-2-2727-1221 Fax: +886-2-2727-1223 e-mail: taiwansales@powerint.com
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ER or EPR template - Rev 3.6 - Single sided
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