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| Datasheet File OCR Text: |
| N-Channel Enhancement Mode MOSFET Switch CORPORATION 3N170 / 3N171 FEATURES HANDLING PRECAUTIONS MOS field-effect transistors have extremely high input resistance and can be damaged by the accumulation of excess static charge. To avoid possible damage to the device while wiring, testing, or in actual operation, follow the procedures outlined below. 1. To avoid the build-up of static charge, the leads of the devices should remain shorted together with a metal ring except when being tested or used. 2. Avoid unnecessary handling. Pick up devices by the case instead of the leads. TO-72 * Low Switching Voltages * Fast Switching Times Drain-Source Resistance * Low Reverse Transfer Capacitance * Low PIN CONFIGURATION 3. Do not insert or remove devices from circuits with the power on as transient voltages may cause permanent damage to the devices. ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) D C,B G S 1003 Drain-Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V Drain-Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -55oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 2.4mW/ oC NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING INFORMATION Part 3N170-71 X3N170-71 Package Hermetic TO-72 Sorted Chips in Carriers Temperature Range -55oC to +150oC -55oC to +150oC 3N170 / 3N171 CORPORATION ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified) Substrate connected to source. SYMBOL BVDSS IGSS PARAMETER Drain-Source Breakdown Voltage Gate Leakage Current MIN 25 10 100 IDSS Zero-Gate-Voltage Drain Current 3N170 3N171 ID(on) VDS(on) rds(on) | Yfs | Crss Ciss Cd(sub) td(on) tr td(off) tf "ON" Drain Current Drain-Source "ON" Voltage Drain-Source ON Resistance Forward Transfer Admittance Reverse Transfer Capacitance (Note 1) Input Capacitance (Note 1) Drain-Substrate Capacitance (Note 1) Turn-On Delay Time (Note 1) Rise Time (Note 1) Turn-Off Delay Time (Note 1) Fall Time (Note 1) 1000 1.3 5.0 5.0 3.0 10 3.0 15 ns VDD = 10V, ID(on) = 10mA, VGS(on) = 10V, VGS(off) = 0, RG = 50 pF 1.0 1.5 10 2.0 200 10 1.0 VGS(th) Gate-Source Threshold Voltage 2.0 3.0 mA V S VGS = 10V, VDS = 10V ID = 10mA, VGS = 10V VGS = 10V, ID = 0, f = 1kHz VDS = 10V, ID = 2.0mA, f = 1kHz VDS = 0, VGS = 0, f = 1MHz VDS = 10V, VGS = 0, f = 1MHz VD(SUB) = 10V, f = 1MHz nA A V MAX UNITS V pA TEST CONDITIONS ID = 10A, VGS = 0 VGS = 35V, VDS = 0 VGS = 35V, VDS = 0, TA = 125 oC VDS = 10V, VGS = 0 TA = 125oC VDS = 10V, ID = 10A NOTE 1: For design reference only, not 100% tested. |
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