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| For Communications Equipment MN86157 Shading Correction LSI Overview The MN86157 contains a 7-bit A/D converter for use in correcting, at the bit level, shading distortion for signals from image sensors, optics, and similar sources. It uses external RAM to support adaptive correction that responds to changes in distortion patterns. It also uses ROM to provide fixed correction when a white reference plane signal is not available. The chip is also usable as a stand-alone A/D converter. Pin Assignment Features Choice of correction range (50% or 75%) depending on extent of shading distortion Parallel A/D converter functions Resolution: 7 bits Non-linearity: 1/2 LSB Conversion speed: max. 5 MHz Note: This is the guaranteed design value for the chip used as a stand-alone A/D converter. The guaranteed value at shipment is 3 LSB Ability to start and stop clock in the middle of a line to support CdS contacting image sensors and other devices with variable scanning rates Overflow pin that simplifies task of adding auto background control (ABC) circuit Single 5 volt power supply Guaranteed TTL levels for input Applications Facsimile equipment D5 D6 ROS MOE OVF/DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 2 3 4 5 6 7 8 9 10 11 A5 A4 A3 A2 A1 A0 D0 D1 D2 D3 D4 34 35 36 37 38 39 40 41 42 43 44 33 32 31 30 29 28 27 26 25 24 23 A6 A7 A8 A9 A10 A11 N.C. MODE ENBO CKSH ENBI 22 21 20 19 18 17 16 15 14 13 12 SHST R/W INHI VSS VDD N.C. VREFL VIN VREFH VDD OE (TOP VIEW) QFP044-P-1010 MN86157 SHADING CORRECTOR LSI 7 12 7 7 Multiplier 7 7 6 Selector DB0 to 5 5 OVF/DB6 Block Diagram VR OE VREFH Selector ADC VREFL 7 DistortionCoefficient ROM Controller 7 7 CKSH ENBI SHST INHI MODE 25 12 7 D0 to 6 A0 to 11 Selector 24 23 22 20 26 3 ROS 13 18 19 VDD VDD ENBO VSS 21 R/W For Communications Equipment 4 MOE RAM or ROM For Communications Equipment MN86157 Block Configuration The MN86157 consists of four basic blocks: (1) A/D converter, (2) distortion coefficient mapping ROM, (3) multiplier, and (4) controller. The following are brief descriptions of each block. (1) A/D converter This uses comparison with the reference voltages to convert the scanner's image data signal from the VIN pin to a 7-bit digital output. (2) Distortion coefficient mapping ROM This constitutes a look-up table for converting the A/D converter output to a final value for storage in the external RAM. (3) Multiplier This provides high-speed parallel multiplication of 7 x 7 bits data. (4) Controller This controls operation of the shading correction circuits, the A/D converter, and interface to external ROM or RAM. MN86157 Operation Shading correction (MODE pin at "H" level) * Fixed distortion coefficients (external memory is ROM) This configuration provides 6-bit corrected data using fixed distortion coefficients stored in an external ROM and thus invariant. * Adaptive distortion coefficients (external memory is RAM) This configuration provides 6-bit corrected data using distortion coefficients, stored in external RAM, that the chip constantly updates using white reference plane line training. * Pixels per line The chip supports line lengths up to 4096 pixels with a built-in 12-bit address counter supporting interfaces to two 211 x 8-bit RAM chips or the equivalent of a 2732 ROM (212 x 8 bits). * Input clock The chip uses an input clock signal with a frequency twice that of the image clock. * Selecting correction range The ROS pin provides a choice of two correction ranges and consequently correction precisions. ROS H L * Correction Range 50% 75% Correction Precision 1.5% 3.0% * Correction start/stop function Pulling the INHI pin to "L" level in the middle of a line suspends correction and maintains the output data at its current value. Returning the pin to "H" level restarts correction. Auto clamp and overflow functions for output data If the image input signal level exceeds the white reference plane level, the chip clamps the output data at the full-scale value (3FH) and drives the overflow pin (OVF) at "H" level. MN86157 Stand-alone A/D converter (MODE pin at "L" level, A10 pin at "L" level) * In this configuration, the chip functions as a parallel A/D converter consisting of 128 chopper comparators. Resolution: 7 bits Non-linearity: 1/2 LSB Conversion speed: max. 5 MHz Analog input range: 3V p-p (VDD 5V) * Clock mode selection The A11 pin provides a choice of two clock modes. A11 CKSH: L SHST: CKSH: H ENBI: Input Clock Conditions Supply a clock signal with a frequency twice that of the input image clock. *1 Supply the A/D start signal for use in synchronizing phase. Supply a clock signal with a frequency twice that of the input image clock. *2 Supply a clock signal with the same frequency as the input image clock. Notes *1: ENBI *2: SHST: Keep this pin at "H" level. For Communications Equipment For Communications Equipment Pin Descriptions Parameter A/D converter block MULT converter block 5 12 CTL converter block 24 20 CKSH INHI I I 23 22 OVF/DB6 OE ENBI SHST O I I I Pin No. 15 14 16 11 to 6 Symbol VIN VREFH VREFL DB 0 to 5 I/O I -- -- O Function Description Analog image signal input Reference voltage input Reference ground Corrected image signal output /A/D converter data output Corrected image signal overflow Output enable signal input for DB0 - DB5 and OVF Enable signal input for single line Start input for reading white reference signal Clock signal input Signal for suspending correction in the middle of a line and holding the output at the current value 25 3 26 39 to 28 40 to 44, 1, 2 21 4 ENBO ROS MODE A 0 to 11 D 0 to 6 R/W MOE O Enable signal for corrected image data output I I O I/O O O Correction range selection Operating mode selection RAM/ROM address output RAM/ROM data I/O RAM read/write signal RAM/ROM output enable signal MN86157 Remarks "H" level reference voltage input "L" level reference voltage input MODE: H /MODE: L MODE: H H: Pins are high-impedance; L: Pins provide output Low pulse signals start. The frequency must be twice that of the image clock. H: Normal correction operation; L: Stop and hold output/A/D converter data output /MODE: L H: 50% correction; L: 75% correction H: Shading correction; L: A/D conversion only RAM /ROM IO converter block MN86157 Application Circuit Example #1: Using RAM For Communications Equipment DB0 to 5(O) RAM (4 Kilowords x 8 bits) VSS AG D6 GND AG to D0 VDD VDD R/W AVDD 5V MN86157 WE WE D0 to D6 VREF 5V ENBO(O) INHI(I) ROS (H/L) SHST(I) ENBI(I) CKSH(I) AG VR OE CS A0 to A10 ENBO MOE ROS SHST ENBI CKSH VIN A11 A10 to A0 MODE PIX OE CS A0 to A10 D0 to D6 RAM (4 Kilowords x 8 bits) DB5 to DB0 AG OE For Communications Equipment Application Circuit Example #2: Using ROM MN86157 DB5 to VSS GND DB0 to 5(O) DB0 AG AG OE D6 to D0 AVDD 5V AG VDD VDD D0 to VR OE A11 to A0 ENBO(O) INHI(I) ENBI(I) CKSH(I) ROS(H/L) ENBO INHI ENBI CKSH ROS SHST VIN A11 to A0 MODE MOE PIX CE ROM 2732 VREF 5V MN86157 AG D6 MN86157 Packing Dimensions (Unit: mm) QFP044-P-1010 For Communications Equipment 12.300.40 10.000.20 33 23 22 (1.00) 10.000.20 44 12 1 (1.00) 0.80 11 0.350.10 2.000.20 2.100.30 1.150.20 34 12.300.40 0.10 SEATING PLANE 0.100.10 0.15 -0.05 0.600.20 0 to 10 +0.10 |
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