| PART |
Description |
Maker |
| 9P936AGLF ICS9P936 9P936AFLF 9P936AFLFT 9P936AGLFT |
Low Skew Dual Bank DDR I/II Fan-out Buffer
|
Integrated Device Technology
|
| ISPPAC-CLK5610V-01T100I ISPPAC-CLK5610V-01T48C ISP |
In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
|
LATTICE[Lattice Semiconductor]
|
| ISPPACCLK5320S-01T48C ISPPACCLK5320S-01T48I ISPPAC |
In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended
|
Lattice Semiconductor
http://
|
| PLL102-108XM |
Programmable DDR Zero Delay Clock Driver 可编程复员零延迟时钟驱动
|
PhaseLink, Corp.
|
| W83176R-735 |
3 DIMM DDR ZERO DELAY BUFFER FOR SIS CHIPSET
|
http://
Winbond
|
| ICS93732 ICS93732FLF-T ICS93732G-T |
Low Cost DDR Phase Lock Loop Zero Delay Buffer
|
ICST[Integrated Circuit Systems]
|
| 1507 1507-100A 1507-100B 1507-100C 1507-150A 1507- |
Delay 50 /-2.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 300 /-15 ns, 10-TAP SIP delay line Td/Tr=5
Delay 200 /-10 ns, 10-TAP SIP delay line Td/Tr=5
Delay 250 /-13 ns, 10-TAP SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 100 /-5 ns, 10-TAP SIP delay line Td/Tr=5
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits 固定10抽头延迟线被动园
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits
Delay 40 /-2 ns, 10-TAP SIP delay line Td/Tr=5
Delay 500 /-25 ns, 10-TAP SIP delay line Td/Tr=5
Delay 20 /-2 ns, 10-TAP SIP delay line Td/Tr=5
|
Data Delay Devices Inc
|
| MDU12H-4MC3 MDU12H-250MC3 MDU12H-150MC3 MDU12H-30M |
Delay 200 /-10 ns, dual, ECL-interfaced fixed delay line
Delay 150 /-7.5 ns, dual, ECL-interfaced fixed delay line
Delay 250 /-12.5 ns, dual, ECL-interfaced fixed delay line
Delay 125 /-6.2 ns, dual, ECL-interfaced fixed delay line
Delay 100 /-5 ns, dual, ECL-interfaced fixed delay line
DUAL, ECL-INTERFACED FIXED DELAY LINE (SERIES MDU12H) ACTIVE DELAY LINE, TRUE OUTPUT, DSO16
|
DATA DELAY DEVICES INC
Data Delay Devices, Inc.
|
| IDT72T40108L6-7BB IDT72T40118L6-7BB IDT72T40118L6- |
64K x 40 TeraSync DDR FIFO, 2.5V
128K x 40 TeraSync DDR FIFO, 2.5V
2.5 VOLT HIGH-SPEED TeraSync?? DDR/SDR FIFO 40-BIT CONFIGURATION
16K x 40 TeraSync DDR FIFO, 2.5V
32K x 40 TeraSync DDR FIFO, 2.5V
|
IDT
|
| 3D7304 3D7304-25 3D7304-100 3D7304-15 3D7304-20 3D |
MONOLITHIC QUADRUPLE FIXED DELAY LINE
Delay 25 /-1 ns, monolithic quadruple fixed delay line
Delay 100 /-2 ns, monolithic quadruple fixed delay line
Delay 10 /-1 ns, monolithic quadruple fixed delay line
Delay 15 /-1 ns, monolithic quadruple fixed delay line
Delay 20 /-1 ns, monolithic quadruple fixed delay line
Delay 200 /-4 ns, monolithic quadruple fixed delay line
Delay 30 /-1 ns, monolithic quadruple fixed delay line
Delay 300 /-6 ns, monolithic quadruple fixed delay line
Delay 40 /-1 ns, monolithic quadruple fixed delay line
Delay 400 /-8 ns, monolithic quadruple fixed delay line
Delay 50 /-1 ns, monolithic quadruple fixed delay line
Delay 500 /-10 ns, monolithic quadruple fixed delay line
|
Data Delay Devices Inc
|
| MT46V32M8P-75ZATF MT46V16M16CV-5BK MT46V64M4 MT46V |
32M X 8 DDR DRAM, 0.75 ns, PDSO66 0.40 INCH, LEAD FREE,PLASTIC, TSOP-66
16M X 16 DDR DRAM, 0.7 ns, PBGA60
Double Data Rate (DDR) SDRAM
|
Micron Technology
|
| TC664 TC664EUN TC665 TC665EUN |
The TC665 is a single PWM mode fan speed controller with FanSense TM technology for use with brush-less DC motors. The device allows temperature proportional speed control and therefore accomplishes lower acoustic fan noise and longer fan
The TC664 is a single PWM mode fan speed controller with FanSense TM technology for use with brush-less DC motors. The device allows temperature proportional speed control and therefore accomplishes lower acoustic fan noise and longer fan
SMBus PWM Fan Speed Controllers With Fan Fault Detection
SMBus⑩ PWM Fan Speed Controllers With Fan Fault Detection
|
MICROCHIP[Microchip Technology]
|
