| Description |
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9 4096 or='#FF0000'>x 9 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9
RES,SMD,100,1%,0.063W,0603
High-speed double diode - Cd maor='#FF0000'>x.: 1.or='#FF0000'>5 pF; Configuration: dual c.c. ; IF maor='#FF0000'>x: 21or='#FF0000'>5 mA; IFSM maor='#FF0000'>x: 4 A; IR maor='#FF0000'>x: or='#FF0000'>500@VR=80V nA; IFRM: or='#FF0000'>500 mA; trr maor='#FF0000'>x: 4 ns; VFmaor='#FF0000'>x: 1@IF=or='#FF0000'>50mA mV; VR maor='#FF0000'>x: 80 V
Schottky barrier diode - Cd maor='#FF0000'>x.: 100@VR=4V pF; Configuration: single ; IF: 1 A; IFSM maor='#FF0000'>x: 2or='#FF0000'>5 A; IR maor='#FF0000'>x: 1@VR=2or='#FF0000'>5V mA; VFmaor='#FF0000'>x: 4or='#FF0000'>50@IF=1A mV; VR: 2or='#FF0000'>5 V
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9/ 4096 or='#FF0000'>x 9/ 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9
Trenchmos (tm) logic level FET - Configuration: Single N-channel ; I<sub>D</sub> DC: 0.34 A; R<sub>DS(on)</sub>: 3900@10Vor='#FF0000'>5300@4.or='#FF0000'>5V mOhm; V<sub>DS</sub>maor='#FF0000'>x: 60 V 异步fifo的CMOS 2048 × 9096 × 9192 × 96384 × 9
InsERT, COAor='#FF0000'>x FEMALE STRAIGHTInsERT, COAor='#FF0000'>x FEMALE STRAIGHT; Impedance:or='#FF0000'>50R; Coaor='#FF0000'>xial cable type:RG174AU/RG188AU/RG316AU 16K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 30 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 异步fifo的CMOS 2048 × 9096 × 9192 × 96384 × 9
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 16K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, CQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 16K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 16K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 20 ns, PQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 8K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 80 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 80 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 2or='#FF0000'>5 ns, CQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 8K or='#FF0000'>x 9 OTHER fifo, 20 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 20 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 8K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, CQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 20 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 20 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 6or='#FF0000'>5 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 6or='#FF0000'>5 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, CDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, PQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 2or='#FF0000'>5 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, or='#FF0000'>50 ns, PQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 4K or='#FF0000'>x 9 OTHER fifo, 6or='#FF0000'>5 ns, CQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 6or='#FF0000'>5 ns, CQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 6or='#FF0000'>5 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 80 ns, PDIP28
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 80 ns, CQCC32
CMOS ASYNCHRONOUS fifo 2048 or='#FF0000'>x 9, 4096 or='#FF0000'>x 9, 8192 or='#FF0000'>x 9 and 16384 or='#FF0000'>x 9 2K or='#FF0000'>x 9 OTHER fifo, 80 ns, CDIP28
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