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  k-bus Datasheet PDF File

For k-bus Found Datasheets File :: 26994    Search Time::1.375ms    
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    UPD31172 UPD31172F1-48-FN

NEC[NEC]
Part No. UPD31172 UPD31172F1-48-FN
OCR Text ...n) Date Published May 2000 N CP(K) Printed in Japan The mark shows major revised points. PD31172 ORDERING INFORMATION Part Number...Bus Arbitration Clock Select Autofeed Bus Acknowledge System Bus Clock Bus Request Busy Centronics D...
Description VRC4172TM COMPANION CHIP FOR VR4121TM

File Size 270.92K  /  44 Page

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    CY7C1311BV18-167BZC CY7C1311BV18-167BZI CY7C1311BV18-167BZXC CY7C1311BV18-167BZXI CY7C1311BV18-200BZC CY7C1311BV18-200BZ

Cypress Semiconductor
Part No. CY7C1311BV18-167BZC CY7C1311BV18-167BZI CY7C1311BV18-167BZXC CY7C1311BV18-167BZXI CY7C1311BV18-200BZC CY7C1311BV18-200BZI CY7C1311BV18-200BZXC CY7C1311BV18-200BZXI CY7C1311BV18-250BZI CY7C1311BV18-250BZXC CY7C1311BV18-250BZXI CY7C1311BV18-278BZC CY7C1311BV18-278BZI CY7C1311BV18-278BZXC CY7C1311BV18-278BZXI CY7C1311BV18-300BZC CY7C1311BV18-300BZI CY7C1311BV18-300BZXC CY7C1311BV18-300BZXI CY7C1315BV18 CY7C1315BV18-167BZC CY7C1315BV18-167BZI CY7C1315BV18-167BZXC CY7C1315BV18-167BZXI CY7C1315BV18-200BZC CY7C1315BV18-200BZI CY7C1315BV18-200BZXC CY7C1315BV18-200BZXI CY7C1315BV18-250BZC CY7C1315BV18-250BZI CY7C1315BV18-250BZXC CY7C1315BV18-250BZXI CY7C1315BV18-278BZC CY7C1315BV18-278BZI CY7C1315BV18-278BZXC CY7C1315BV18-278BZXI CY7C1315BV18-300BZC CY7C1315BV18-300BZI CY7C1315BV18-300BZXC CY7C1315BV18-300BZXI CY7C1313BV18 CY7C1313BV18-167BZC CY7C1313BV18-167BZI CY7C1313BV18-167BZXC CY7C1313BV18-167BZXI CY7C1313BV18-200BZC CY7C1313BV18-200BZI CY7C1313BV18-200BZXC CY7C1313BV18-200BZXI CY7C1313BV18-250BZC CY7C1313BV18-250BZI CY7C1313BV18-250BZXC CY7C1313BV18-250BZXI CY7C1313BV18-278BZC CY7C1313BV18-278BZI CY7C1313BV18-278BZXC CY7C1313BV18-278BZXI CY7C1313BV18-300BZC CY7C1313BV18-300BZI CY7C13
OCR Text ... at 300 MHz * Two input clocks (K and K) for precise DDR timing -- SRAM uses rising edges only * Two input clocks for output data (C and C) ...bus latches address inputs for both Read and Write ports * Separate Port Selects for depth expansion...
Description 18-Mbit QDR⑩-II SRAM 4-Word Burst Architecture

File Size 505.74K  /  28 Page

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    FUJITSU LTD
Part No. MBM29DL32BF70TN MBM29DL32BF70PBT
OCR Text ...ctor erase architecture eight 4 k word and sixty-three 32 k word sectors in word mode eight 8 k byte and sixty-three 64 k byte sectors in by...bus operation mbm29dl32tf/bf user bus operations table (word mode : b yte = v ih ) legend : l =...
Description 2M X 16 FLASH 3V PROM, 70 ns, PDSO48
2M X 16 FLASH 3V PROM, 70 ns, PBGA48

File Size 307.18K  /  70 Page

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    CY7C1314BV18-167BZC CY7C1314BV18-167BZI CY7C1314BV18-167BZXC CY7C1314BV18-167BZXI CY7C1314BV18-200BZC CY7C1314BV18-200BZ

Cypress Semiconductor
Part No. CY7C1314BV18-167BZC CY7C1314BV18-167BZI CY7C1314BV18-167BZXC CY7C1314BV18-167BZXI CY7C1314BV18-200BZC CY7C1314BV18-200BZI CY7C1314BV18-200BZXC CY7C1314BV18-200BZXI CY7C1314BV18-250BZC CY7C1314BV18-250BZI CY7C1314BV18-250BZXC CY7C1314BV18-250BZXI CY7C1312BV18-167BZC CY7C1312BV18-167BZI CY7C1312BV18-167BZXC CY7C1312BV18-167BZXI CY7C1312BV18-200BZC CY7C1312BV18-200BZI CY7C1312BV18-200BZXC CY7C1312BV18-200BZXI CY7C1312BV18-250BZC CY7C1312BV18-250BZI CY7C1312BV18-250BZXC CY7C1312BV18-250BZXI CY7C1910BV18-167BZC CY7C1910BV18-167BZI CY7C1910BV18-167BZXC CY7C1910BV18-167BZXI CY7C1910BV18-200BZI CY7C1910BV18-200BZXC CY7C1910BV18-200BZXI CY7C1910BV18-250BZI CY7C1910BV18-250BZXC CY7C1910BV18-250BZXI
OCR Text ...z) @ 250 MHz Two input clocks (K and K) for precise DDR timing SRAM uses rising edges only Functional Description The CY7C13...bus required with common IO devices. Access to each port is accomplished through a common address bu...
Description 18-Mbit QDR⑩-II SRAM 2 Word Burst Architecture

File Size 916.50K  /  28 Page

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    FUJITSU LTD
Part No. MBM29DL320BF70TR
OCR Text ...ctor erase architecture eight 4 k word and sixty-three 32 k word sectors in word mode eight 8 k byte and sixty-three 64 k byte sectors in by...bus operation mbm29dl320tf/bf user bus operations table (byte = v ih ) legend : l = v il , h ...
Description 2M X 16 FLASH 3V PROM, 70 ns, PDSO48

File Size 346.89K  /  71 Page

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    INTEGRATED SILICON SOLUTION INC
Part No. IS61LPS25632T-200TQI
OCR Text ...rity data i/o a b c d e f g h j k l m n p r t u v ddq nc nc dqc dqc v ddq dqc dqc v ddq dqd dqd v ddq dqd dqd nc nc v ddq a ce2 a nc dqc dqc...bus. a synchronous address inputs clk synchronous clock adsp synchronous processor address status ad...
Description 256K X 32 CACHE SRAM, 3.1 ns, PQFP100

File Size 176.18K  /  29 Page

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    PROMOS TECHNOLOGIES INC
Part No. V58C2512164SBI5 V58C2512804SBJ5 V58C2512804SBLE5
OCR Text ... fbga pin out a b c d e f g h j k l m v ssq nc nc v ddq dq 3 nc v ddq nc v ssq v dd nc dq 0 nc v ddq nc dq 1 v ssq nc nc nc v ddq nc ...bus row decoder memory array bank 1 column decoder sense amplifier & i(o) bus row decoder memory arr...
Description 32M X 16 DDR DRAM, 0.7 ns, PDSO66
64M X 8 DDR DRAM, 0.7 ns, PBGA60
64M X 8 DDR DRAM, 0.7 ns, PDSO66

File Size 923.94K  /  61 Page

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Part No. STF203-22.TC
OCR Text ... w o p e t a t s - y d a e t sp k p 0 0 1w m 2 - 4 - 0 0 0 1 6 c e i r e p e g r a h c s i d r i a d s ev p p 6 1v k 2 - 4 - 0 0 0 1 6 c e i...bus ). pin 2 is connected to ground. 2. 2. 2. 2. 2. low-speed devices : : : : : for low speed devi...
Description SUPPRESSOR CIRCUIT|TSSOP|6PIN|PLASTIC

File Size 166.86K  /  6 Page

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    CY7C1314CV18 CY7C1314CV18-167BZC CY7C1314CV18-167BZI CY7C1314CV18-167BZXC CY7C1314CV18-167BZXI CY7C1314CV18-200BZC CY7C1

Cypress Semiconductor
Part No. CY7C1314CV18 CY7C1314CV18-167BZC CY7C1314CV18-167BZI CY7C1314CV18-167BZXC CY7C1314CV18-167BZXI CY7C1314CV18-200BZC CY7C1314CV18-200BZI CY7C1314CV18-200BZXC CY7C1314CV18-200BZXI CY7C1312CV18 CY7C1312CV18-167BZC CY7C1312CV18-167BZI CY7C1312CV18-167BZXC CY7C1312CV18-167BZXI CY7C1312CV18-200BZC CY7C1312CV18-200BZI CY7C1312CV18-200BZXC CY7C1312CV18-200BZXI CY7C1910CV18 CY7C1910CV18-167BZC CY7C1910CV18-167BZI CY7C1910CV18-167BZXC CY7C1910CV18-167BZXI CY7C1910CV18-200BZC CY7C1910CV18-200BZI CY7C1910CV18-200BZXC CY7C1910CV18-200BZXI CY7C1910CV18-250BZC CY7C1910CV18-250BZI CY7C1910CV18-250BZXC CY7C1910CV18-250BZXI
OCR Text ...) @ 250 MHz * Two input clocks (K and K) for precise DDR timing -- SRAM uses rising edges only * Two input clocks for output data (C and C) ...bus latches address inputs for both Read and Write ports * Separate Port Selects for depth expansion...
Description 18-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture

File Size 1,087.18K  /  26 Page

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    NCV7424 NCV7424D NCV7424DB0R2G

ON Semiconductor
Part No. NCV7424 NCV7424D NCV7424DB0R2G
OCR Text ... 100 pf capacitor through a 1.5 k resistor. 3. equivalent to discharging a 150 pf capacitor through a 330 resistor. system hbm levels...bus output/input 10 gnd ground 11 lin1 lin bus output/input 12 v bb battery supply input 13 lin3 lin...
Description Four Channel LIN Transceiver

File Size 176.58K  /  12 Page

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For k-bus Found Datasheets File :: 26994    Search Time::1.375ms    
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