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JMicron
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Part No. |
JMC261
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OCR Text |
...0base-t. the mac supports ipv4, ipv6, t cp, udp checksum, segmentation task-offload, priority encoding and ieee802.1q vlan features. it also supports receive side scaling (rss) to balance the loading for received data processing a... |
Description |
PCI Express to Fast Ethernet & Card Reader Host Controller
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File Size |
97.31K /
2 Page |
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it Online |
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Zarlink Semiconductor, Inc.
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Part No. |
ZL50111GAG2
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OCR Text |
...ing engine pw , rtp, udp, ipv4, ipv6, m pls, ecid, vlan, user defined, others triple packet interface mac (m ii, g m ii, tbi) tdm interface (liu, framer, backplane) per port dco for clock recovery zbt-sram (0 - 8 mbytes) 32 t1/e1, 8 j2, 2 t... |
Description |
128, 256 and 1024 Channel CESoP Processors SPECIALTY TELECOM CIRCUIT, PBGA552
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File Size |
842.71K /
113 Page |
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it Online |
Download Datasheet
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![ZL50117GAG2 ZL50116GAG ZL50116GAG2 ZL50117GAG ZL50120GAG2 ZL50115 ZL50115GAG ZL50115GAG2 ZL50116 ZL50117 ZL50117_06 ZL50](Maker_logo/zarlink_semiconductor_inc.GIF)
ZARLINK[Zarlink Semiconductor Inc]
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Part No. |
ZL50117GAG2 ZL50116GAG ZL50116GAG2 ZL50117GAG ZL50120GAG2 ZL50115 ZL50115GAG ZL50115GAG2 ZL50116 ZL50117 ZL50117_06 ZL50118 ZL50118GAG ZL50118GAG2 ZL50119 ZL50119GAG ZL50119GAG2 ZL50120 ZL50120GAG
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OCR Text |
...ing Engine
PW, RTP, UDP, IPv4, ipv6, MPLS, ECID, VLAN, User Defined, Others
Dual Packet Interface MAC
(MII, GMII, TBI)
Per Port DCO for Clock Recovery
100 Mbps MII Fast Ethernet
On Chip Packet Memory
(Jitter Buffer Compensati... |
Description |
32, 64 and 128 Channel CESoP Processors
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File Size |
1,166.74K /
95 Page |
View
it Online |
Download Datasheet
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![ZL50115GAG ZL50116GAG ZL50120GAG ZL50115 ZL50116 ZL50117 ZL50117GAG ZL50118 ZL50118GAG ZL50119 ZL50119GAG ZL50120](Maker_logo/zarlink_semiconductor_inc.GIF)
ZARLINK[Zarlink Semiconductor Inc]
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Part No. |
ZL50115GAG ZL50116GAG ZL50120GAG ZL50115 ZL50116 ZL50117 ZL50117GAG ZL50118 ZL50118GAG ZL50119 ZL50119GAG ZL50120
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OCR Text |
...ing Engine
PW, RTP, UDP, IPv4, ipv6, MPLS, ECID, VLAN, User Defined, Others
Dual Packet Interface MAC
(MII, GMII, TBI)
Per Port DCO for Clock Recovery
100 Mbps MII Fast Ethernet
On Chip Packet Memory
(Jitter Buffer Compensati... |
Description |
32, 64 and 128 Channel CESoP Processors
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File Size |
1,105.44K /
95 Page |
View
it Online |
Download Datasheet
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ZARLINK[Zarlink Semiconductor Inc]
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Part No. |
ZL5011006 ZL50111 ZL50114GAG2 ZL50110 ZL50110GAG ZL50110GAG2 ZL50111GAG ZL50111GAG2 ZL50114 ZL50114GAG
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OCR Text |
...ing Engine
PW, RTP, UDP, IPv4, ipv6, MPLS, ECID, VLAN, User Defined, Others
Triple Packet Interface MAC
(MII, GMII, TBI)
Per Port DCO for Clock Recovery
On Chip Packet Memory
Backplane Clocks
(Jitter Buffer Compensation for 1... |
Description |
128, 256 and 1024 Channel CESoP Processors
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File Size |
1,143.51K /
103 Page |
View
it Online |
Download Datasheet
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Price and Availability
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