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ALSC
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| Part No. |
ASM3P2669A
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| OCR Text |
...PLL based 3 - EMI Reduction 4 - ddr support products 5 - STD zero Delay Buffer 6 - power management 7 - power management 8 - power management 9 - Hi performance 0 - reserved
Alliance Semiconductor Mixed Signal Product
Licensed under U... |
| Description |
The el-EMI-nator? Series for Low-Power
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| File Size |
159.45K /
10 Page |
 View
it Online |
Download Datasheet
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Altera
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| Part No. |
EP1S20F484
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| OCR Text |
... Figures 2-65 and 2-66. Updated ddr I information. Updated Table 2-23. Added Tables 2-26, 2-29, 2-30, and 2-77. Updated Figures 2-59, 2-65, ...zero bus turnaround (ZBT) SRAM, quad data rate (QDR and QDRII) SRAM, double data rate (ddr) SDRAM, D... |
| Description |
FPGA (Field-Programmable Gate Array)
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| File Size |
1,369.20K /
260 Page |
View
it Online |
Download Datasheet |
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IDT
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| Part No. |
IDTCSPT855
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| OCR Text |
...INARY
* PLL clock driver for ddr (Double Data Rate) synchronous DRAM applications * Spread spectrum clock compatible * Operating frequenc...zero delay buffer that distributes one differential clock input pair(CLK, CLK ) to four differential... |
| Description |
2.5V PHASE LOCKED LOOP CLOCK DRIVER
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| File Size |
75.91K /
10 Page |
View
it Online |
Download Datasheet |
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IDT
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| Part No. |
IDTCSPT857_A
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| OCR Text |
...mized for clock distribution in ddr (Double Data Rate) SDRAM applications * Operating frequency: 60MHz to 200MHz * Standard speed: PC1600 (D...zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential outp... |
| Description |
2.5V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
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| File Size |
121.50K /
12 Page |
View
it Online |
Download Datasheet |
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IDT
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| Part No. |
IDTCSPT857C
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| OCR Text |
...mized for clock distribution in ddr (Double Data Rate) SDRAM applications * Operating frequency: 60MHz to 220MHz * Very low skew: - <100ps f...zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential outp... |
| Description |
2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
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| File Size |
135.63K /
15 Page |
View
it Online |
Download Datasheet |
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ALSC
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| Part No. |
ASM3P2870A
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| OCR Text |
...PLL based 3 - EMI Reduction 4 - ddr support products 5 - STD zero Delay Buffer
6 - power management 7 - power management 8 - power management 9 - Hi performance 0 - reserved
Alliance Semiconductor Mixed Signal Product
Licensed unde... |
| Description |
From old datasheet system
The el-EMI-nator? Series for Low-Power
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| File Size |
163.24K /
11 Page |
View
it Online |
Download Datasheet |
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Alliance Semiconductor
ALSC
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| Part No. |
ASM3P2872A ASM3P2872AF-06OR
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| OCR Text |
...PLL based 3 - EMI Reduction 4 - ddr support products 5 - STD zero Delay Buffer
6 - power management 7 - power management 8 - power management 9 - Hi performance 0 - reserved
Alliance Semiconductor Mixed Signal Product
Licensed unde... |
| Description |
3.3 V, 15 MHz to 30 MHz, low power peak EMI reduction solution
From old datasheet system
The el-EMI-nator? Series for Low-Power
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| File Size |
98.94K /
9 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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