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  50ps Datasheet PDF File

For 50ps Found Datasheets File :: 513    Search Time::0.953ms    
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    9DB403DGILF 9DB403DGLF 9DB403DGLFT 9DB403DGILFT ICS9DB403D 9DB403DFILFT 9DB403DFLF 9DB403DFLFT

Integrated Device Technology
Part No. 9DB403DGILF 9DB403DGLF 9DB403DGLFT 9DB403DGILFT ICS9DB403D 9DB403DFILFT 9DB403DFLF 9DB403DFLFT
OCR Text ...  outputs cycle-cycle jitter < 50ps  outputs skew: 50ps  phase jitter: pcie gen1 < 86ps peak to peak  phase jitter: pcie gen2 < 3.0/3.1ps rms  28-pin ssop/tssop pacakge  available in rohs compliant packaging  supports commercial (0 t...
Description Four Output Differential Buffer for PCIe Gen 1 and Gen 2

File Size 274.09K  /  19 Page

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    9FG1201HFLF 9FG1201HGLFT 9FG1201HFLFT ICS9FG1201H11

Integrated Device Technology
Part No. 9FG1201HFLF 9FG1201HGLFT 9FG1201HFLFT ICS9FG1201H11
OCR Text ... output cycle-to-cycle jitter < 50ps ? dif output-to-output sk e w < 50ps within a g roup ? dif output-to-output sk e w < 100ps across all outputs ? 56-pin ssop/tssop pac kage ? rohs compliant packaging features/benefits? drives 2 channels ...
Description Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD

File Size 241.48K  /  23 Page

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    ICS9FG1201HFLF-T ICS9FG1201HGLF-T ICS9FG1201H

Integrated Device Technology
Part No. ICS9FG1201HFLF-T ICS9FG1201HGLF-T ICS9FG1201H
OCR Text ... output cycle-to-cycle jitter < 50ps DIF output-to-output skew < 50ps within a group DIF output-to-output skew < 100ns across all outputs * * 56-pin SSOP/TSSOP package Available in RoHS compliant packaging Funtional Block Diagram ...
Description Frequency Generator for CPU, PCIe Gen1 & Fully Buffered DIMM Clocks

File Size 261.89K  /  21 Page

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    MAX374707 MAX3747BEUB

Maxim Integrated Products
Part No. MAX374707 MAX3747BEUB
OCR Text .../div 60mV/div 60mV/div 50ps/div 50ps/div 70ps/div OUTPUT EYE DIAGRAM (MAXIMUM INPUT) MAX3747/MAX3747A/MAX3747B toc04 OUTPUT EYE DIAGRAM AT +100C MAX3747/MAX3747A/MAX3747B toc05 SUPPLY CURRENT vs. TEMPERATURE (EXCLU...
Description 155Mbps to 3.2Gbps, Low-Power SFP Limiting Amplifiers

File Size 289.65K  /  10 Page

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    SHM-4860 SHM-4860_883 SHM-4860MC SHM-4860MM SHM-4860/883

List of Unclassifed Manufacturers
ETC
Part No. SHM-4860 SHM-4860_883 SHM-4860MC SHM-4860MM SHM-4860/883
OCR Text ...me 74dB Feedthrough attenuation 50ps Aperture uncertainty Industry standard (R) (R) INNOVATION and EXCELLENCE GENERAL DESCRIPTION DATEL's SHM-4860 is a high-speed, highly accurate samplehold amplifier designed for precision, hi...
Description Industry-Standard, High-Speed ±0.01% Sample-Hold Amplifiers
Industry-Standard, High-Speed 卤0.01% Sample-Hold Amplifiers
Industry-Standard, High-Speed 【0.01% Sample-Hold Amplifiers

File Size 41.02K  /  3 Page

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    9DS400AFILF ICS9DS400 9DS400AGILF 9DS400AFLF 9DS400AFLFT 9DS400AGLF 9DS400AFILFT 9DS400AGILFT 9DS400AGLFT

Integrated Device Technology
Part No. 9DS400AFILF ICS9DS400 9DS400AGILF 9DS400AFLF 9DS400AFLFT 9DS400AGLF 9DS400AFILFT 9DS400AGILFT 9DS400AGLFT
OCR Text ...s ? output cycle-cycle jitter < 50ps ? output to output skew <50ps ? phase jitter: pcie gen1 < 86ps peak to peak ? phase jitter: pcie gen2 < 3.0/3.1ps rms features/benefits? bypass mode ? supports undriven differential outputs in pd# andsr...
Description Four Output Differential Buffer for PCIe Gen 2 with Spread

File Size 314.28K  /  19 Page

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    MICREL[Micrel Semiconductor]
Part No. SY89809L_05 SY89809L SY89809LTC SY89809LTCTR SY89809LTH SY89809LTHTR SY89809L05
OCR Text ...00ps max.) Low pin-to-pin skew (50ps max.) Available in 32-pin TQFP package Precision Edge(R) DESCRIPTION The SY89809L is a High-Performance Bus Clock Driver with 9 differential HSTL (High-Speed Transceiver Logic) output pairs. The p...
Description 3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER

File Size 100.67K  /  7 Page

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    PERICOM[Pericom Semiconductor Corporation]
Part No. PI6C21200VE PI6C21200 PI6C21200AE
OCR Text ...patible signaling) * Low skew < 50ps * Low jitter < 50ps * Output Enable for all outputs * Outputs tristate control via SMBus * Power Management Control * Programmable PLL Bandwidth * PLL or Fan out operation * Gear Ratio supporting differe...
Description 1:12 Clock Driver for Intel PCI-Express Chipsets

File Size 301.46K  /  15 Page

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    PERICOM[Pericom Semiconductor Corporation]
Part No. PI6C20800VE PI6C20800 PI6C20800AE
OCR Text 50ps * Low Cycle-to-cycle jitter < 50ps * Output Enable for all outputs * Outputs Tristate control via SMBus * Power Management Control * Programmable PLL Bandwidth * PLL or Fanout operation * 3.3V Operation * Packaging (Pb-Free & Green): -...
Description 1:8 Clock Driver for Intel PCI Express Chipsets

File Size 257.76K  /  10 Page

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    9FG430AFILF 9FG430AFILFT 9FG430AGILF 9FG430AFLFT 9FG430AGLF 9FG430AGLFT 9FG430AGILFT

Integrated Device Technology
Part No. 9FG430AFILF 9FG430AFILFT 9FG430AGILF 9FG430AFLFT 9FG430AGLF 9FG430AGLFT 9FG430AGILFT
OCR Text ...ions:? cycle-to-cycle jitter: < 50ps with 25mhz input ? output-to-output skew: <50ps ? phase jitter: pcie gen3 < 1ps rms ? phase jitter: qpi 9.6gb/s < 0.2ps rms ? 10 ppm synthesis error with 25mhz input and spread off functional block diagr...
Description Four Output Differential Frequency Generator for PCIe Gen3 and QPI

File Size 208.62K  /  18 Page

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