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    NB6L14MNG NB6L14MNR2G NB6L14

ONSEMI[ON Semiconductor]
Part No. NB6L14MNG NB6L14MNR2G NB6L14
OCR Text ...tput - LVTTL/LVCMOS Description Non-inverted Differential Output. Typically Terminated with 50 W Resistor to VCC-2.0 V. Inverted Differential Output. Typically Terminated with 50 W Resistor to VCC - 2.0 V. Non-inverted Differential Output. ...
Description 2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer

File Size 145.31K  /  10 Page

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    MACOM[Tyco Electronics]
Part No. MASWSS0201SMB MASWSS0201TR-3000 MASWSS0201
OCR Text ...low Compatible Configurable for non-terminated Operation MASWSS0201 V1 Functional Schematic Description M/A-COM's MASWSS0201 is a broadband GaAs PHEMT MMIC SPDT terminated switch in a low cost, lead-free 3 mm 12-lead PQFN package....
Description GaAs Broadband 75 Ohm Default-On, SPDT Terminated Switch DC - 2.5 GHz

File Size 165.94K  /  6 Page

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    ICST[Integrated Circuit Systems]
Part No. ICS8308I ICS8308AGI ICS8308AGILF ICS8308AGILFT ICS8308AGIT
OCR Text ...VCMOS / LVTTL interface levels. Non-inver ting differential clock input. Clock enable. LVCMOS / LVTTL interface levels. Output enable. LVCMO...terminated with 50 to VDDO/2. See Parameter Measurement section, "3.3V Output Load AC Test Circuit"....
Description Low Skew, 1-To-8 Differential/LVCOMS-TO-LVCMOS Fanout Buffer 低斜差分/ LVCOMS到的LVCMOS扇出缓冲
Low Skew 1-To-8 Differential/LVCOMS-TO-LVCMOS Fanout Buffer

File Size 186.20K  /  15 Page

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    ICST[Integrated Circuit Systems]
Part No. ICS8344BYT ICS8344 ICS8344BY
OCR Text ...l clock input pair. Pulldown Non-inver ting input of secondar y differential clock input pair. Pulldown Non-inver ting input of primar y ...terminated with 50 to VDDO/2. NOTE 2: Defined as skew within a bank of outputs at the same voltages ...
Description LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

File Size 97.16K  /  15 Page

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    Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS85211I-01 211AI01L 5211AI01 ICS85211AMI-01 ICS85211AMI-01LF ICS85211AMI-01LFT ICS85211AMI-01T
OCR Text ...D/2 default when left floating. Non-inver ting differential clock input. Positive supply pin. TABLE 1. PIN DESCRIPTIONS Number 1, 2 3, 4...terminated with 50 to ground. 85211AMI-01 www.icst.com/products/hiperclocks.html 3 REV. A ...
Description LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-HSTL FANOUT BUFFER

File Size 152.77K  /  13 Page

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    ICS853006AGT ICS853006 ICS853006AG

ICST[Integrated Circuit Systems]
Integrated Circuit Solution Inc
Part No. ICS853006AGT ICS853006 ICS853006AG
OCR Text ...PECL interface levels. Pulldown Non-inver ting differential LVPECL clock input. Pullup/ Inver ting differential LVPECL clock input. VCC/2 de...terminated with 50 to VCC - 2V. NOTE 2: Single-ended input operation is limited. VCC 3V in LVPECL m...
Description DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER DIFFERENTIAL-TO-2.5V/3.3V的LVPECL / ECL扇出缓冲

File Size 190.23K  /  16 Page

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    Peregrine Semiconductor
Part No. PE42750-14
OCR Text ...1-0013 logo updated under non-rev change. peregrine products are protected under one or more of the following u.s. pate...terminated/through 75 ? 23/26 dbm t st storage temperature -55 +150 c v esd esd voltage, ...
Description 75 Ω Terminated 5 - 2200 MHz SPDT CATV UltraCMOS? Switch

File Size 1,063.56K  /  10 Page

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