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  gen1-2-3 Datasheet PDF File

For gen1-2-3 Found Datasheets File :: 119    Search Time::3.844ms    
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    SC9697

Silan Microelectronics Joint-stock
Part No. SC9697
OCR Text ...?area?wave?bands?selection(usa,?gen1/2,?japan) ?support?manual?up?and?down?adjust ?support?auto?up??and?down?adjust ?pre-store??broadcasting?station?(fm:?10,?am/mw:?10,?lw:5) *?cassette?function ?support?tape?display *??aux?function ?o...
Description CD SERVO CONTROLLER WITH MCU (WITH CLOCK AND RADIO FREQUENCY DISPLAY)

File Size 293.53K  /  9 Page

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    9FG1201HFLF 9FG1201HGLFT 9FG1201HFLFT ICS9FG1201H11

Integrated Device Technology
Part No. 9FG1201HFLF 9FG1201HGLFT 9FG1201HFLFT ICS9FG1201H11
OCR Text gen1, gen2, & fbd 1371f ? 09/23/09 frequency gearing clock for cpu, pci e gen1, gen2, & fbd da t asheet 1 description the ics9fg1201h ...2 channels of 4 fbdimms (total of 8 fbdimms) ? pow er up def ault is all outputs in 1:1 mode ? dif_(...
Description Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD

File Size 241.48K  /  23 Page

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    9DB233AFILF 9DB233AFILFT 9DB233AFLF 9DB233AFLFT 9DB233AGILF 9DB233AGILFT 9DB233AGLF 9DB233AGLFT

Integrated Device Technology
Part No. 9DB233AFILF 9DB233AFILFT 9DB233AFLF 9DB233AFLFT 9DB233AGILF 9DB233AGILFT 9DB233AGLF 9DB233AGLFT
OCR Text ...rds compatible to pcie gen2 and gen1. the 9db233 is dr iv en b y a diff erential src output pair from an idt 932s421 or 932sq420 or equiva...2 clock request (oe#) pins make the 9db233 suitable for express card applications. key specification...
Description Two Output Differential Buffer for PCIe Gen3

File Size 195.33K  /  14 Page

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    9DB633AFILF 9DB633AFLIFT 9DB633AFLF 9DB633AGILF 9DB633AFLFT 9DB633AGILFT 9DB633AGLF 9DB633AGLFT

Integrated Device Technology
Part No. 9DB633AFILF 9DB633AFLIFT 9DB633AFLF 9DB633AGILF 9DB633AFLFT 9DB633AGILFT 9DB633AGLF 9DB633AGLFT
OCR Text ...rds compatible to pcie gen2 and gen1. the 9db633 is dr iv en b y a diff erential src output pair from an idt 932s421 or 932sq420 or equiva...2 clock request (oe#) pins make the 9db633 suitable for express card applications. key specification...
Description Six Output Differential Buffer for PCIe Gen3

File Size 235.75K  /  14 Page

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    9DS400AFILF ICS9DS400 9DS400AGILF 9DS400AFLF 9DS400AFLFT 9DS400AGLF 9DS400AFILFT 9DS400AGILFT 9DS400AGLFT

Integrated Device Technology
Part No. 9DS400AFILF ICS9DS400 9DS400AGILF 9DS400AFLF 9DS400AFLFT 9DS400AGLF 9DS400AFILFT 9DS400AGILFT 9DS400AGLFT
OCR Text ...skew <50ps ? phase jitter: pcie gen1 < 86ps peak to peak ? phase jitter: pcie gen2 < 3.0/3.1ps rms features/benefits? bypass mode ? supports...2,1)) control logic bypass#_sscg sdata sclk pd spread generating pll 4 iref oe(6,1)# 2 dif_stop s...
Description Four Output Differential Buffer for PCIe Gen 2 with Spread

File Size 314.28K  /  19 Page

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    SI52142 SI52142-A01AGMR

Silicon Laboratories
Part No. SI52142 SI52142-A01AGMR
OCR Text ...rential ? 35 50 ps output pcie gen1 refclk phase jitter rms gen1 includes pll bw 1.5?22 mhz, = 0.54, td=10 ns, ftrk=1.5 mhz with ber = ...2 ? 4 mhz, cdr = 10 mhz) 00.5 1.0ps diff long term accuracy l acc measured at 0 v differential ? ? ...
Description PCI-EXPRESS GEN 1, GEN 2 & GEN 3 CLOCK TWO OUTPUT GENERATOR WITH 25 MHZ REFERENCE CLOCK

File Size 170.00K  /  20 Page

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    SI52144-A01AGM SI52144-A01AGMR

Silicon Laboratories
Part No. SI52144-A01AGM SI52144-A01AGMR
OCR Text ...rential ? 35 50 ps output pcie gen1 refclk phase jitter rms gen1 includes pll bw 1.5?22 mhz, = 0.54, td=10 ns, ftrk=1.5 mhz with ber = ...2?4 mhz, cdr = 10 mhz) 00.5 1.0ps diff long term accuracy l acc measured at 0 v differential ? ? 10...
Description PCI-EXPRESS GEN 1, GEN 2, & GEN 3 CLOCK QUAD OUTPUT GENERATOR

File Size 164.81K  /  20 Page

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    SI52146 SI52146-A01AGM SI52146-A01AGMR

Silicon Laboratories
Part No. SI52146 SI52146-A01AGM SI52146-A01AGMR
OCR Text ...rential ? 35 50 ps output pcie gen1 refclk phase jitter rms gen1 includes pll bw 1.5?22 mhz, = 0.54, td=10 ns, ftrk=1.5 mhz with ber = ...2?4 mhz, cdr = 10 mhz) 00.5 1.0ps diff long term accuracy l acc measured at 0 v differential ? ? 10...
Description PCI-EXPRESS GEN 1, GEN 2, & GEN 3 SIX OUTPUT CLOCK GENERATOR

File Size 166.80K  /  20 Page

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    SI52147-A01AGMR

Silicon Laboratories
Part No. SI52147-A01AGMR
OCR Text ...rential ? 35 50 ps output pcie gen1 refclk phase jitter rms gen1 includes pll bw 1.5?22 mhz, = 0.54, td=10 ns, ftrk=1.5 mhz with ber = ...2?4 mhz, cdr = 10 mhz 00.5 1.0ps diff long term accuracy l acc measured at 0 v differential ? ? 100...
Description PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT CLOCK GENERATOR

File Size 170.63K  /  22 Page

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    M2S005-FG144YI M2S050-VF144YI M2S050-VF144YES M2S005-FG144YES M2S080T-1VF144YES M2S080T-FG144YES M2S080T-VF144Y M2S080T-

Microsemi Corporation
Part No. M2S005-FG144YI M2S050-VF144YI M2S050-VF144YES M2S005-FG144YES M2S080T-1VF144YES M2S080T-FG144YES M2S080T-VF144Y M2S080T-VF144YES M2S080T-VF144YI M2S080T-VFG144Y M2S080T-1FG144Y M2S080T-1FG144YES M2S080T-1FG144YI M2S080T-1FGG144Y M2S080T-1FGG144YES M2S080T-1FGG144YI M2S080T-1VF144YI M2S080T-1VFG144Y M2S080T-1VFG144YES M2S080T-1VFG144YI M2S080T-FG144YI M2S080T-FGG144Y M2S080T-FGG144YES M2S080T-FGG144YI M2S080T-VFG144YES M2S025T-1FG144YI M2S025T-1VF144YI M2S025T-1VFG144Y M2S025T-1FGG144YI M2S025T-1VFG144YI M2S025T-1FG144YES M2S025T-1FGG144YES M2S025T-1VF144YES M2S025T-1VFG144YES M2S050T-1FG144Y M2S050T-1FG144YES M2S050T-1FG144YI M2S050T-1FGG144Y M2S050T-1FGG144YES M2S050T-1FGG144YI M2S050T-1VFG144Y M2S050T-1VFG144YES M2S005TS-1FGG144Y M2S005TS-1VF144Y M2S005TS-1VFG144Y M2S005TS-1FGG144YES M2S005TS-1FGG144YI M2S050T-1VF144Y M2S005TS-1FG144YI M2S005TS-1VFG144YES M2S005TS-1VFG144YI M2S005-VFG144Y M2S005S-1FGG144Y M2S005-1FGG144Y M2S005-1VF144YES M2S005-VF144YES M2S005-1VF144YI M2S005-1FG144YI M2S005S-1FG144YI M2S005-1FG144YES M2S005-1FGG144YES M2S005-1VFG144YES M2S005S-1FG144YES M2S005S-1FGG144YI M2S005-FGG144YI M2S005-VF144YI M2S005-1FGG144YI M2S005-1VFG144YI M2S005-FGG144YES M2S025S-VF
OCR Text ...ore with 16-bit pipe interface (gen1/gen2) 256 bytes maximum payload size 64-/32-bit axi/ahb master and slave interfaces to the application layer high speed memory interfaces ? up to 2 high speed ddrx memory controllers ? mss ddr (mddr) and...
Description SmartFusion2 System-on-Chip FPGAs

File Size 7,367.70K  /  156 Page

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