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Part No. |
MT8VDDT1664AG-202A1
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OCR Text |
...positive edge of ck0. commands (address and control signals) are registered at every positive edge of ck0. input data is registered on both edges of dqs, and output data is referenced to both edges of dqs, as well as to both edges of ck0. r... |
Description |
16M X 64 DDR DRAM MODULE, 0.8 ns, DMA184
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File Size |
403.49K /
23 Page |
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Part No. |
KMM366S824CT-GH
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OCR Text |
...power supply ? mrs cycle with address key programs latency (access from column address) burst length (1, 2, 4, 8 & full page) data scramble (sequential & interleave) ? all inputs are sampled at the positive going edge of ... |
Description |
8M X 64 SYNCHRONOUS DRAM MODULE, 6 ns, DMA168
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File Size |
163.28K /
11 Page |
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it Online |
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IDT
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Part No. |
IDT79RC64474 IDT79RC64475
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OCR Text |
...n-chip, for virtual-to-physical address mapping on-chip two-way set associative caches ? 16kb instruction cache (i-cache) ? 16kb data cache (d-cache) optional i-cache and d-cache locking (per set), provides improved real-time support ... |
Description |
(IDT79RC64V474 / IDT79RC64V475) 64-Bit Microprocessor
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File Size |
418.88K /
25 Page |
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it Online |
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MACRONIX INTERNATIONAL CO LTD
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Part No. |
MX29LV800ATMI-90
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OCR Text |
...am and verify data at specified address ? erase suspend/erase resume - suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the erase. ? status reply - data polling & togg... |
Description |
512K X 16 FLASH 3V PROM, 90 ns, PDSO48
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File Size |
1,501.33K /
66 Page |
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it Online |
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Part No. |
MT8VDDT1664HDG-335XX
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OCR Text |
... 1gb refresh count 4k8k8k8k row address 4k (a0?a11) 8k (a0?a12) 8k (a0?a12) 16k (a0?a13) device bank address 4 (ba0, ba1) 4 (ba0, ba1) 4 (ba0, ba1) 4 (ba0, ba1) device configuration 128mb (8 meg x 16) 256mb (16 meg x 16) 512mb (32 meg x 16)... |
Description |
16M X 64 DDR DRAM MODULE, 0.75 ns, ZMA200
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File Size |
490.71K /
14 Page |
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it Online |
Download Datasheet
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Price and Availability
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