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zero-delay fanout Datasheet PDF File

For zero-delay fanout Found Datasheets File :: 485 Search Time::2.203ms
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				HITACHI[Hitachi Semiconductor]
Part No.	HD74HC147
OCR Text	...BCD output. The implied decimal zero codition requires no input condition as zero is encoded when all nine data lines are at a high logic le...delay t PLH time t PHL 2.0 4.5 6.0 220 -- 44 37 75 15 13 10 -- -- -- -- -- -- Output ris...
Description	10-to-4-line Priority Encoder
File Size	42.87K / 8 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS94215 ICS94215YF-T
OCR Text	...core. Reference clock for SDRAM zero delay buffer Powers down chip, active low Supply for CPU clock 3.3V "True" clocks of differential pair CPU outputs. These open drain outputs need an external 1.5V pull-up. "Complementory" clocks of diffe...
Description	Programmable System Clock Chip for AMD - K7⑩ Processor KX/KT133 Single Chip Clock with differential CPU Clocks Programmable System Clock Chip for AMD - K7 Processor
File Size	143.83K / 18 Page	View it Online	Download Datasheet

				MOTOROLA[Motorola, Inc]
Part No.	MPC950
OCR Text	... for the MPC951 to be used as a zero delay, low skew fanout buffer. In addition, the external feedback allows for a wider variety of input-to-output frequency relationships. The MPC951 REF_SEL pin allows for the selection of an alternate LV...
Description	LOW VOLTAGE PLL CLOCK DRIVER
File Size	160.79K / 13 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp. Cypress Semiconductor Corp. CYPRESS[Cypress Semiconductor]
Part No.	CY7B9911 CY7B9911V CY7B9911V-5JC CY7B9911V-7JC 7B9911V
OCR Text	...ency (input as low as 3.75 MHz) Zero input-to-output delay 50% duty-cycle outputs LVTTL outputs drive 50 terminated lines Operates from a single 3.3V supply Low operating current 32-pin PLCC package Jitter < 200 ps peak-to-peak (< 25 ps RMS...
Description	High-Speed Low-Voltage Programmable Skew Clock Buffer LV-PSCB 7B SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 From old datasheet system
File Size	222.36K / 11 Page	View it Online	Download Datasheet

				Cypress Semiconductor, Corp. Cypress Semiconductor Corp. CYPRESS[Cypress Semiconductor]
Part No.	CY7B991V CY7B991V-2JC CY7B991V-5JC CY7B991V-5JI CY7B991V-7JC
OCR Text	...ency (input as low as 3.75 MHz) Zero input to output delay 50% duty-cycle outputs LVTTL Outputs drive 50 terminated lines Operates from a single 3.3V supply Low operating current 32-pin PLCC package Jitter < 200 ps peak-to-peak (< 25 ps RMS...
Description	Low Voltage Programmable Skew Clock Buffer 7B SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 3.3V RoboClock Low Voltage Programmable Skew Clock Buffer
File Size	242.46K / 13 Page	View it Online	Download Datasheet

				Cypress Semiconductor Corp. CYPRESS[Cypress Semiconductor]
Part No.	CY7B991 CY7B991-2 CY7B991-2JC CY7B991-5 CY7B991-5JC CY7B991-5JI CY7B991-7 CY7B991-7JC CY7B991-7JI CY7B991-7LMB CY7B992 CY7B992-2 CY7B992-2JC CY7B992-5 CY7B992-5JC CY7B992-5JI CY7B992-7 CY7B992-7JC CY7B992-7JI CY7B992-7LMB
OCR Text	...ency (input as low as 3.75 MHz) Zero input to output delay 50% duty-cycle outputs Outputs drive 50 terminated lines Low operating current 32-pin PLCC/LCC package Jitter < 200 ps peak-to-peak (< 25 ps RMS) Compatible with a PentiumTM-based p...
Description	Programmable Skew Clock Buffer 7B SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 Programmable Skew Clock Buffer 7B SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32
File Size	286.88K / 15 Page	View it Online	Download Datasheet

				Motorola, Inc. MOTOROLA[Motorola, Inc]
Part No.	MPC904 MPC905 MPC903 MPC903D MPC904D
OCR Text	...n the internal oscillator for a zero power sleep state. A logic `0' on the Enable2 input will disable only the BCLK5 output. The Enable2 inp...delay measurements in the simulations a delta of only 43ps exists between the two differently loaded...
Description	1:6 PCI CLOCK GENERATOR/ fanout BUFFER
File Size	88.65K / 6 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	PCA9510 PCA9510D PCA9510DP PCA9511 PCA9511D PCA9511DP
OCR Text	...ate when the ICC is essentially zero. As the power supply is brought up and the enable is high or the part is powered and the enable is take...delay for a rising edge is determined by the combined pull-up current from the bus resistors and the...
Description	Hot swappable I2C and SMBus bus buffer
File Size	144.39K / 19 Page	View it Online	Download Datasheet

				PHILIPS ICST[Integrated Circuit Systems]
Part No.	PCA9513 PCA9513D PCA9513DP PCA9514D PCA9514DP PCA9514
OCR Text	...ate when the ICC is essentially zero. As the power supply is brought up and the enable is HIGH or the part is powered and the enable is take...delay for a rising edge is determined by the combined pull-up current from the bus resistors and the...
Description	PCA9513; PCA9514; Hot swappable I²C and SMBus bus buffer Hot swappable I2C and SMBus bus buffer Hot swappable IC and SMBus bus buffer
File Size	156.01K / 20 Page	View it Online	Download Datasheet

For zero-delay fanout Found Datasheets File :: 485 Search Time::2.203ms
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