|
|
![](images/bg04.gif) |
AMCC
|
Part No. |
S2204
|
OCR Text |
...) 10
10 DOUTA[0:9] Q
DOUT cru SerialParallel
RXAP RXAN LPENA
2 RBC1/0B COM_DETB FIFO
(output) 10
TXBBP
DOUT cru SerialParallel
10 DOUTB[0:9]
RXBP RXBN
RBC1/0C COM_DETC
2
LPENB
FIFO
(output)
TXCBP
10
... |
Description |
Quad Gigabit Ethernet Device
|
File Size |
406.13K /
33 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Applied Micro Circuits Corp.
|
Part No. |
S2004
|
OCR Text |
... 5. receiver block diagram dout cru serial- parallel dout cru serial- parallel eofa kflaga erra douta[0:7] rxap rxan lpena rxbp rxbn lpenb eofb kflagb errb doutb[0:7] q fifo (output) dout cru serial- parallel eofd kflagd errd doutd[0:7] rxd... |
Description |
Quad Serial Backplane Device(用于高速串行数据传送的四串行收发器)
|
File Size |
386.12K /
38 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Applied Micro Circuits Corp.
|
Part No. |
S3063
|
OCR Text |
...CC's S3040 Clock Recovery Unit (cru). The AMCC S3063 and S3064 chips provide the first stage of the digital processing of a receive and a transmit SONET STS-48 bit-serial stream. In the receive path it converts a bit-serial data stream into... |
Description |
SONET/SDH/ATM OC-48 Differential 16:1 Transmitter(SONET/SDH/ATM差分16传送器)
|
File Size |
54.18K /
5 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
Vitesse Semiconductor Corporation. Vitesse Semiconductor, Corp.
|
Part No. |
VSC6511
|
OCR Text |
...zer (in Serializer mode) or the cru of the Reclocker (in Deserializer/Reclocker mode). Each output, SDO0 and SDO1, have independent TTL inputs, OE0 and OE1, which when HIGH enable the outputs and when LOW disable the outputs. When disabled,... |
Description |
SMPTE-292M Serializer, Deserializer, and Deserializer/Reclocker at 1.485Gb/s 的SMPTE - 292M的串行器,解串器,并串器/时钟恢复.485Gb
|
File Size |
382.72K /
22 Page |
View
it Online |
Download Datasheet
|
|
|
![](images/bg04.gif) |
VITESSE[Vitesse Semiconductor Corporation]
|
Part No. |
VSC6511RC VSC6511
|
OCR Text |
...zer (in Serializer mode) or the cru of the Reclocker (in Deserializer/Reclocker mode). Each output, SDO0 and SDO1, have independent TTL inputs, OE0 and OE1, which when HIGH enable the outputs and when LOW disable the outputs. When disabled,... |
Description |
SMPTE-292M Serializer, Deserializer, and Deserializer/Reclocker at 1.485Gb/s
|
File Size |
377.86K /
22 Page |
View
it Online |
Download Datasheet
|
|
![](images/findchips_sm.gif)
Price and Availability
|