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				IDT
Part No.	IDT72200 IDT72420 IDT72230 IDT72210 IDT72240 IDT72220
OCR Text	...n (RCLK) and a Read Enable pin (ren). The Read Clock can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual clock operation. An Output Enable pin (OE) is provided on the read...
Description	CMOS SyncFIFO?
File Size	112.39K / 11 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT72275 IDT72285
OCR Text	...RS RT RESET LOGIC RCLK ren OE Q0 -Q17 4674 drw 01 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The SuperSync FIFO is a trademark of Integrated Device Technology, Inc. COMMERCIA...
Description	CMOS SuperSync FIFO?
File Size	285.58K / 25 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT72T54242
OCR Text	...for each write port Read enable ren and Chip Select RCS input for each read port User Selectable IDT Standard mode (using EF and FF) or FWFT mode (using IR and OR) Programmable Almost Empty and Almost Full flags per FIFO Dedicated Serial Po...
Description	2.5V QUAD/DUAL TeraSync? DDR/SDR FIFO
File Size	485.94K / 54 Page	View it Online	Download Datasheet

				Integrated Device Technology IDT
Part No.	IDT72V265LA IDT72V255LA IDT72V255LA10PF IDT72V255LA10PFI IDT72V255LA10TF IDT72V255LA10TFI IDT72V255LA15PF IDT72V255LA15PFI IDT72V255LA15TF IDT72V255LA15TFI IDT72V255LA20PF IDT72V255LA20PFI IDT72V255LA20TF IDT72V255LA20TFI IDT72V265LA20TF IDT72V265LA20TFI IDT72V265LA10PF IDT72V265LA10PFI IDT72V265LA10TF IDT72V265LA10TFI IDT72V265LA15PF IDT72V265LA15PFI IDT72V265LA15TF IDT72V265LA15TFI IDT72V265LA20PF IDT72V265LA20PFI IDT72V265LA10TF8 IDT72V255LA10TF8 IDT72V265LA20PF8 IDT72V265LA10PF8 IDT72V265LA15PF8 IDT72V265LA15PFI8 IDT72V265LA15TF8 IDT72V265LA15TFI8
OCR Text	...RS RT RESET LOGIC RCLK ren OE Q0 -Q17 4672 drw 01 The IDT logo is a registered trademark and the SuperSyncFIFO is a trademark of Integrated Device Technology, Inc. COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 (c)...
Description	3.3 VOLT CMOS SuperSync FIFO 8/192 x 18 16/384 x 18 3.3 VOLT CMOS SuperSync FIFO 8,192 x 18 16,384 x 18 3.3 VOLT CMOS SuperSync FIFO? 16K x 18 SuperSync FIFO, 3.3V 8K x 18 SuperSync FIFO, 3.3V
File Size	435.79K / 27 Page	View it Online	Download Datasheet

				IDT
Part No.	IDT72V7250 IDT72V7240 IDT72V72100 IDT72V7230 IDT72V7290
OCR Text	... CONTROL LOGIC RT RM RCLK ren RCS Q0 -Qn (x72, x36 or x18) 4680 drw01 OE IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SuperSync II FIFO is a trademark of Integrated Device Technology, Inc...
Description	3.3 VOLT HIGH-DENSITY SUPERSYNC II? 72-BIT FIFO
File Size	423.44K / 42 Page	View it Online	Download Datasheet

				Motorola, Inc. ONSEMI[ON Semiconductor]
Part No.	MC100E337 MC100E337FN ON0648 MC10E337 MC10E337FN
OCR Text	...nable (TEN) and Receive Enable (ren) on the transmit and receive sides respectively, with a HIGH selecting LOAD. Note that the implementation of the E337 Receive Enable differs from that of the E336. A synchronous bus enable (SBUSEN) is pro...
Description	3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER From old datasheet system
File Size	116.92K / 5 Page	View it Online	Download Datasheet

				Electronic Theatre Controls, Inc. ETC[ETC] List of Unclassifed Manufacturers
Part No.	NAT9914BPD NAT9914BPL NAT9914BPQ NAT9914
OCR Text	...T SRQ ATN EOI DAV NRFD NDAC IFC ren TE Pin Identification PLCC 11, 12, 13, 14, 15, 16, 17, 19 4 Pin Number DIP QFP 10, 11, 12, 16, 17, 18, 13, 14, 15, 19, 20, 21, 16, 17 22, 24 3 9 Mnemonic D(7-0) Type I/O CE* I 6 Figure 1. N...
Description	IEEE 488.2 Controller Chip
File Size	229.17K / 10 Page	View it Online	Download Datasheet

				Philips
Part No.	P89C52 P89C58 P89C54 89C51
OCR Text	...M0/FE 9E SM1 9D SM2 9C ren 9B TB8 9A RB8 99 TI 98 RI 00H 07H 8E TR1 8E EXF2 8D TF0 8D RCLK 8C TR0 8C TCLK 8B IE1 8B EXEN2 8A IT1 8A TR2 89 IE0 89 C/T2 T2OE 88 IT0 88 CP/RL2 DCEN 00H xxxxxx00B 00H 00...
Description	MCU From old datasheet system
File Size	554.42K / 27 Page	View it Online	Download Datasheet

				Vishay
Part No.	SI9150 70020
OCR Text	...s parasitic capacitance. td(EN) ren ISTBY VENH VENL TA = 25C, VSTBY = 0 V VDD = 10 V VDD = 10 V, Rising Input Voltage VDD = 10 V, Falling Input Voltage -25 6 2 Transition High to Low 0.25 500 -20 6.8 3.75 -15 8 5 -28 6 2 1 0.25 500 -20 6.8 ...
Description	Synchronous Buck Converter Controller From old datasheet system
File Size	94.55K / 5 Page	View it Online	Download Datasheet

For ren Found Datasheets File :: 1207 Search Time::2ms
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