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    CATALYST[Catalyst Semiconductor]
Part No. CAT24C164LI-GT3 CAT24C164 CAT24C164LIT3 CAT24C164VP2IT3 CAT24C164YI-GT3 CAT24C164YIT3 CAT24C164WI-GT3 CAT24C164WIT3 CAT24C164VP2I-GT3
OCR Text ...de, VCC = 5 V, 25C (5) When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pull-down is relatively strong; therefore the external driver must be able to supply the pull-down current when a...
Description 16-Kb CMOS Serial EEPROM, Cascadable

File Size 545.68K  /  16 Page

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    PERICOM[Pericom Semiconductor Corporation]
Part No. PI3V312 PI3V312ZHE PI3V312L PI3V312LE PI3V312Q PI3V312QE
OCR Text ...nteraction with the load on the driven side. Bandwidth vs Capacitance 600 3db Bandwidth 500 400 300 200 100 0 0 pf 10 pf 20 pf 30 pf 40 pf 50 pf Capacitance Load 4 PS8754A 11/02/04 PI3V312 Low On-Resistance, 3.3V High-Bandwi...
Description Low On-Resistance, 3.3V High-Bandwidth 4-Port, 2:1 Mux/DeMux VideoSwitch

File Size 323.90K  /  10 Page

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    CAT37EKK-TE7 CAT37TDI CAT37 CAT37RD4-TE13

ON SEMICONDUCTOR
TE Connectivity, Ltd.
CATALYST[Catalyst Semiconductor]
Part No. CAT37EKK-TE7 CAT37TDI CAT37 CAT37RD4-TE13
OCR Text ...allows up to 4 White LEDs to be driven in series. Series drive provides inherent current matching. LED dimming can be done by using a DC voltage, a logic signal, or a pulse width modulation (PWM) signal. The shutdown input pin allows the de...
Description LED DISPLAY DRIVER, PDSO8
CMOS White LED Driver Boost Converter 的CMOS白光LED驱动器升压转换器
LED DISPLAY DRIVER, PDSO5

File Size 166.73K  /  13 Page

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    ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
Part No. L6571A0009 L6571BD L6571A L6571AD L6571B L6571AD013TR
OCR Text ...y of the device allows it to be driven also by external logic signal. The output drivers are designed to drive external nchannel power MOSFET and IGBT. The internal logic assures a dead time to avoid cross-conduction of the power devices. T...
Description HIGH VOLTAGE HALF BRIDGE DRIVER WITH OSCILLATOR

File Size 129.18K  /  8 Page

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    IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
Part No. IDT74FCT163827A IDT74FCT163827C IDT74FCT163827CPV IDT74FCT163827CPF IDT74FCT163827BPV IDT74FCT163827APV IDT74FCT163827BPA IDT74FCT163827BPF IDT74FCT163827APF
OCR Text ....) * Inputs (except I/O) can be driven by 3.3V or 5V components DESCRIPTION: The FCT163827A/B/C 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface bufferin...
Description 3.3V CMOS 20-BIT BUFFERS
CAP 39UF 35V ELECT FC RADIAL FCT SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56

File Size 97.77K  /  7 Page

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    ONSEMI[ON Semiconductor]
Part No. NB4L52MNR2G NB4L52MNG NB4L52_07 NB4L52 NB4L5207
OCR Text ...VOL mV DIFFERENTIAL INPUT driven SINGLE-ENDED (Figures 4 & 7) Vth VIH VIL VIHD VILD VCMR VID IIH IIL RTIN Input Threshold Reference Voltage Range (Note 6) Single-ended Input HIGH Voltage Single-ended Input LOW Voltage 1050 Vth + 150 V...
Description 2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVPECL Translator w/ Internal Termination

File Size 127.11K  /  8 Page

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    NB6L16D NB6L16DTR2G NB6L16 NB6L16DG NB6L16DR2 NB6L16DR2G NB6L16DT NB6L16DTG NB6L16DTR2

ONSEMI[ON Semiconductor]
Part No. NB6L16D NB6L16DTR2G NB6L16 NB6L16DG NB6L16DR2 NB6L16DR2G NB6L16DT NB6L16DTG NB6L16DTR2
OCR Text ... mA mV mV DIFFERENTIAL INPUT driven SINGLE-ENDED (Figures 10, 12) Vth VIH VIL Input Threshold Reference Voltage Range (Notes 2, 7) Single-Ended Input HIGH Voltage Single-Ended Input LOW Voltage 1125 Vth +75 VEE VCC -75 VCC Vth -75 1125 V...
Description 2.5V/3.3V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/Driver/Translator Buffer(2.5V/3.3V多级输入到差分LVPECL/LVNECL时钟或数据输出接收器/驱动
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/Driver/Translator Buffer

File Size 117.51K  /  12 Page

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    ONSEMI[ON Semiconductor]
Part No. NB7L11MMN NB7L11MMNR2 NB7L11MMNR2G NB7L11M NB7L11MMNG
OCR Text ... (Note 5) Differential Input driven Single-Ended (see Figures 10 & 12) (Note 8) Input Threshold Reference Voltage Range (Note 7) Single-ended Input HIGH Voltage (Note 8) Single-ended Input LOW Voltage (Note 8) mV mV mV Differential In...
Description 2.5V/3.3V Differential 1:2 Clock/Data Fanout Buffer/ Translator with CML Outputs and Internal Termination

File Size 199.34K  /  11 Page

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    SL6619TP1N SL6619KG SL6619TP2Q SL6619 SL6619TP1Q SL6619TP2N

ZARLINK[Zarlink Semiconductor Inc]
Part No. SL6619TP1N SL6619KG SL6619TP2Q SL6619 SL6619TP1Q SL6619TP2N
OCR Text ... dB dB LO inputs (12, 14) driven in quadrature: 45mVrms at 450MHz, CW. Mixer inputs (3, 5) driven differentially: 0*45mVrms at 450*004MHz, CW. As gain to TPI As gain toTPI 30 30 40 1 A A TPI, TPQ signals limiting No signal...
Description Direct Conversion FSK Data Receiver

File Size 620.40K  /  21 Page

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    AT17LV020-10JC AT17LV020-10JI AT17LV020 AT17C020-10JI AT17C020-10JC AT17C020

Atmel, Corp.
ATMEL[ATMEL Corporation]
Part No. AT17LV020-10JC AT17LV020-10JI AT17LV020 AT17C020-10JI AT17C020-10JC AT17C020
OCR Text ...he device's RESET status; it is driven Low while the device is in its POWER-ON RESET cycle and released (tri-stated) when the cycle is complete. There are two different ways to use the inputs CE and OE. 2 AT17C/LV020 AT17C/LV020 C...
Description 10MHZ, 3.3V, 20 PLCC, IND TEMP(FPGA) 2M X 1 CONFIGURATION MEMORY, PQCC20
2-megabit FPGA Configuration EEPROM Memory

File Size 145.07K  /  12 Page

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