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Data Delay Devices Inc
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Part No. |
PDU10256HSERIES PDU10256H-0.5C5
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OCR Text |
...w address codes, respectively. violation of this constraint may, depending on the history of the input signal, cause spurious signals to appear on the out pin. the possibility of spurious signals persists until the required t oax has ela... |
Description |
8-BIT, ECL-interfaced programmable delay line 8-BIT. ECL-INTERFACED PROGRAMMABLE DELAY LINE
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File Size |
46.64K /
5 Page |
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it Online |
Download Datasheet
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![PDU10256H-6MC5 PDU10256H-3M PDU10256H-1MC5 PDU10256H-5C5 PDU10256H-4C5 PDU10256H-10 PDU10256H-2MC5](Maker_logo/data_delay_devices_inc.GIF)
Data Delay Devices, Inc. DATA DELAY DEVICES INC
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Part No. |
PDU10256H-6MC5 PDU10256H-3M PDU10256H-1MC5 PDU10256H-5C5 PDU10256H-4C5 PDU10256H-10 PDU10256H-2MC5
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OCR Text |
...w address codes, respectively. violation of this constraint may, depending on the history of the input signal, cause spurious signals to appear on the out pin. the possibility of spurious signals persists until the required t oax has ela... |
Description |
8-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU10256H) ACTIVE DELAY LINE, TRUE OUTPUT, DSO40 8-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU10256H) ACTIVE DELAY LINE, TRUE OUTPUT, DIP20
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File Size |
34.45K /
5 Page |
View
it Online |
Download Datasheet
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Motorola
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Part No. |
MPC9456
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OCR Text |
...hin the VPP (AC) specification. violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, reference input pulse width, output duty cycle and maximum frequency specificati... |
Description |
MPC9456 2.5V and 3.3V LVCMOS Clock Fanout Buffer 2.5V and 3.3V LVCMOS Clock Fanout Buffer
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File Size |
133.67K /
12 Page |
View
it Online |
Download Datasheet
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Price and Availability
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