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				Cypress Semiconductor
Part No.	CY7C1354CV25-166AXC CY7C1354CV25-166AXI
OCR Text	...250-MHz device) * Clock Enable (CEN) pin to suspend operation * Synchronous self-timed writes * Available in lead-free 100-Pin TQFP package,...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQs DQPa D...
Description	9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture
File Size	492.24K / 28 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1381CV25-100AC CY7C1383CV25-100AC CY7C1381CV25-100AI CY7C1383CV25-100AI CY7C1381CV25-100BGC CY7C1383CV25-100BGC CY7C1381CV25-100BGI CY7C1383CV25-100BGI CY7C1381CV25-100BZC CY7C1383CV25-100BZC CY7C1381CV25-100BZI CY7C1383CV25-100BZI CY7C1381CV25-117AC CY7C1383CV25-117AC CY7C1381CV25-117AI CY7C1383CV25-117AI CY7C1381CV25-117BGC CY7C1383CV25-117BGC CY7C1381CV25-117BGI CY7C1383CV25-117BGI CY7C1381CV25-117BZC CY7C1383CV25-117BZC CY7C1381CV25-117BZI CY7C1383CV25-117BZI CY7C1329-133AC CY7C1329-100AC CY7C1329-100AI
OCR Text	...C WRITE ADDRESS REGISTER CLK CEN C CE DQA, DQPA BYTE WRITE REGISTER BURST LOGIC Q1 A1' BYTE A0' Q0 WRITE REGISTER DQA, DQ...U T P U T B U F F E R S E INPUT REGISTERS DQs DQPA DQPB WE ADDRESS REGISTER A[1:0] A...
Description	2-Mb (64K x 32) Pipelined Sync SRAM 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM
File Size	497.27K / 35 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1460AV33-167AXC CY7C1460AV33 CY7C1460AV33-167AXI CY7C1460AV33-167BZC CY7C1460AV33-167BZI CY7C1460AV33-167BZXI CY7C1460AV33-200AXI CY7C1460AV33-200BZC CY7C1460AV33-200BZI CY7C1460AV33-200BZXC CY7C1460AV33-200BZXI CY7C1462AV33 CY7C1462AV33-167AXC CY7C1464AV33-250BGI CY7C1464AV33-200BGXI CY7C1464AV33-200BGI CY7C1462AV33-200AXI
OCR Text	...250-MHz device) * Clock Enable (CEN) pin to suspend operation * Synchronous self-timed writes * CY7C1460AV33, CY7C1462AV33 available in JEDE...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQs DQPa D...
Description	36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL垄芒 Architecture 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL Architecture
File Size	518.21K / 27 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1474V33-250BGI CY7C1474V33-250BGXC CY7C1474V33-250BGXI CY7C1474V33-250BGC CY7C1470V33-167BZC CY7C1472V33-167AXC CY7C1472V33-250BZI CY7C1472V33-250BZXI CY7C1472V33-250AXI CY7C1474V33-200BGXI CY7C1474V33-200BGXC CY7C1474V33-200BGI CY7C1474V33-200BGC CY7C1474V33-167BGXC CY7C1474V33-167BGI CY7C1470V33-200AXI CY7C1470V33-200BZC CY7C1470V33-200BZI CY7C1470V33-200BZXC CY7C1470V33-200BZXI CY7C1470V33-167AXI
OCR Text	...250-MHz device) * Clock Enable (CEN) pin to suspend operation * Synchronous self-timed writes * CY7C1470V33, CY7C1472V33 available in JEDEC-...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQs DQPa D...
Description	72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL?Architecture
File Size	526.11K / 29 Page	View it Online	Download Datasheet

				Allegro MicroSystems
Part No.	ACS761ELF-20B ACS761ELFTR-20B-T
OCR Text	...tion 1 2 IP 3 4 CIN Enable REN CEN VOUT RV1 5 6 7 8 9 10 11 12 IP+ IP+ IP+ IP+ IP+ IP+ EN VIOUT NC CG OCDLY OPDLY IP- IP- IP- IP- IP- IP- G...U.S.A. 1.508.853.5000; www.allegromicro.com 2 ACS761ELF-20B 12 V High-Side Hot-Swap Hall Ef...
Description	12 V High-Side Hot-Swap Hall Effect Based Current Monitor IC
File Size	403.21K / 14 Page	View it Online	Download Datasheet

				CYPRESS SEMICONDUCTOR CORP
Part No.	CY7C1356DV25-250BZC CY7C1356DV25-250BZI CY7C1356DV25-250BZXC CY7C1356DV25-250BZXI CY7C1354DV25-250BGC CY7C1354DV25-250BGI CY7C1354DV25-250BGXC CY7C1354DV25-250BGXI CY7C1356DV25-166AXC CY7C1356DV25-166AXI CY7C1354DV25-250BZXC CY7C1354DV25-250BZXI CY7C1356DV25-166BZC CY7C1356DV25-166BZI CY7C1356DV25-166BZXC CY7C1356DV25-166BZXI CY7C1354DV25-200BZXC CY7C1354DV25-200BZXI CY7C1354DV25-200BZC CY7C1354DV25-200BZI CY7C1354DV25-200BGC CY7C1354DV25-200BGI CY7C1354DV25-200BGXC CY7C1354DV25-200BGXI CY7C1356DV25-250BGXC CY7C1356DV25-250BGXI CY7C1356DV25-166BGXC CY7C1356DV25-166BGXI CY7C1356DV25-200BZXC CY7C1356DV25-200BZXI CY7C1356DV25-200BGXC CY7C1356DV25-200BGXI CY7C1356DV25-200AXC CY7C1356DV25-200AXI CY7C1354DV25-166BZC CY7C1354DV25-166BZI CY7C1354DV25-166BZXC CY7C1354DV25-166BZXI CY7C1354DV25-166BGC CY7C1354DV25-166BGI CY7C1354DV25-166BGXC CY7C1354DV25-166BGXI CY7C1354DV25-166AXC CY7C1354DV25-166AXI CY7C1354DV25 CY7C1354DV25-200AXC CY7C1354DV25-200AXI CY7C1354DV25-250AXC CY7C1354DV25-250AXI CY7C1354DV25-250BZC CY7C1354DV25-250BZI CY7C1356DV25-166BGC CY7C1356DV25-166BGI CY7C1356DV25-200BGC CY7C1356DV25-200BGI CY7C1356DV25-250BGI CY7C1356DV25-250AXI CY7C1356DV25-250BGC CY7C1356DV25-250AXC
OCR Text	... qualified by the Clock Enable (CEN) signal, which when deasserted suspends operation and extends the previous clock cycle. Write operations...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQ s DQ Pa...
Description	256K X 36 ZBT SRAM, 3.2 ns, PBGA119 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture
File Size	583.34K / 29 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1471BV33-117BZC CY7C1471BV33-117BZI CY7C1471BV33-117BZXC CY7C1471BV33-117BZXI CY7C1473BV33 CY7C1473BV33-117AXC CY7C1473BV33-117AXI CY7C1473BV33-117BZC CY7C1473BV33-117BZI CY7C1473BV33-117BZXC CY7C1473BV33-117BZXI CY7C1473BV33-133AXC CY7C1473BV33-133AXI CY7C1473BV33-133BZC CY7C1473BV33-133BZI CY7C1473BV33-133BZXC CY7C1473BV33-133BZXI CY7C1475BV33-117BGXC CY7C1475BV33-117BGXI CY7C1475BV33-133BGXC CY7C1475BV33-133BGXI CY7C1475BV33-133BGC CY7C1475BV33-133BGI CY7C1475BV33-117BGC CY7C1475BV33-117BGI CY7C1471BV33-117AXI CY7C1471BV33-117AXC CY7C1475BV33 CY7C1471BV33-133AXC
OCR Text	... qualified by the Clock Enable (CEN) signal, which when deasserted suspends operation and extends the previous clock cycle. Maximum access d...U T P U T B U F F E R S E DQs DQP A DQP B DQP C DQP D OE CE1 CE2 CE3 ZZ INPUT REGISTER READ...
Description	72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture
File Size	680.16K / 32 Page	View it Online	Download Datasheet

				CYPRESS SEMICONDUCTOR CORP
Part No.	CY7C1472BV25-167BZXC CY7C1472BV25-167BZXI CY7C1472BV25-250BZXC CY7C1472BV25-250BZXI CY7C1472BV25-250BZC CY7C1472BV25-250BZI CY7C1472BV25-200BZC CY7C1472BV25-200BZI CY7C1472BV25-200BZXC CY7C1472BV25-200BZXI CY7C1472BV25-167BZC CY7C1472BV25-167BZI CY7C1472BV25-167AXC CY7C1472BV25-167AXI CY7C1470BV25-167AXI CY7C1470BV25-167BZI CY7C1470BV25-167BZXC CY7C1470BV25-167BZXI CY7C1470BV25-200AXC CY7C1470BV25-200BZXI CY7C1470BV25-167AXC CY7C1470BV25-167BZC CY7C1470BV25-200AXI CY7C1470BV25-200BZC CY7C1470BV25-200BZI CY7C1470BV25-200BZXC CY7C1470BV25-250BZI CY7C1470BV25-250BZXC CY7C1470BV25-250AXC CY7C1472BV25-250AXC CY7C1474BV25-250BGC
OCR Text	... qualified by the Clock Enable (CEN) signal, which when deasserted suspends operation and extends the previous clock cycle. Write operations...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQ s DQ Pa...
Description	2M X 36 ZBT SRAM, 3 ns, PBGA165 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL?/a> Architecture
File Size	665.89K / 29 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1370D-167AXI CY7C1370D-167BGC CY7C1370D-250BZC CY7C1370D-250BZXC CY7C1370D-250BZXI CY7C1370D06 CY7C1370D-250AXC CY7C1370D-250AXI CY7C1370D-250BGC CY7C1370D-250BGI CY7C1370D-250BGXC CY7C1370D-250BGXI CY7C1370D-250BZI CY7C1372D-167BGXC CY7C1372D-250BGXC CY7C1372D-250BZXC CY7C1372D-250BGXI CY7C1370D-200BGXC CY7C1370D-200BGXI CY7C1370D-200BZXC CY7C1372D-200BGXC CY7C1372D-200BGXI CY7C1370D-167AXC CY7C1370D-167BGI CY7C1370D-167BGXC CY7C1370D-167BGXI CY7C1370D-167BZC CY7C1370D-167BZI CY7C1372D-200BZXI CY7C1372D-200BZXC CY7C1370D-200BZXI CY7C1372D-167BGXI CY7C1372D-167BZXC CY7C1372D-167BZXI CY7C1370D-167BZXC CY7C1370D-167BZXI
OCR Text	...250-MHz device) * Clock Enable (CEN) pin to suspend operation * Synchronous self-timed writes * Available in JEDEC-standard lead-free 100-pi...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQs DQPa D...
Description	18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL垄芒 Architecture 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL Architecture 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL?/a> Architecture
File Size	463.98K / 28 Page	View it Online	Download Datasheet

				Cypress Semiconductor
Part No.	CY7C1470V25-167AXC CY7C1470V25-167AXI CY7C1470V25-167BZC CY7C1470V25-167BZI CY7C1470V25-167BZXC CY7C1470V25-167BZXI CY7C1470V25-200AXC CY7C1470V25-200AXI CY7C1470V25-250AXC CY7C1470V25-250AXI CY7C1470V25-250BZC CY7C1470V25-250BZI CY7C1470V25-250BZXC CY7C1470V25-250BZXI CY7C1472V25-167AXC CY7C1472V25-167AXI CY7C1472V25-167BZC CY7C1472V25-167BZI CY7C1472V25-167BZXC CY7C1472V25-167BZXI CY7C1472V25-200AXC CY7C1472V25-200AXI CY7C1472V25-200BZC CY7C1470V25-200BZC CY7C1470V25-200BZI CY7C1470V25-200BZXC CY7C1470V25-200BZXI CY7C1472V25-250BZI CY7C1472V25-200BZI CY7C1472V25-200BZXI CY7C1472V25-250AXI
OCR Text	...250-MHz device) * Clock Enable (CEN) pin to suspend operation * Synchronous self-timed writes * CY7C1470V25, CY7C1472V25 available in JEDEC-...U T P U T R E G I S T E R S D A T A S T E E R I N G O U T P U T B U F F E R S E DQs DQPa D...
Description	72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
File Size	522.57K / 28 Page	View it Online	Download Datasheet

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